Very large scale integration (VLSI) represents not only the threshold of a capability for combiningover 100 000 electronic components on a die of silicon, but also yet another stage in the growth of a volatile industry. The incredible feat of harnessing a wide range of technologies to achieve this degree of integration, and even hold out the prospect for evolution to 106elements and beyond, often tends to obscure the fact that this is also being implemented in high manufacturing volumes and at ever decreasing costs. As a result, it is expected that the characteristic rapid growth of integrated-circuit production will continue over the next decade. However, the scale of the industry has now reached a point where fundamental changes are likely and the pressures resulting from the manufacturing commitments and the market reactions will come to dominate the purely technical influences. VLSI, especially via the leverage of electronic systems, now represents a major influence on world economies, and the commitment necessary to cost-effectively produce such devices in volume stretches the resources of even the largest companies. The objective of the paper is to outline, against the background of the evolution of the integrated circuit industry, the wide consequences of VLSI technology, which, by the contribution it makes and the magnitude of the resources needed to even participate, raises issues at national ana strategic levels which are likely to be determining factors in the future direction of the industry.
{"title":"The business of VLSI","authors":"C. Foxell","doi":"10.1049/sm.1983.0055","DOIUrl":"https://doi.org/10.1049/sm.1983.0055","url":null,"abstract":"Very large scale integration (VLSI) represents not only the threshold of a capability for combiningover 100 000 electronic components on a die of silicon, but also yet another stage in the growth of a volatile industry. The incredible feat of harnessing a wide range of technologies to achieve this degree of integration, and even hold out the prospect for evolution to 106elements and beyond, often tends to obscure the fact that this is also being implemented in high manufacturing volumes and at ever decreasing costs. As a result, it is expected that the characteristic rapid growth of integrated-circuit production will continue over the next decade. However, the scale of the industry has now reached a point where fundamental changes are likely and the pressures resulting from the manufacturing commitments and the market reactions will come to dominate the purely technical influences. VLSI, especially via the leverage of electronic systems, now represents a major influence on world economies, and the commitment necessary to cost-effectively produce such devices in volume stretches the resources of even the largest companies. The objective of the paper is to outline, against the background of the evolution of the integrated circuit industry, the wide consequences of VLSI technology, which, by the contribution it makes and the magnitude of the resources needed to even participate, raises issues at national ana strategic levels which are likely to be determining factors in the future direction of the industry.","PeriodicalId":246116,"journal":{"name":"Softw. Microsystems","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1983-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127921697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In recent years, great interest has developed in the possibilities for using computer vision systems in a variety of industrial applications. These range from complex inspection or monitoring tasks to supplying precise position and orientation information for part feeders or robotic manipulators. The paper describes the work being done at the GEC Hirst Research Centre to develop a modular vision system with its own structured interpretive language. Such a system will provide an excellent tool for building and programming industrial vision systems. The vision system has been incorporated into a robot workcell, and an experiment is described which demonstrates the use of several co-operating processors to perform a simple assembly task
{"title":"Computer vision for industrial applications","authors":"J. A. Losty, P. R. Watkins","doi":"10.1049/sm.1983.0048","DOIUrl":"https://doi.org/10.1049/sm.1983.0048","url":null,"abstract":"In recent years, great interest has developed in the possibilities for using computer vision systems in a variety of industrial applications. These range from complex inspection or monitoring tasks to supplying precise position and orientation information for part feeders or robotic manipulators. The paper describes the work being done at the GEC Hirst Research Centre to develop a modular vision system with its own structured interpretive language. Such a system will provide an excellent tool for building and programming industrial vision systems. The vision system has been incorporated into a robot workcell, and an experiment is described which demonstrates the use of several co-operating processors to perform a simple assembly task","PeriodicalId":246116,"journal":{"name":"Softw. Microsystems","volume":"134 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1983-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123223670","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A communications system for use in distributed computer control schemes is described. The requirements of such a system include data integrity, computer and data highway fault tolerance and the ability to insert or remove computers on-line. The performance of other communications systems in these respects is considered. The present scheme employs a broadcast serial double ring structure with equal access for all computers. Data are transmitted asynchronously in blocks with cyclic redundancy checking. Automatic reconfiguration takes place in the event of link failures, and the system recovers to the full double ring structure when links are repaired. The ring may be deliberately broken and computers inserted or removed on-line. The system has been developed and tested using S100-Bus microcomputers and the software has been written mainly in Fortran
{"title":"A self-reconfiguring communications ring for distributed computer control schemes","authors":"H. Davie, A. Halley","doi":"10.1049/sm.1983.0045","DOIUrl":"https://doi.org/10.1049/sm.1983.0045","url":null,"abstract":"A communications system for use in distributed computer control schemes is described. The requirements of such a system include data integrity, computer and data highway fault tolerance and the ability to insert or remove computers on-line. The performance of other communications systems in these respects is considered. The present scheme employs a broadcast serial double ring structure with equal access for all computers. Data are transmitted asynchronously in blocks with cyclic redundancy checking. Automatic reconfiguration takes place in the event of link failures, and the system recovers to the full double ring structure when links are repaired. The ring may be deliberately broken and computers inserted or removed on-line. The system has been developed and tested using S100-Bus microcomputers and the software has been written mainly in Fortran","PeriodicalId":246116,"journal":{"name":"Softw. Microsystems","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1983-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124335248","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The design of a low-cost microprocessor-based real-time image acquisition and processing system is presented. The design criteria of a real-time imaging module (RIM) and of the resulting processing system on a suitable host are separately discussed. This system accepts a standard video signal and converts it into 128 × 128 pixels at a rate of 50 frames per second. Simultaneous display of the digitised picture is provided. The RIM adopts a shared-memory approach to cope with the speed requirements, thus allowing the system to process both static and dynamic pictures in time-critical environments. It is inexpensive and easily adaptable to different hosts. A sufficient software library has been developed on a host, the EXORCISER, and two applications have been conducted on the system. To facilitate algorithm development, sampled pictures can be up-loaded to a more powerful system, the EXORMACS, which allows the evaluation of recognition algorithms
{"title":"A low-cost real-time imaging and processing system","authors":"H. F. Li, C. Tsang, Y. Cheung","doi":"10.1049/sm.1983.0047","DOIUrl":"https://doi.org/10.1049/sm.1983.0047","url":null,"abstract":"The design of a low-cost microprocessor-based real-time image acquisition and processing system is presented. The design criteria of a real-time imaging module (RIM) and of the resulting processing system on a suitable host are separately discussed. This system accepts a standard video signal and converts it into 128 × 128 pixels at a rate of 50 frames per second. Simultaneous display of the digitised picture is provided. The RIM adopts a shared-memory approach to cope with the speed requirements, thus allowing the system to process both static and dynamic pictures in time-critical environments. It is inexpensive and easily adaptable to different hosts. A sufficient software library has been developed on a host, the EXORCISER, and two applications have been conducted on the system. To facilitate algorithm development, sampled pictures can be up-loaded to a more powerful system, the EXORMACS, which allows the evaluation of recognition algorithms","PeriodicalId":246116,"journal":{"name":"Softw. Microsystems","volume":"46 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1983-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113970967","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The development of a multi-microprocessor system suitable for the automatic control of a railway locomotive is described. The technique of time redundancy is used to reduce the amount of hardware to a minimum and to provide transient fault detection and error correction. The software controlling input/output is separated from the main application programs and is integral with the error checking system software. In this way, the probability of incorrect outputs is considerably reduced when working in an environment likely to cause transient faults. Finally, a duplex Cyclone arrangement is proposed to meet requirements for single-hard-fault tolerance
{"title":"Cyclone I: A self-checking control-oriented multiprocessor","authors":"W. G. Marshall, W. Forsythe","doi":"10.1049/sm.1983.0041","DOIUrl":"https://doi.org/10.1049/sm.1983.0041","url":null,"abstract":"The development of a multi-microprocessor system suitable for the automatic control of a railway locomotive is described. The technique of time redundancy is used to reduce the amount of hardware to a minimum and to provide transient fault detection and error correction. The software controlling input/output is separated from the main application programs and is integral with the error checking system software. In this way, the probability of incorrect outputs is considerably reduced when working in an environment likely to cause transient faults. Finally, a duplex Cyclone arrangement is proposed to meet requirements for single-hard-fault tolerance","PeriodicalId":246116,"journal":{"name":"Softw. Microsystems","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1983-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130051056","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The concept of the digital differential analyser can be applied directly to programs for the Intel 2920 for the solution of differential equations. The technique is particularly useful where this solution is an analogue function which needs to be generated. One example quoted is that of sinusoidal generation. Error analysis and program correctness proofs are not considered in the paper
{"title":"Algorithms of the digital differential analyser genus implemented on an Intel 2920 signal processor","authors":"D. Fay","doi":"10.1049/sm.1983.0039","DOIUrl":"https://doi.org/10.1049/sm.1983.0039","url":null,"abstract":"The concept of the digital differential analyser can be applied directly to programs for the Intel 2920 for the solution of differential equations. The technique is particularly useful where this solution is an analogue function which needs to be generated. One example quoted is that of sinusoidal generation. Error analysis and program correctness proofs are not considered in the paper","PeriodicalId":246116,"journal":{"name":"Softw. Microsystems","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1983-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114885419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The term ‘local network’ first began to appear in print as long as ten years ago. In the second half of the 1970s there was a great deal of interest in techniques for implementing this type of network, namely to link together computers over a restricted area at low cost and at high data rates. It is now becoming apparent that two local network architectures in particular will become internationally the most prominent: these are the Ethernet and the token ring, both backed by US and European standards bodies and by competing and large industrial interests. A token bus is also being adopted for standardisation but seems likely to be in a somewhat secondary role. In the UK the Cambridge Ring, a slotted ring architecture, has made its own impact, but its future appears limited in a wider context. Nevertheless a large research and development effort is associated with the Cambridge Ring and has resulted in a set of UK local networking standards. The purpose of the paper is to give an introduction to each of these local area network structures, particularly by means of their associated standards. A comprehensive list of references is provided as a basis for further reading into the subject
{"title":"Local area networks: an introduction","authors":"D. Hutchison","doi":"10.1049/sm.1983.0036","DOIUrl":"https://doi.org/10.1049/sm.1983.0036","url":null,"abstract":"The term ‘local network’ first began to appear in print as long as ten years ago. In the second half of the 1970s there was a great deal of interest in techniques for implementing this type of network, namely to link together computers over a restricted area at low cost and at high data rates. It is now becoming apparent that two local network architectures in particular will become internationally the most prominent: these are the Ethernet and the token ring, both backed by US and European standards bodies and by competing and large industrial interests. A token bus is also being adopted for standardisation but seems likely to be in a somewhat secondary role. In the UK the Cambridge Ring, a slotted ring architecture, has made its own impact, but its future appears limited in a wider context. Nevertheless a large research and development effort is associated with the Cambridge Ring and has resulted in a set of UK local networking standards. The purpose of the paper is to give an introduction to each of these local area network structures, particularly by means of their associated standards. A comprehensive list of references is provided as a basis for further reading into the subject","PeriodicalId":246116,"journal":{"name":"Softw. Microsystems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1983-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130766433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The paper describes the design philosophy and development of a digital frame store for use with scanning microscopes. The motivation behind this was the need to provide a reliable high-quality image display, while taking advantage of the powerful electronic echniques for image storage and processing. The speed of scanning, image size and the need for a general-purpose instrument that could be used without programming knowledge precluded the use of a standard microprocessor system. From its original conception as a storage tube replacement, a computer interface was an integral part of the design. This, along with the modular design approach, has enabled the authors to extend and to enhance the system to include real-time grey-scale enhancement and false-colour processing options, while maintaining the low cost and simplicity of use of the basic system
{"title":"Digital image storage and processing for scanning microscopy","authors":"N. J. Burton, F. Pino","doi":"10.1049/sm.1983.0025","DOIUrl":"https://doi.org/10.1049/sm.1983.0025","url":null,"abstract":"The paper describes the design philosophy and development of a digital frame store for use with scanning microscopes. The motivation behind this was the need to provide a reliable high-quality image display, while taking advantage of the powerful electronic echniques for image storage and processing. The speed of scanning, image size and the need for a general-purpose instrument that could be used without programming knowledge precluded the use of a standard microprocessor system. From its original conception as a storage tube replacement, a computer interface was an integral part of the design. This, along with the modular design approach, has enabled the authors to extend and to enhance the system to include real-time grey-scale enhancement and false-colour processing options, while maintaining the low cost and simplicity of use of the basic system","PeriodicalId":246116,"journal":{"name":"Softw. Microsystems","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1983-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128168454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Technology has made it possible to create huge numbers of single-chip computers at low cost. Because declarative languages allow parallel evaluation in a natural manner, one attractive possibility for novel architects is to `buy speed? from recent technology by organising large numbers of chips to work in concert on the evaluation of a single declarative program. Following a brief introduction to the field of `declarative architectures?, some of the central issues are developed, and various novel architectures are discussed using a new classification based on the way work is distributed. The conclusion is that, even if the more extreme claims for `buying speed? from VLSI for declarative languages fail to materialise, `super von Neumann? implementations will make the new languages practicable very soon
{"title":"Novel architectures for declarative languages","authors":"R. Kennaway, M. Sleep","doi":"10.1049/sm.1983.0024","DOIUrl":"https://doi.org/10.1049/sm.1983.0024","url":null,"abstract":"Technology has made it possible to create huge numbers of single-chip computers at low cost. Because declarative languages allow parallel evaluation in a natural manner, one attractive possibility for novel architects is to `buy speed? from recent technology by organising large numbers of chips to work in concert on the evaluation of a single declarative program. Following a brief introduction to the field of `declarative architectures?, some of the central issues are developed, and various novel architectures are discussed using a new classification based on the way work is distributed. The conclusion is that, even if the more extreme claims for `buying speed? from VLSI for declarative languages fail to materialise, `super von Neumann? implementations will make the new languages practicable very soon","PeriodicalId":246116,"journal":{"name":"Softw. Microsystems","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1983-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127248238","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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