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2019 IEEE International Workshop on Signal Processing Systems (SiPS)最新文献

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A Novel Approach to Angle-of-Arrival Estimation Based on Layered Ensemble Learning 一种基于分层集成学习的到达角估计方法
Pub Date : 2019-10-01 DOI: 10.1109/SiPS47522.2019.9020316
Rui Li, Tingqiang Deng, Yongming Huang, Chuan Zhang, Luxi Yang
Hybrid beamforming is a promising solution for multiple-input multiple-output (MIMO) systems with large scale antennas due to its low-cost and good performance compared with pure digital and analog beamforming. Unfortunately, conventional angle-of-arrival (AoA) estimation methods, such as MUSIC and ESPRIT algorithms, need a lot of calculations and must solve the issue of phase ambiguity. Therefore, this paper proposes a novel AoA estimation method based on layered ensemble learning. Because the training process can be completed off-line, only estimating complexity is taken into account which make the AoA detection process low complexity and meet real-time requirements. The simulation results indicate that the accuracy of the proposed AOA estimation method is higher than that of traditional algorithms. In addition, our proposed method is robust to the phase error.
混合波束形成相对于纯数字波束形成和模拟波束形成具有成本低、性能好等优点,是一种很有前途的大规模天线多输入多输出(MIMO)系统解决方案。然而,传统的到达角(AoA)估计方法,如MUSIC和ESPRIT算法,需要大量的计算,并且必须解决相位模糊问题。为此,本文提出了一种基于分层集成学习的AoA估计方法。由于训练过程可以离线完成,因此只考虑估计复杂度,使得AoA检测过程的复杂度较低,满足实时性要求。仿真结果表明,所提出的AOA估计方法的精度高于传统算法。此外,该方法对相位误差具有较强的鲁棒性。
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引用次数: 0
Dynamic Reconfigurable PUFs Based on FPGA 基于FPGA的动态可重构puf
Pub Date : 2019-10-01 DOI: 10.1109/SiPS47522.2019.9020444
Yijun Cui, Chenghua Wang, Yunpeng Chen, Ziwei Wei, Mengxian Chen, Weiqiang Liu
Physical unclonable function (PUF) is a promising security primitive. Configurable ring oscillator (CRO) PUF is an evolvement of conventional RO PUF, which improves the entropy and decrease the hardware cost by introducing configurability. Compared with other types of PUF structures, CRO PUFs are FPGA friendly. In this paper, a dynamic reconfigurable mechanism is proposed for the CRO PUF in FPGA implementation. Three different CRO PUFs are implemented using the proposed reconfigurable method and each CRO can be implemented in a single configurable logic block (CLB) of FPGA. Based on the partial reconFigure functions provided by Xilinx FPGAs, the PUF structures can be configured to any of the three PUF structures. The experimental results show that the dynamic reconfigurable PUF structure has a higher hardware efficiency, reliability and stability compared with the previous works.
物理不可克隆函数(PUF)是一种很有前途的安全原语。可配置环振(CRO) PUF是传统RO PUF的发展,通过引入可配置性,提高了熵值,降低了硬件成本。与其他类型的PUF结构相比,CRO PUF对FPGA友好。本文提出了一种基于FPGA实现的CRO PUF动态可重构机制。采用所提出的可重构方法实现了3个不同的CRO puf,每个CRO都可以在FPGA的单个可配置逻辑块(CLB)中实现。基于Xilinx fpga提供的部分reconFigure功能,PUF结构可以配置为三种PUF结构中的任何一种。实验结果表明,动态可重构PUF结构与以往的工作相比,具有更高的硬件效率、可靠性和稳定性。
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引用次数: 2
EAGLE: Exploiting Essential Address in Both Weight and Activation to Accelerate CNN Computing EAGLE:利用权重和激活中的基本地址加速CNN计算
Pub Date : 2019-10-01 DOI: 10.1109/SiPS47522.2019.9020555
Wenjian Liu, Xiayuan Wen, Jun Lin, Zhongfeng Wang, L. Du
Efficient quantization techniques can compress Convolutional Neural Networks (CNNs) with less bit-width while maintaining the accuracy on large extent. However, the quantized CNN models hardly boost the computation performance of CNN accelerators with the conventional bit-parallel Multiply-Accumulate (MAC) operations. Previous works proposed a shifting-based bit-serial operation, which can be called as Shift-Accumulate (SAC) operation, to take advantage of the reduced bit-width. However, it is also found that there are many invalid computations in both MAC and SAC operation, caused by zero bits in activations and weights, which are not optimized. To fully exploit the computations in CNN models, we proposed a Essen-tial Address only GAC based Low-latency Efficient (EAGLE) architecture that can further accelerate the CNN computation through bypassing zero bits computation in the activations and weights. An essential address is adopted to encode the nonzero bits in activations and weights in this architecture. Furthermore, to support the essential address-only computations, Generate-Accumulate (GAC), an operation which produces partial sums with essential addresses, is implemented. The architecture is implemented with a TSMC 28nm CMOS technology. Based on the results, if scaled in a 65nm technology, the EAGLE only requires 63.6% area and 43.1% power consumption compare to that of the Pragmatic. The EAGLE reaches an average speedup of $ 2.08times$ and $ 1.43times$ on six CNN models over the Stripe and Pragmatic at a similar frequency, respectively. It also improves energy efficiency by $ 3.69times$ on average over the DaDianNao baseline.
有效的量化技术可以在较小的位宽下压缩卷积神经网络,同时在很大程度上保持卷积神经网络的精度。然而,使用传统的位并行乘法累加(MAC)操作,量化的CNN模型很难提高CNN加速器的计算性能。先前的工作提出了一种基于移位的位串行操作,可称为移位累加(SAC)操作,以利用减小的位宽度。然而,我们也发现在MAC和SAC操作中都存在许多无效的计算,这是由于激活和权重中的零比特导致的,没有得到优化。为了充分利用CNN模型中的计算,我们提出了一种基于基本地址GAC的低延迟高效(EAGLE)架构,通过绕过激活和权重中的零比特计算,进一步加速CNN的计算。该结构采用一个基本地址对激活和权值中的非零位进行编码。此外,为了支持基本地址计算,实现了生成-累加(GAC)操作,该操作产生具有基本地址的部分和。该架构采用台积电28纳米CMOS技术实现。结果显示,如果采用65nm工艺,EAGLE的面积和功耗仅为Pragmatic的63.6%和43.1%。在相似的频率下,EAGLE在六种CNN模型上的平均加速分别达到2.08美元和1.43美元。它还将能源效率平均提高了3.69美元,是大电菜鸟的基准。
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引用次数: 0
A Root-RARE Algorithm for DOA Estimation with Partly Calibrated Uniform Linear Arrays 部分校准均匀线性阵列的方位估计的根-稀有算法
Pub Date : 2019-10-01 DOI: 10.1109/SiPS47522.2019.9020315
Zhongchi Fang, Zheng Cao, Lan Wang
The rank-reduction (RARE) algorithm is a well-known class of algorithms for direction of arrival (DOA) es-timation in the presence of imperfect array manifolds. Since the spectral peak search is inevitable for the current RARE algorithm, it may bring a huge occupational load for practical implementations. In order to reduce the computational com-plexity, in this paper, we propose a root-RARE algorithm for DOA estimation with partly calibrated uniform linear arrays (ULAs). Through replacing the spectral peak search with a polynomial root finding, our proposed method can get much higher efficiency than the original RARE method. Simulation results demonstrate that our method can significantly reduce the computational complexity and improve the DOA estimation performance in a low SNR case.
秩约简(RARE)算法是一类著名的不完全阵列流形下的到达方向(DOA)估计算法。由于目前的RARE算法不可避免地要进行谱峰搜索,这可能会给实际实现带来巨大的职业负荷。为了降低计算复杂度,本文提出了一种基于部分校准均匀线性阵列(ula)的DOA估计的根-稀有算法。通过将谱峰搜索替换为多项式寻根,可以获得比原始RARE方法更高的效率。仿真结果表明,在低信噪比情况下,该方法可以显著降低计算复杂度,提高DOA估计性能。
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引用次数: 0
Autonomous UAV with Learned Trajectory Generation and Control 基于学习轨迹生成与控制的自主无人机
Pub Date : 2019-10-01 DOI: 10.1109/SiPS47522.2019.9020508
Yilan Li, Mingyang Li, A. Sanyal, Yanzhi Wang, Qinru Qiu
Unmanned aerial vehicle (UAV) technology is a rapidly growing field with tremendous opportunities for research and applications. To achieve true autonomy for UAVs in the absence of remote control, external navigation aids like global navigation satellite systems and radar systems, a minimum energy trajectory planning that considers obstacle avoidance and stability control will be the key. Although this can be formulated as a constrained optimization problem, due to the complicated non-linear relationships between UAV trajectory and thrust control, it is almost impossible to be solved analytically. While deep reinforcement learning is known for its ability to provide model free optimization for complex system through learning, its state space, actions and reward functions must be designed carefully. This paper presents our vision of different layers of autonomy in a UAV system, and our effort in generating and tracking the trajectory both using deep reinforcement learning (DRL). The experimental results show that compared to conventional approaches, the learned trajectory will need 20% less control thrust and 18% less time to reach the target. Furthermore, using the control policy learning by DRL, the UAV will achieve 58.14% less position error and 21.77% less system power.
无人机(UAV)技术是一个快速发展的领域,具有巨大的研究和应用机会。要在没有远程控制、全球导航卫星系统和雷达系统等外部导航辅助设备的情况下实现无人机的真正自主,考虑避障和稳定控制的最小能量轨迹规划将是关键。虽然可以将其表述为约束优化问题,但由于无人机轨迹与推力控制之间存在复杂的非线性关系,几乎不可能解析求解。虽然深度强化学习以其通过学习为复杂系统提供无模型优化的能力而闻名,但它的状态空间、动作和奖励函数必须精心设计。本文介绍了我们对无人机系统中不同层次自治的看法,以及我们在使用深度强化学习(DRL)生成和跟踪轨迹方面所做的努力。实验结果表明,与传统方法相比,学习轨迹到达目标所需的控制推力减少20%,到达目标所需的时间减少18%。此外,利用DRL控制策略学习,无人机的位置误差降低58.14%,系统功耗降低21.77%。
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引用次数: 2
Flexible and Simplified Multi-bit Successive-Cancellation List Decoding for Polar Codes 灵活简化的多比特逐次消去列表极地码译码
Pub Date : 2019-10-01 DOI: 10.1109/SiPS47522.2019.9020375
Haojing Hu, Rongke Liu, Baoping Feng
Polar codes, as the first channel code that can provably achieve the channel capacity, have received increasing attention these years. However, in practical application, the decoding of polar codes still has many aspects that need improvement. One of the key bottlenecks of polar codes decoding is the high latency of SC (Successive Cancellation) -based decoding algorithms. As one of the solutions to this problem, many SCL (Successive Cancellation List) decoding algorithms with the multi-bit decision are proposed. Despite of the reduction of decoding latency, the complexity spent for computation and sort of path candidates of these algorithms has significantly increased in contrast with the conventional SCL algorithm. In this paper, we propose a novel SCL decoding algorithm with multi-bit decision for polar codes, named as Flexible and Simplified Multi-bit Successive Cancellation List (FSMSCL) decoding. The proposed algorithm further reduces the latency compared to other existing multi-bit decoding algorithms. On the other hand, we provide different path-splitting schemes for different code blocks to control the complexity of computation and sort of path metrics. In the analysis, the experiment results show that the proposed algorithm has similar FER performance compared to the conventional SCL algorithm but its decoding latency outperforms other peer decoding algorithms with multi-bit decision.
Polar码作为最早可以证明实现信道容量的信道码,近年来受到越来越多的关注。但是,在实际应用中,极性码的译码还有很多需要改进的地方。基于连续抵消(SC)译码算法的高延迟是极化码译码的关键瓶颈之一。作为解决这一问题的方法之一,提出了许多具有多比特判决的SCL译码算法。尽管减少了解码延迟,但与传统的SCL算法相比,这些算法的计算复杂度和候选路径排序明显增加。本文提出了一种新的具有多比特判决的极性码SCL译码算法,称为灵活简化的多比特连续取消列表(FSMSCL)译码。与现有的多比特译码算法相比,该算法进一步降低了延迟。另一方面,我们为不同的代码块提供了不同的路径分割方案,以控制计算的复杂性和路径度量的种类。在分析中,实验结果表明,该算法与传统的SCL算法相比具有相似的FER性能,但其解码延迟优于其他具有多比特判决的对等解码算法。
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引用次数: 2
Learning to Design Constellation for AWGN Channel Using Auto-Encoders 学习用自编码器设计AWGN信道星座
Pub Date : 2019-10-01 DOI: 10.1109/SiPS47522.2019.9020501
Qisheng Huang, Ming Jiang, Chunming Zhao
This paper proposes a novel constellation design in AWGN channel through learning based auto-encoder (AE). Additionally, this paper illustrates the reason why learning based constellation has better performance than the classical square-shaped QAM design by analyzing the Euclidean distance distribution and the bound of symbol error rate between learning designed symbols and other constellations. Moreover, the performance of learning based constellation will be compared to constellation based on convex optimization design. To solve the bit mapping problem of the learning based constellation, $Q-$ary LDPC encoding is applied to these specifically designed QAM modulation systems, where the soft decoding of $Q-$ary LDPC codes can be carried out with the symbol-level soft outputs of demodulation.
提出了一种基于学习的自编码器(AE)的AWGN信道星座设计方法。此外,本文还通过分析学习设计的星座与其他星座之间的欧氏距离分布和符号错误率的界限,说明了基于学习的星座比经典的方形QAM设计性能更好的原因。并将基于学习的星座与基于凸优化设计的星座进行性能比较。为了解决基于学习的星座的位映射问题,在这些专门设计的QAM调制系统中应用$Q-$任意LDPC编码,利用解调的符号级软输出对$Q-$任意LDPC码进行软解码。
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引用次数: 4
A Low-Complexity Error-and-Erasure Decoding Algorithm for t=2 RS Codes 一种t=2 RS码的低复杂度错擦译码算法
Pub Date : 2019-10-01 DOI: 10.1109/SiPS47522.2019.9020507
Zengchao Yan, Wenjie Li, Jun Lin, Zhongfeng Wang
Reed-Solomon (RS) codes are widely adopted in numerous digital communication systems to handle the possibly occurred errors and/or erasures during the data transmission. This paper focuses on the $t=2$ RS codes and proposes a low-complexity error-and-erasure decoding algorithm for them. The proposed algorithm directly computes the errata location polynomial instead of performing the iterative Berlekmap-Massey (BM) algorithm which is usually adopted in the conventional RS decoding algorithm. Moreover, a method to directly compute the errata locations and errata magnitudes is also presented. For a (255,251) RS code, the proposed error-and-erasure decoding algorithm can save over 90% multiplications and additions of the conventional decoding algorithm. In addition, the complexity reduction becomes more significant as code length increases.
RS码被广泛应用于许多数字通信系统中,用于处理数据传输过程中可能发生的错误和/或擦除。本文以$t=2$ RS码为研究对象,提出了一种低复杂度的纠错纠译码算法。该算法不采用传统RS译码算法中通常采用的迭代Berlekmap-Massey (BM)算法,而是直接计算勘误表定位多项式。此外,还提出了一种直接计算勘误点位置和勘误点震级的方法。对于(255,251)RS码,所提出的纠错译码算法比传统译码算法节省90%以上的乘法和加法。此外,随着代码长度的增加,复杂性的降低变得更加显著。
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引用次数: 3
An FMCW Ranging Method with Identification Ability 一种具有识别能力的FMCW测距方法
Pub Date : 2019-10-01 DOI: 10.1109/SiPS47522.2019.9020417
Meiqing Liu, Shang Ma, Boen Chi, Kai Long, Qiu Huang, Bixin Zhu
Frequency modulated continuous wave (FMCW) radar has been widely used and thoroughly studied in high precision ranging. However, FMCW radar cannot identify target type while ranging. To address this problem, this paper presents a high-precision ranging method based on FMCW, which enables the FMCW radar to identify target type while ranging. The proposed method improves the ranging accuracy by performing frequency sweep in a specific frequency range and realizes target identification through the orthogonal spread spectrum. The designed prototype verification system operates at a frequency of 5.8 GHz and the sweep bandwidth is 200 MHz. Exemplary experiment results are presented to illustrate that the system has a ranging accuracy of 20 cm and a range of up to 12 m in an indoor scenario. Furthermore, multiple user identification can also be realized.
调频连续波雷达(FMCW)在高精度测距中得到了广泛的应用和深入的研究。但是,FMCW雷达在测距时不能识别目标类型。针对这一问题,本文提出了一种基于FMCW的高精度测距方法,使FMCW雷达能够在测距时识别目标类型。该方法通过在特定频率范围内进行扫频来提高测距精度,并通过正交扩频实现目标识别。设计的样机验证系统工作频率为5.8 GHz,扫描带宽为200 MHz。实验结果表明,该系统在室内环境下的测距精度可达20 cm,测距距离可达12 m。此外,还可以实现多用户身份识别。
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引用次数: 2
SiPS 2019 Message SiPS 2019信息
Pub Date : 2019-10-01 DOI: 10.1109/sips47522.2019.9020633
{"title":"SiPS 2019 Message","authors":"","doi":"10.1109/sips47522.2019.9020633","DOIUrl":"https://doi.org/10.1109/sips47522.2019.9020633","url":null,"abstract":"","PeriodicalId":256971,"journal":{"name":"2019 IEEE International Workshop on Signal Processing Systems (SiPS)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134212880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
期刊
2019 IEEE International Workshop on Signal Processing Systems (SiPS)
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