This paper traces the evolution of packet switches which employ an arrangement of multiple simultaneous paths, typically called 'switch fabrics'. These space-division packet switches represent recent advances in fast packet technology. Such switches offer reduced delay and increased throughput to satisfy the requirement of more bandwidth per user and of larger switch dimensions which can not be satisfied with reasonably sized packet switches employing the time-division multiplexing principle as in shared bus or ring structures. We trace the evolution of space-division packet switches by discussing, among others, Banyan networks and various variations, the packet-synchronous networks of the Balcher-Banyan type, and a packet-asynchronous approach with multiple alternate routes. These and other fabrics and the switches built using them are contrasted in terms of the capabilities of their most recent versions, including buffering techniques, types of data handled, feasibility of physical implementation and compatibility with proposed standards and protocols.
{"title":"The evolution of space division packet switches","authors":"G. Luderer, S. Knauer","doi":"10.1109/ISS.1990.765834","DOIUrl":"https://doi.org/10.1109/ISS.1990.765834","url":null,"abstract":"This paper traces the evolution of packet switches which employ an arrangement of multiple simultaneous paths, typically called 'switch fabrics'. These space-division packet switches represent recent advances in fast packet technology. Such switches offer reduced delay and increased throughput to satisfy the requirement of more bandwidth per user and of larger switch dimensions which can not be satisfied with reasonably sized packet switches employing the time-division multiplexing principle as in shared bus or ring structures. We trace the evolution of space-division packet switches by discussing, among others, Banyan networks and various variations, the packet-synchronous networks of the Balcher-Banyan type, and a packet-asynchronous approach with multiple alternate routes. These and other fabrics and the switches built using them are contrasted in terms of the capabilities of their most recent versions, including buffering techniques, types of data handled, feasibility of physical implementation and compatibility with proposed standards and protocols.","PeriodicalId":277204,"journal":{"name":"International Symposium on Switching","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128003745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper describes architecture enhancement of the FETEX-150 digital switching system for central office use. The functions provided by central office switch is increasing year by year and enhancement of processing capability is indispensable. Current FETEX-150 architecture is distributed control with three types of processors, namely Main Processor (MPR), Call Processor (CPR) and Line Processor (LPR). In addition various peripheral processors are used. The programs of peripheral processors are downloaded from MPR/CPR/LPR. The software architecture of FETEX-150 is 'hypothetical independent exchange method' which prevents the failure of one processor to propagate to other processors. In order to realize powerful processing capability with high flexibility, multiprocessor ring bus is under development. Optic fiber cable with 100 Mb/s is used and maximum 64 processor pairs can be connected to the bus. FDDI protocol is adopted for Layers 1 and 2 and higher layers are based on OSI. Using this multiprocessor ring bus, various subsystems will be introduced, e.g. Broadband ISDN subsystem Application Processors, etc.
{"title":"Architecture enhancement of digital switching system","authors":"Y. Fujiyama, H. Masuda, K. Mano","doi":"10.1109/ISS.1990.765835","DOIUrl":"https://doi.org/10.1109/ISS.1990.765835","url":null,"abstract":"This paper describes architecture enhancement of the FETEX-150 digital switching system for central office use. The functions provided by central office switch is increasing year by year and enhancement of processing capability is indispensable. Current FETEX-150 architecture is distributed control with three types of processors, namely Main Processor (MPR), Call Processor (CPR) and Line Processor (LPR). In addition various peripheral processors are used. The programs of peripheral processors are downloaded from MPR/CPR/LPR. The software architecture of FETEX-150 is 'hypothetical independent exchange method' which prevents the failure of one processor to propagate to other processors. In order to realize powerful processing capability with high flexibility, multiprocessor ring bus is under development. Optic fiber cable with 100 Mb/s is used and maximum 64 processor pairs can be connected to the bus. FDDI protocol is adopted for Layers 1 and 2 and higher layers are based on OSI. Using this multiprocessor ring bus, various subsystems will be introduced, e.g. Broadband ISDN subsystem Application Processors, etc.","PeriodicalId":277204,"journal":{"name":"International Symposium on Switching","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127856343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ericsson's Traffic Management System (TMS) embodies the basic principles and much of the functionality of the future widespread implementation of an advanced Intelligent Network (AIN). TMS introduces AIN concepts into the existing telephony network, thus giving service providers an immediate revenue-enhancing tool as well as a real-world proving ground for AIN principles. The first TMS release begins commercial service in 1990.
{"title":"Implementing ain concepts in an existing switching system","authors":"L. Davidson, E. Valentine","doi":"10.1109/ISS.1990.765821","DOIUrl":"https://doi.org/10.1109/ISS.1990.765821","url":null,"abstract":"Ericsson's Traffic Management System (TMS) embodies the basic principles and much of the functionality of the future widespread implementation of an advanced Intelligent Network (AIN). TMS introduces AIN concepts into the existing telephony network, thus giving service providers an immediate revenue-enhancing tool as well as a real-world proving ground for AIN principles. The first TMS release begins commercial service in 1990.","PeriodicalId":277204,"journal":{"name":"International Symposium on Switching","volume":"444 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132965937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper studies an efficient load regulation scheme for the French Intelligent Network, where an intelligent node called Point de Commande des Services or 'PCS' is able to centralize service logic and service data. The PCS, of limited capacity is accessed by exchanges (Commutateur d'Acces aux Services or CAS) via the SS7 network. The unavoidable collapsing effects appear as soon as this capacity is exceeded. Two variants of a regulation algorithm are proposed and their performances are presented. Both are shown to behave satisfactorily, with a slight advantage to the so-called 'Random Admittance' scheme. The comparison uses non-stationary input and non-Poisson traffics, since these situations will be quite common in case of overload.
本文研究了一种适用于法国智能网的高效负载调节方案，其中一个称为服务指挥点(Point de Commande des Services，简称PCS)的智能节点能够集中服务逻辑和服务数据。容量有限的pc机通过SS7网络由交换机(CAS)接入。一旦超过这个容量，不可避免的崩溃效应就会出现。提出了一种调节算法的两种变体，并给出了它们的性能。两者都表现得令人满意，比所谓的“随机导纳”方案略胜一筹。比较使用非平稳输入和非泊松流量，因为这些情况在过载情况下很常见。
{"title":"Load regulation schemes for the intelligent network","authors":"S. Hebuterne, L. Romoeuf, R. Kung","doi":"10.1109/ISS.1990.765825","DOIUrl":"https://doi.org/10.1109/ISS.1990.765825","url":null,"abstract":"This paper studies an efficient load regulation scheme for the French Intelligent Network, where an intelligent node called Point de Commande des Services or 'PCS' is able to centralize service logic and service data. The PCS, of limited capacity is accessed by exchanges (Commutateur d'Acces aux Services or CAS) via the SS7 network. The unavoidable collapsing effects appear as soon as this capacity is exceeded. Two variants of a regulation algorithm are proposed and their performances are presented. Both are shown to behave satisfactorily, with a slight advantage to the so-called 'Random Admittance' scheme. The comparison uses non-stationary input and non-Poisson traffics, since these situations will be quite common in case of overload.","PeriodicalId":277204,"journal":{"name":"International Symposium on Switching","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127186868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Schicker, R. Salz, O. Huber, J. Matheis, S. Ng, H. Patel
Public packet switching services are widely available today. These services are offered on Packet Switch Public Data Networks (PSPDNs) and are based on Recommendation X.25, the mature standards developed by the International Telegraph and Telephone Consultative Committee (CCITT). The access procedures for supporting X.25 packet services on Integrated Services Digital Network (ISDN) are specified in CCITT Recommendation X.31. This paper describes the attributes of a Packet Handler Interface (PHI). The PHI links the ISDM exchange with a Packet Handler (PH) function that resides on the PSPDN which supports X.31 packet services for ISDN users.
{"title":"A new isdn packet handler interface","authors":"P. Schicker, R. Salz, O. Huber, J. Matheis, S. Ng, H. Patel","doi":"10.1109/ISS.1990.765829","DOIUrl":"https://doi.org/10.1109/ISS.1990.765829","url":null,"abstract":"Public packet switching services are widely available today. These services are offered on Packet Switch Public Data Networks (PSPDNs) and are based on Recommendation X.25, the mature standards developed by the International Telegraph and Telephone Consultative Committee (CCITT). The access procedures for supporting X.25 packet services on Integrated Services Digital Network (ISDN) are specified in CCITT Recommendation X.31. This paper describes the attributes of a Packet Handler Interface (PHI). The PHI links the ISDM exchange with a Packet Handler (PH) function that resides on the PSPDN which supports X.31 packet services for ISDN users.","PeriodicalId":277204,"journal":{"name":"International Symposium on Switching","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126057896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Koinuma, T. Takahashi, H. Yamada, S. Hino, M. Hirano
An ATM switching system architecture is presented which employs distributed control to cope with diversified requirements. ATM switching system is expected to efficiently and flexibly handle multimedia traffic, therefore traffic control architecture is one of the most crucial issues for ATM switching systems. The requirements, architectural concept and construction scheme of two important technologies, self-routing switches and quality control of statistical switching, are discussed. A switch fabric, which provides a unified inter-module inter face, switches and distributes cells between modules. It gives very stable switching performance under an arbitrary flow environment without centralized resource management. A three-layerd traffic control model is also presented which consists of cell transfer level, call control level and network control level. Control functions of each level and the interfaces among them are considered, then cell transfer level control schemes and their performances are discussed, including marking scheme for policing control and the effect of burstiness. Laboratory experiment system is designed and implemented to confirm the feasibility of the ATM switching system architecture concept. The system employs a VLSI memory switch with dynamic link speed control as an element of the self-routing switch fabric, achieving the capacity of 256 I55Mb/s lines. It also realizes efficient statistical switching functions such as policing control, multiplexing and quality control for multiple transport quality classes.
{"title":"An atm switching system based on a distributed control architecture","authors":"T. Koinuma, T. Takahashi, H. Yamada, S. Hino, M. Hirano","doi":"10.1109/ISS.1990.765802","DOIUrl":"https://doi.org/10.1109/ISS.1990.765802","url":null,"abstract":"An ATM switching system architecture is presented which employs distributed control to cope with diversified requirements. ATM switching system is expected to efficiently and flexibly handle multimedia traffic, therefore traffic control architecture is one of the most crucial issues for ATM switching systems. The requirements, architectural concept and construction scheme of two important technologies, self-routing switches and quality control of statistical switching, are discussed. A switch fabric, which provides a unified inter-module inter face, switches and distributes cells between modules. It gives very stable switching performance under an arbitrary flow environment without centralized resource management. A three-layerd traffic control model is also presented which consists of cell transfer level, call control level and network control level. Control functions of each level and the interfaces among them are considered, then cell transfer level control schemes and their performances are discussed, including marking scheme for policing control and the effect of burstiness. Laboratory experiment system is designed and implemented to confirm the feasibility of the ATM switching system architecture concept. The system employs a VLSI memory switch with dynamic link speed control as an element of the self-routing switch fabric, achieving the capacity of 256 I55Mb/s lines. It also realizes efficient statistical switching functions such as policing control, multiplexing and quality control for multiple transport quality classes.","PeriodicalId":277204,"journal":{"name":"International Symposium on Switching","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129890628","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Moerkerken, R. Maltha, D. M. Potieny, J.R. Williams
Beginning in 1985, the 5ESS-PRX switch has seen major deployment in the Dutch Network. By mid 1989, over 30 offices were operational, with close to 500,000 lines and 400,000 trunks in rural and metropolitan applications. Firstly this paper addresses the network aspects of the deployment: the network characteristics of the system as originally introduced, the evolution of the network in which it is deployed and the adaptations to the networking requirements of the Dutch network Secondly an overview is given of the characteristics of the system as it is today. Typical configurations in the Netherlands environment are also discussed, showing how the flexibility of a distributed architecture is used to advantage. Finally an operational characterization of the system's performance is given in terms of failure rates, down-times, and similar parameters.
{"title":"Experiences with the 5ess-prx switch in the dutch public network","authors":"H. Moerkerken, R. Maltha, D. M. Potieny, J.R. Williams","doi":"10.1109/ISS.1990.765812","DOIUrl":"https://doi.org/10.1109/ISS.1990.765812","url":null,"abstract":"Beginning in 1985, the 5ESS-PRX switch has seen major deployment in the Dutch Network. By mid 1989, over 30 offices were operational, with close to 500,000 lines and 400,000 trunks in rural and metropolitan applications. Firstly this paper addresses the network aspects of the deployment: the network characteristics of the system as originally introduced, the evolution of the network in which it is deployed and the adaptations to the networking requirements of the Dutch network Secondly an overview is given of the characteristics of the system as it is today. Typical configurations in the Netherlands environment are also discussed, showing how the flexibility of a distributed architecture is used to advantage. Finally an operational characterization of the system's performance is given in terms of failure rates, down-times, and similar parameters.","PeriodicalId":277204,"journal":{"name":"International Symposium on Switching","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126349103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Henrion, K. Schrodi, D. Boettle, M. de Somer, M. Dieudonné
Being the communication core of future broadband products, the ATM based switching network architecture must comply with a challenging set of future safe requirements and objectives, which are tentatively defined first. After some period of research work, a number of different solutions for fast packet switching or ATM switching are still proposed. It is thus interesting to discuss the respective attributes of key architecture options for asynchronous switch fabrics. As an illustration, the paper then describes a new ATM based switching architecture for asynchronous communications based on the advantageous combination of a multiple-path self-routing principle with an internal transfer mode using multi-slot cells. These principles are the foundation for a flexible and fault tolerant switching network configuration built with two Weis of standard switching components: the Switch Module board equivalent to a 128 x 128 single-stage matrix operating at 150 Mbit/s, and the Integrated Switching Element LSI circuit realizing an elementary, fully featured, 32 x 32 switching matrix.
{"title":"Switching network architecture for atm based broadband communications","authors":"M. Henrion, K. Schrodi, D. Boettle, M. de Somer, M. Dieudonné","doi":"10.1109/ISS.1990.765799","DOIUrl":"https://doi.org/10.1109/ISS.1990.765799","url":null,"abstract":"Being the communication core of future broadband products, the ATM based switching network architecture must comply with a challenging set of future safe requirements and objectives, which are tentatively defined first. After some period of research work, a number of different solutions for fast packet switching or ATM switching are still proposed. It is thus interesting to discuss the respective attributes of key architecture options for asynchronous switch fabrics. As an illustration, the paper then describes a new ATM based switching architecture for asynchronous communications based on the advantageous combination of a multiple-path self-routing principle with an internal transfer mode using multi-slot cells. These principles are the foundation for a flexible and fault tolerant switching network configuration built with two Weis of standard switching components: the Switch Module board equivalent to a 128 x 128 single-stage matrix operating at 150 Mbit/s, and the Integrated Switching Element LSI circuit realizing an elementary, fully featured, 32 x 32 switching matrix.","PeriodicalId":277204,"journal":{"name":"International Symposium on Switching","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116271573","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
ATM networks have been proposed by CCITT as the solution for future lntegrated Broadband Communication Networks. They provide a high flexibility with regard to varying bandwidth requirements for different services as well as the momentary bitrate within a connection (bitrale on demand). For the network operator this results in a need to control the individual connections in order to ensure an acceptable quality of service for all existing connections by means of a so called policing or source monitoring junction. In this paper, some basic aspects of this function including the dimensioning of its parameters are addressed using the 'Leaky Bucket' mechanism as an example.
{"title":"The poucing function in atm networks","authors":"E. Rathgeb, T. Theimer","doi":"10.1109/ISS.1990.765819","DOIUrl":"https://doi.org/10.1109/ISS.1990.765819","url":null,"abstract":"ATM networks have been proposed by CCITT as the solution for future lntegrated Broadband Communication Networks. They provide a high flexibility with regard to varying bandwidth requirements for different services as well as the momentary bitrate within a connection (bitrale on demand). For the network operator this results in a need to control the individual connections in order to ensure an acceptable quality of service for all existing connections by means of a so called policing or source monitoring junction. In this paper, some basic aspects of this function including the dimensioning of its parameters are addressed using the 'Leaky Bucket' mechanism as an example.","PeriodicalId":277204,"journal":{"name":"International Symposium on Switching","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114740496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A major objective of the Intelligent Network is the rapid introduction of new services in a multi-vendor environment. The Application Programming Interface (API) enables the applications programmer to write services or service features that can be installed on any vendors Service Control Point (SCP) without a detailed knowledge of the underlying hardware or software environment, Wilst the reader is expected to have knowledge of the Intelligent Network cancept, the paper explains the importance of the AFV in achieving the goal of rapid service implementation across a range of suppliers' equipments. This paper is based on the outcome of a joint study under taken between BT and IBM UK in the first quarter of 1989. It discusses some of the technical issues identified during the study in order to stimulate debate within industry.
{"title":"An application programming interface for the intelligent network","authors":"C. Sage","doi":"10.1109/ISS.1990.765822","DOIUrl":"https://doi.org/10.1109/ISS.1990.765822","url":null,"abstract":"A major objective of the Intelligent Network is the rapid introduction of new services in a multi-vendor environment. The Application Programming Interface (API) enables the applications programmer to write services or service features that can be installed on any vendors Service Control Point (SCP) without a detailed knowledge of the underlying hardware or software environment, Wilst the reader is expected to have knowledge of the Intelligent Network cancept, the paper explains the importance of the AFV in achieving the goal of rapid service implementation across a range of suppliers' equipments. This paper is based on the outcome of a joint study under taken between BT and IBM UK in the first quarter of 1989. It discusses some of the technical issues identified during the study in order to stimulate debate within industry.","PeriodicalId":277204,"journal":{"name":"International Symposium on Switching","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127828785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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