In order to satisfy a constant need of reducing energy consumption of electronic devices, the approximate computing paradigm has been introduced in recent years. This paradigm is based on the fact that there are applications that are inherently capable of absorbing some errors in computation. Multimedia signal processing represents a typical example that allows for quality to be traded off for power. Typicaly, the approximate circuits are designed at gate level. This paper introduces an automatic design method that is able to operate directly at transistor level which offers a great potential for discovering novel implementations of approximate circuits. The method combines a stochastic search algorithm with transistor-level circuit simulator and is able to handle the circuits consisting of hundreds of transistors. The goal of the search strategy is to improve the power consumption. To estimate power consumption, an algorithm based on transistor switching activity is proposed. A design of 4-bit multiplier was chosen as a case study. Two scenarios were considered. Firstly, the proposed method is applied to improve the power consumption of a common 4-bit multiplier and a 4-bit multiplier consisting of manually designed 2-bit multipliers. In both cases, approx. 3% power reduction was achieved. Then, it is demonstrated that a noticeable improvement can be obtained when the multipliers are designed using a hybrid approach operating at transistor as well as gate level. We discovered a novel implementation of an approximate 4-bit multiplier which has approximately by 40% better power-delay product and exhibits 14% lower worst-case error compared to the best known 4-bit multiplier consisting of 2-bit manually optimized approximate multipliers.
{"title":"Automatic Design of Low-Power VLSI Circuits: Accurate and Approximate Multipliers","authors":"Vojtěch Mrázek, Z. Vašíček","doi":"10.1109/EUC.2015.20","DOIUrl":"https://doi.org/10.1109/EUC.2015.20","url":null,"abstract":"In order to satisfy a constant need of reducing energy consumption of electronic devices, the approximate computing paradigm has been introduced in recent years. This paradigm is based on the fact that there are applications that are inherently capable of absorbing some errors in computation. Multimedia signal processing represents a typical example that allows for quality to be traded off for power. Typicaly, the approximate circuits are designed at gate level. This paper introduces an automatic design method that is able to operate directly at transistor level which offers a great potential for discovering novel implementations of approximate circuits. The method combines a stochastic search algorithm with transistor-level circuit simulator and is able to handle the circuits consisting of hundreds of transistors. The goal of the search strategy is to improve the power consumption. To estimate power consumption, an algorithm based on transistor switching activity is proposed. A design of 4-bit multiplier was chosen as a case study. Two scenarios were considered. Firstly, the proposed method is applied to improve the power consumption of a common 4-bit multiplier and a 4-bit multiplier consisting of manually designed 2-bit multipliers. In both cases, approx. 3% power reduction was achieved. Then, it is demonstrated that a noticeable improvement can be obtained when the multipliers are designed using a hybrid approach operating at transistor as well as gate level. We discovered a novel implementation of an approximate 4-bit multiplier which has approximately by 40% better power-delay product and exhibits 14% lower worst-case error compared to the best known 4-bit multiplier consisting of 2-bit manually optimized approximate multipliers.","PeriodicalId":299207,"journal":{"name":"2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing","volume":"139 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116726884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Michael Käßmeyer, David Santiago Velasco Moncada, Markus Schurius
The development of highly integrated, safety-relevant automotive functions is faced with the challenge of increasing complexity resulting from product customization and variants in implementation through software-hardware solutions. In order to reduce time to market in this scenario, systematic reuse of engineering artifacts is important. This paper introduces a systematic model-based engineering approach that combines architecture design, requirements engineering, and safety analyses with variant management and provides evaluation results to address these challenges. In detail, this tool-supported approach achieves a new level of seamless safety engineering across variants by enabling typical safety lifecycle artifacts to be represented in a homogeneous, UML-compliant model notation. Safety-related information is no longer scattered in various isolated tools and formats but instead consolidated and integrated. A further and decisive benefit of this notation is that variability can now be expressed and managed easily by regular variant management tools with UML adapters. Together with changeimpact analysis which is facilitated equally by this model-based foundation, the ultimate goal of developing and maintaining modular safety cases can be achieved. Examples on how to use this model-based safety engineering method for variant-rich automotive functions are presented for a hazard analysis, a fault tree analysis and for a safety concept specification.
{"title":"Evaluation of a Systematic Approach in Variant Management for Safety-Critical Systems Development","authors":"Michael Käßmeyer, David Santiago Velasco Moncada, Markus Schurius","doi":"10.1109/EUC.2015.12","DOIUrl":"https://doi.org/10.1109/EUC.2015.12","url":null,"abstract":"The development of highly integrated, safety-relevant automotive functions is faced with the challenge of increasing complexity resulting from product customization and variants in implementation through software-hardware solutions. In order to reduce time to market in this scenario, systematic reuse of engineering artifacts is important. This paper introduces a systematic model-based engineering approach that combines architecture design, requirements engineering, and safety analyses with variant management and provides evaluation results to address these challenges. In detail, this tool-supported approach achieves a new level of seamless safety engineering across variants by enabling typical safety lifecycle artifacts to be represented in a homogeneous, UML-compliant model notation. Safety-related information is no longer scattered in various isolated tools and formats but instead consolidated and integrated. A further and decisive benefit of this notation is that variability can now be expressed and managed easily by regular variant management tools with UML adapters. Together with changeimpact analysis which is facilitated equally by this model-based foundation, the ultimate goal of developing and maintaining modular safety cases can be achieved. Examples on how to use this model-based safety engineering method for variant-rich automotive functions are presented for a hazard analysis, a fault tree analysis and for a safety concept specification.","PeriodicalId":299207,"journal":{"name":"2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133722582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Fynn Schwiegelshohn, P. Wehner, J. Rettkowski, D. Göhringer, M. Hübner, G. Keramidas, Christos P. Antonopoulos, N. Voros
Due to the demographic change in western society, new challenges regarding healthcare of the elderly population are at the verge of surfacing. Since young people are not capable of sustaining an adequate healthcare for elderly people, new healthcare fields have to be devised. Recent advances in information and communication technology enable the support of elderly people in their domestic environment. The EU project RADIO will design of an old age compliant smart home environment which specializes in fulfilling the needs of elderly people. This is partially achieved through a mobile robot platform which serves as an assistant to the respective elderly person. Apart from this, the robot also functions as a mobile sensor platform. Under this context, unobtrusiveness is of paramount importance since the robot should be a natural participant of patients' daily life. This paper discusses such a healthcare facility, analyses its requirements and poses the challenges towards this direction.
{"title":"A Holistic Approach for Advancing Robots in Ambient Assisted Living Environments","authors":"Fynn Schwiegelshohn, P. Wehner, J. Rettkowski, D. Göhringer, M. Hübner, G. Keramidas, Christos P. Antonopoulos, N. Voros","doi":"10.1109/EUC.2015.37","DOIUrl":"https://doi.org/10.1109/EUC.2015.37","url":null,"abstract":"Due to the demographic change in western society, new challenges regarding healthcare of the elderly population are at the verge of surfacing. Since young people are not capable of sustaining an adequate healthcare for elderly people, new healthcare fields have to be devised. Recent advances in information and communication technology enable the support of elderly people in their domestic environment. The EU project RADIO will design of an old age compliant smart home environment which specializes in fulfilling the needs of elderly people. This is partially achieved through a mobile robot platform which serves as an assistant to the respective elderly person. Apart from this, the robot also functions as a mobile sensor platform. Under this context, unobtrusiveness is of paramount importance since the robot should be a natural participant of patients' daily life. This paper discusses such a healthcare facility, analyses its requirements and poses the challenges towards this direction.","PeriodicalId":299207,"journal":{"name":"2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115318106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Gorker Alp Malazgirt, Bora Kiyan, Deniz Candas, K. Erdayandi, A. Yurdakul
Multicore embedded systems have evolved to appear in different domains. In this paper, we explore and compare various on-chip architectures with respect to a number design metrics. Unlike earlier published works that majorly concern with optimizations in processor, memory and cache hierarchies, in this paper, we aim to ascertain the best on-chip architectures for given processor cores, Level 1-2-3 caches modeled from Intel Atom embedded processor family. We investigate topologies that haven't been considered before for symmetric multiprocessing in embedded systems domain. These architectures consist of shared instruction caches between cores and heterogenous cache topologies that feature bypassing a level in the cache hierarchy. Through our experiments with multithreaded workloads, we elicit the unconventional topologies that could provide more performance and energy efficiency than regular topologies. In addition, using our experimental data, we conclude that certain design metrics could depend on given workload, however there also exists some metrics that are more dependent on the the underlying topologies. Thus, we urge the need for future exploration tools to gather the necessary metrics while choosing the appropriate SMP architectures.
{"title":"Exploring Embedded Symmetric Multiprocessing with Various On-Chip Architectures","authors":"Gorker Alp Malazgirt, Bora Kiyan, Deniz Candas, K. Erdayandi, A. Yurdakul","doi":"10.1109/EUC.2015.19","DOIUrl":"https://doi.org/10.1109/EUC.2015.19","url":null,"abstract":"Multicore embedded systems have evolved to appear in different domains. In this paper, we explore and compare various on-chip architectures with respect to a number design metrics. Unlike earlier published works that majorly concern with optimizations in processor, memory and cache hierarchies, in this paper, we aim to ascertain the best on-chip architectures for given processor cores, Level 1-2-3 caches modeled from Intel Atom embedded processor family. We investigate topologies that haven't been considered before for symmetric multiprocessing in embedded systems domain. These architectures consist of shared instruction caches between cores and heterogenous cache topologies that feature bypassing a level in the cache hierarchy. Through our experiments with multithreaded workloads, we elicit the unconventional topologies that could provide more performance and energy efficiency than regular topologies. In addition, using our experimental data, we conclude that certain design metrics could depend on given workload, however there also exists some metrics that are more dependent on the the underlying topologies. Thus, we urge the need for future exploration tools to gather the necessary metrics while choosing the appropriate SMP architectures.","PeriodicalId":299207,"journal":{"name":"2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133493294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nowadays, with the development of ubiquitous and pervasive computing, pedestrian navigation systems are gaining significant momentum for location based services. To perform a seamless navigation service, a mobile unit MU is capable of capturing several positioning technologies, running simultaneously or independently according to user's needs. This paper proposes a dynamic selection algorithm to evaluate and determine the best positioning technology from available candidates, in the process of switching between technologies during an indoor outdoor pedestrian navigation procedure. This choice depends on many factors related to user preferences and service parameters such as power consumption, positioning accuracy and the number of visible GPS satellites. The proposed algorithm is based on a fuzzy analytic hierarchy process -- AHP as the most wellknown multiple criteria decision making -- MCDM approach that provides a description and a manipulation of several criteria information to infer the need for initializing the switch process. The introduced algorithm employs the AHP method to calculate criteria weight and define a selection function that ensures the determination of the convenient positioning technology.
{"title":"A Positioning Technology Switch Algorithm for Ubiquitous Pedestrian Navigation Systems","authors":"Wiem Fekih Hassen, F. Najjar","doi":"10.1109/EUC.2015.26","DOIUrl":"https://doi.org/10.1109/EUC.2015.26","url":null,"abstract":"Nowadays, with the development of ubiquitous and pervasive computing, pedestrian navigation systems are gaining significant momentum for location based services. To perform a seamless navigation service, a mobile unit MU is capable of capturing several positioning technologies, running simultaneously or independently according to user's needs. This paper proposes a dynamic selection algorithm to evaluate and determine the best positioning technology from available candidates, in the process of switching between technologies during an indoor outdoor pedestrian navigation procedure. This choice depends on many factors related to user preferences and service parameters such as power consumption, positioning accuracy and the number of visible GPS satellites. The proposed algorithm is based on a fuzzy analytic hierarchy process -- AHP as the most wellknown multiple criteria decision making -- MCDM approach that provides a description and a manipulation of several criteria information to infer the need for initializing the switch process. The introduced algorithm employs the AHP method to calculate criteria weight and define a selection function that ensures the determination of the convenient positioning technology.","PeriodicalId":299207,"journal":{"name":"2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134152261","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Taniro Rodrigues, T. Batista, Flávia Coimbra Delicato, Paulo F. Pires
Wireless Sensor and Actuator Networks (WSANs) are highly heterogeneous regarding hardware, software, and application requirements. Developing WSAN applications is a hard task, as it requires domain and network knowledge and there is a lack of methodologies, architectures, and patterns to help software developers with such task. Moreover, non-functional requirements play an essential role to ensure the application and network performance, and must be taken into account from the early stages of application development. We propose a ModelDriven Architecture framework to develop WSAN applications that enables developers to express functional and non-functional requirements. The framework encompasses a generic middleware meta-model including: (i) features shared among different WSAN middleware, (ii) meta-model of a target middleware including features of a specific WSAN middleware, and (iii) model transformations. We evaluate our approach by verifying the support to specify non-functional requirements and the automatic code generation of a middleware tailored to the requirements ofa target application.
{"title":"Architecture-Driven Development Approach for WSAN Applications","authors":"Taniro Rodrigues, T. Batista, Flávia Coimbra Delicato, Paulo F. Pires","doi":"10.1109/EUC.2015.15","DOIUrl":"https://doi.org/10.1109/EUC.2015.15","url":null,"abstract":"Wireless Sensor and Actuator Networks (WSANs) are highly heterogeneous regarding hardware, software, and application requirements. Developing WSAN applications is a hard task, as it requires domain and network knowledge and there is a lack of methodologies, architectures, and patterns to help software developers with such task. Moreover, non-functional requirements play an essential role to ensure the application and network performance, and must be taken into account from the early stages of application development. We propose a ModelDriven Architecture framework to develop WSAN applications that enables developers to express functional and non-functional requirements. The framework encompasses a generic middleware meta-model including: (i) features shared among different WSAN middleware, (ii) meta-model of a target middleware including features of a specific WSAN middleware, and (iii) model transformations. We evaluate our approach by verifying the support to specify non-functional requirements and the automatic code generation of a middleware tailored to the requirements ofa target application.","PeriodicalId":299207,"journal":{"name":"2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing","volume":"277 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121296160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The Focal-Plane Image Processing area aims to bring processing elements as near as possible to the pixels and to the camera's focal-plane. Most of the works reported in the literature uses only simple processing elements, in general analog ones, with few flexibility. With the technology advances, a new generation of Vision Processors is emerging. It is expected that multi/many-core systems will be integrated to the pixel sensors, offering several opportunities for parallelism exploration, resulting in high performance and flexible processing systems. The programmability is one of the main problems in this area, since most programmers are not able to create parallel algorithms and applications. In this work, we propose a methodology to the design and programming of many-core focal-plane vision processors. The application is described using a Domain Specific Language, from which the parallelism characteristics are extracted. Afterwards, a new abstract model is derived using techniques such as Program Slicing (PS) and Task-Graph Clustering (TGC). The abstract model is then transformed in a SystemC/TLM2.0 description, in order to allow for different timing accuracy simulations. The results of the simulations are used together with an ASIP design tool in order to determine both the microarchitecture of processing elements and the communication structure of the new system. Finally, from the model derived before, a new source code is generated and programmed into the new platform. In this context, the main concepts and ideas are described in this work, as well as some partial results.
{"title":"A Framework to the Design and Programming of Many-Core Focal-Plane Vision Processors","authors":"J. Y. Mori, C. Llanos, M. Hübner","doi":"10.1109/EUC.2015.24","DOIUrl":"https://doi.org/10.1109/EUC.2015.24","url":null,"abstract":"The Focal-Plane Image Processing area aims to bring processing elements as near as possible to the pixels and to the camera's focal-plane. Most of the works reported in the literature uses only simple processing elements, in general analog ones, with few flexibility. With the technology advances, a new generation of Vision Processors is emerging. It is expected that multi/many-core systems will be integrated to the pixel sensors, offering several opportunities for parallelism exploration, resulting in high performance and flexible processing systems. The programmability is one of the main problems in this area, since most programmers are not able to create parallel algorithms and applications. In this work, we propose a methodology to the design and programming of many-core focal-plane vision processors. The application is described using a Domain Specific Language, from which the parallelism characteristics are extracted. Afterwards, a new abstract model is derived using techniques such as Program Slicing (PS) and Task-Graph Clustering (TGC). The abstract model is then transformed in a SystemC/TLM2.0 description, in order to allow for different timing accuracy simulations. The results of the simulations are used together with an ASIP design tool in order to determine both the microarchitecture of processing elements and the communication structure of the new system. Finally, from the model derived before, a new source code is generated and programmed into the new platform. In this context, the main concepts and ideas are described in this work, as well as some partial results.","PeriodicalId":299207,"journal":{"name":"2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124752733","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The rapid increase in the use of robotic systems in industrial and domestic environments makes it necessary the development of more natural interaction procedures. This paper presents the development of a user-specific hand Gesture Recognition System (GRS) based on the information of a single tri-axial accelerometer to recognize 7 different dynamic gestures for natural Human Machine Interaction (HMI). The aim of this paper is to analyze and compare different computational methods for feature extraction, dimensionality reduction, and vector classification in order to select the most suitable combination of signal processing stages that meets the performance requirements for a single-chip, wearable GRS system. These requirements are lag-free response, low size, and low power consumption while keeping high recognition accuracy. Experimental results show that the overall achievable accuracy can be up to 98% for Artificial Neural Network (ANN) and Extreme Learning Machine (ELM) predictors, and 99% for Support Vector Machines (SVM).
{"title":"Efficient Algorithms for Accelerometer-Based Wearable Hand Gesture Recognition Systems","authors":"Gorka Marques, Koldo Basterretxea","doi":"10.1109/EUC.2015.25","DOIUrl":"https://doi.org/10.1109/EUC.2015.25","url":null,"abstract":"The rapid increase in the use of robotic systems in industrial and domestic environments makes it necessary the development of more natural interaction procedures. This paper presents the development of a user-specific hand Gesture Recognition System (GRS) based on the information of a single tri-axial accelerometer to recognize 7 different dynamic gestures for natural Human Machine Interaction (HMI). The aim of this paper is to analyze and compare different computational methods for feature extraction, dimensionality reduction, and vector classification in order to select the most suitable combination of signal processing stages that meets the performance requirements for a single-chip, wearable GRS system. These requirements are lag-free response, low size, and low power consumption while keeping high recognition accuracy. Experimental results show that the overall achievable accuracy can be up to 98% for Artificial Neural Network (ANN) and Extreme Learning Machine (ELM) predictors, and 99% for Support Vector Machines (SVM).","PeriodicalId":299207,"journal":{"name":"2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133665803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Andreas Raptopoulos, Vasileios Tsoutsouras, D. Soudris
The AEGLE project aims to advance integrated and personalized healthcare services, by innovatively handling big-biodata both at the cloud and at local healthcare sites. At the local level, AEGLE will focus on real-time processing of large volumes of raw data originating from patient monitoring services. Then at the cloud level, AEGLE will offer an experimental big data research platform to data scientists, workers and data professionals across Europe. This paper presents the AEGLE's approach to healthcare, along with the medical test cases and underlying technologies used in the project.
{"title":"Advancing Integrated and Personalized Healthcare Services, the AEGLE Approach","authors":"Andreas Raptopoulos, Vasileios Tsoutsouras, D. Soudris","doi":"10.1109/EUC.2015.35","DOIUrl":"https://doi.org/10.1109/EUC.2015.35","url":null,"abstract":"The AEGLE project aims to advance integrated and personalized healthcare services, by innovatively handling big-biodata both at the cloud and at local healthcare sites. At the local level, AEGLE will focus on real-time processing of large volumes of raw data originating from patient monitoring services. Then at the cloud level, AEGLE will offer an experimental big data research platform to data scientists, workers and data professionals across Europe. This paper presents the AEGLE's approach to healthcare, along with the medical test cases and underlying technologies used in the project.","PeriodicalId":299207,"journal":{"name":"2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130726979","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Smart buildings are essential for future smart grids. We propose a general method and algorithms to integrate residential smart buildings with smart grids. Such integration has to deal with the ability for the smart building to forecast its energy consumption, the proposed method is able to learn the building occupants habits and to use such information to forecast the energy consumption. Moreover, we present a method for selecting the most appropriate appliance usage scheduling given a energy reduction request coming from the smart grid.
{"title":"Methods and Algorithms for the Interaction of Residential Smart Buildings with Smart Grids","authors":"Giovanni Bettinazzi, A. A. Nacci, D. Sciuto","doi":"10.1109/EUC.2015.17","DOIUrl":"https://doi.org/10.1109/EUC.2015.17","url":null,"abstract":"Smart buildings are essential for future smart grids. We propose a general method and algorithms to integrate residential smart buildings with smart grids. Such integration has to deal with the ability for the smart building to forecast its energy consumption, the proposed method is able to learn the building occupants habits and to use such information to forecast the energy consumption. Moreover, we present a method for selecting the most appropriate appliance usage scheduling given a energy reduction request coming from the smart grid.","PeriodicalId":299207,"journal":{"name":"2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124730697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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