Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_29
W. Hunt, R. Krug, J. S. Moore
{"title":"Linear and Nonlinear Arithmetic in ACL2","authors":"W. Hunt, R. Krug, J. S. Moore","doi":"10.1007/978-3-540-39724-3_29","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_29","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131887801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_6
S. Barner, Ishai Rabinovitz
{"title":"Effcient Symbolic Model Checking of Software Using Partial Disjunctive Partitioning","authors":"S. Barner, Ishai Rabinovitz","doi":"10.1007/978-3-540-39724-3_6","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_6","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131515570","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_23
Charles Hymans
{"title":"Design and Implementation of an Abstract Interpreter for VHDL","authors":"Charles Hymans","doi":"10.1007/978-3-540-39724-3_23","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_23","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121562008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_19
M. Gordon, Joe Hurd, Konrad Slind
{"title":"Executing the Formal Semantics of the Accellera Property Specification Language by Mechanised Theorem Proving","authors":"M. Gordon, Joe Hurd, Konrad Slind","doi":"10.1007/978-3-540-39724-3_19","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_19","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126421331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_1
W. Roesner
{"title":"What Is beyond the RTL Horizon for Microprocessor and System Design?","authors":"W. Roesner","doi":"10.1007/978-3-540-39724-3_1","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_1","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122769092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_5
S. Chaki, E. Clarke, Alex Groce, O. Strichman
{"title":"Predicate Abstraction with Minimum Predicates","authors":"S. Chaki, E. Clarke, Alex Groce, O. Strichman","doi":"10.1007/978-3-540-39724-3_5","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_5","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"2 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113947096","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_35
S. Iyer, D. Sahoo, Christian Stangier, A. Narayan, J. Jain
{"title":"Improved Symbolic Verification Using Partitioning Techniques","authors":"S. Iyer, D. Sahoo, Christian Stangier, A. Narayan, J. Jain","doi":"10.1007/978-3-540-39724-3_35","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_35","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115267988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_25
G. D. Penna, B. Intrigila, I. Melatti, E. Tronci, M. V. Zilli
{"title":"Integrating RAM and Disk Based Verification within the Mur-phi Verifier","authors":"G. D. Penna, B. Intrigila, I. Melatti, E. Tronci, M. V. Zilli","doi":"10.1007/978-3-540-39724-3_25","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_25","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"164 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122304651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_13
Rachel Tzoref, Mark Matusevich, E. Berger, I. Beer
{"title":"An Optimized Symbolic Bounded Model Checking Engine","authors":"Rachel Tzoref, Mark Matusevich, E. Berger, I. Beer","doi":"10.1007/978-3-540-39724-3_13","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_13","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115375313","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_17
A. Hu, Jeremy Casas, Jin Yang
{"title":"Reasoning about GSTE Assertion Graphs","authors":"A. Hu, Jeremy Casas, Jin Yang","doi":"10.1007/978-3-540-39724-3_17","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_17","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117263208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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