Pub Date : 1997-02-23DOI: 10.1109/APEC.1997.581426
R. Sevems
A review of literature and patent records for industrial controls and power electronics over the past 100 years shows a pattern of circuit invention, loss and reinvention, often repeated. This has resulted in a great waste of time and effort, as well as interminable legal wrangling and the loss of useful ideas for long periods of time. This paper gives an overview of the problem using several examples of circuits of interest. The paper then goes on to discuss searching for prior work.
{"title":"Circuit reinvention in power electronics and identification of prior work","authors":"R. Sevems","doi":"10.1109/APEC.1997.581426","DOIUrl":"https://doi.org/10.1109/APEC.1997.581426","url":null,"abstract":"A review of literature and patent records for industrial controls and power electronics over the past 100 years shows a pattern of circuit invention, loss and reinvention, often repeated. This has resulted in a great waste of time and effort, as well as interminable legal wrangling and the loss of useful ideas for long periods of time. This paper gives an overview of the problem using several examples of circuits of interest. The paper then goes on to discuss searching for prior work.","PeriodicalId":423659,"journal":{"name":"Proceedings of APEC 97 - Applied Power Electronics Conference","volume":"149 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126915506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-02-23DOI: 10.1109/APEC.1997.575729
H. Levy, I. Zafrany, G. Ivensky, S. Ben-Yaakov
A lossless turn-on snubber was studied analytically, by simulation and experimentally. Limits were found for the proper operation of the snubber and are expressed as permissible duty cycle as a function of input current. It was found that a modified version of the snubber, which includes a tapped main inductor, improves the performance by allowing a wider operational range. The experimental results confirm the theoretical analysis. A reduction of power losses of about 19 W was observed when the snubber was implemented in a 1 kW boost power converter.
{"title":"Analysis and evaluation of a lossless turn-on snubber","authors":"H. Levy, I. Zafrany, G. Ivensky, S. Ben-Yaakov","doi":"10.1109/APEC.1997.575729","DOIUrl":"https://doi.org/10.1109/APEC.1997.575729","url":null,"abstract":"A lossless turn-on snubber was studied analytically, by simulation and experimentally. Limits were found for the proper operation of the snubber and are expressed as permissible duty cycle as a function of input current. It was found that a modified version of the snubber, which includes a tapped main inductor, improves the performance by allowing a wider operational range. The experimental results confirm the theoretical analysis. A reduction of power losses of about 19 W was observed when the snubber was implemented in a 1 kW boost power converter.","PeriodicalId":423659,"journal":{"name":"Proceedings of APEC 97 - Applied Power Electronics Conference","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127649046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-02-23DOI: 10.1109/APEC.1997.581442
Sung-Jun Kim, S. Sul
This paper proposes a new filter topology that suppresses the high voltage gradient (dv/dt) in AC motor terminals when a cable feeding a motor is very long. By using the proposed filter in the inverter terminal, the rising and the falling edge of the PWM waveform of the inverter are smoothed, resulting in less voltage gradient to the AC motor. The effectiveness of the proposed filter is compared to that of the conventional scheme and its effectiveness is verified by computer simulation, as well as by prototype experiments.
{"title":"A novel filter design for suppression of high voltage gradient in voltage-fed PWM inverter","authors":"Sung-Jun Kim, S. Sul","doi":"10.1109/APEC.1997.581442","DOIUrl":"https://doi.org/10.1109/APEC.1997.581442","url":null,"abstract":"This paper proposes a new filter topology that suppresses the high voltage gradient (dv/dt) in AC motor terminals when a cable feeding a motor is very long. By using the proposed filter in the inverter terminal, the rising and the falling edge of the PWM waveform of the inverter are smoothed, resulting in less voltage gradient to the AC motor. The effectiveness of the proposed filter is compared to that of the conventional scheme and its effectiveness is verified by computer simulation, as well as by prototype experiments.","PeriodicalId":423659,"journal":{"name":"Proceedings of APEC 97 - Applied Power Electronics Conference","volume":"145 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127821767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-02-23DOI: 10.1109/APEC.1997.575758
R. Prieto, J. Cobos, Ó. García, J. Uceda
This work presents a study of the quantification of the benefits that can be achieved by applying interleaving techniques between different layers (interlayer effect) and in the same layer (intralayer effect). A method to estimate the leakage inductance is also introduced in this work. This method allows the designer to quantify the improvements that can be obtained applying interleaving techniques in an easy way using a simple calculation. Some design guidelines are extracted in order to select the best winding strategy for each transformer. The analysis has been carried out by means of finite element analysis (FEA) techniques in order to take into account all the frequency and geometry effects.
{"title":"Interleaving techniques in magnetic components","authors":"R. Prieto, J. Cobos, Ó. García, J. Uceda","doi":"10.1109/APEC.1997.575758","DOIUrl":"https://doi.org/10.1109/APEC.1997.575758","url":null,"abstract":"This work presents a study of the quantification of the benefits that can be achieved by applying interleaving techniques between different layers (interlayer effect) and in the same layer (intralayer effect). A method to estimate the leakage inductance is also introduced in this work. This method allows the designer to quantify the improvements that can be obtained applying interleaving techniques in an easy way using a simple calculation. Some design guidelines are extracted in order to select the best winding strategy for each transformer. The analysis has been carried out by means of finite element analysis (FEA) techniques in order to take into account all the frequency and geometry effects.","PeriodicalId":423659,"journal":{"name":"Proceedings of APEC 97 - Applied Power Electronics Conference","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133033765","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-02-23DOI: 10.1109/APEC.1997.581501
R. Srinivasan, R. Oruganti
A single-phase, high efficiency, and near-unity power factor half-bridge boost power converter circuit, which has been proposed earlier by other researchers, is presented with detailed analysis. Though this power converter is capable of operating under variable power factor, the focus of this paper is in achieving unity power factor operation only. The efficiency of this circuit is high because there is only one series semiconductor on-state voltage drop at any instant. The existence of an imbalance in the voltages of the two DC link capacitors, which was noted before, is confirmed here. The cause of the imbalance is analysed using appropriate models, and a control method to eliminate it is discussed in detail. Analysis and design considerations for the power circuit using the fixed band hysteresis current control technique are provided. The analytical results are verified through simulation using switched and averaged circuit models of the scheme and also through experimental work. At 90 V AC input and 300 W, 300 V output, the experimental prototype demonstrates an efficiency of 96% and a power factor of 0.998. This power converter, with its relatively high DC output voltage, is well suited for 110 V utility supply system. A circuit modification for universal input voltage range operation is also suggested.
{"title":"Analysis and design of power factor correction using half bridge boost topology","authors":"R. Srinivasan, R. Oruganti","doi":"10.1109/APEC.1997.581501","DOIUrl":"https://doi.org/10.1109/APEC.1997.581501","url":null,"abstract":"A single-phase, high efficiency, and near-unity power factor half-bridge boost power converter circuit, which has been proposed earlier by other researchers, is presented with detailed analysis. Though this power converter is capable of operating under variable power factor, the focus of this paper is in achieving unity power factor operation only. The efficiency of this circuit is high because there is only one series semiconductor on-state voltage drop at any instant. The existence of an imbalance in the voltages of the two DC link capacitors, which was noted before, is confirmed here. The cause of the imbalance is analysed using appropriate models, and a control method to eliminate it is discussed in detail. Analysis and design considerations for the power circuit using the fixed band hysteresis current control technique are provided. The analytical results are verified through simulation using switched and averaged circuit models of the scheme and also through experimental work. At 90 V AC input and 300 W, 300 V output, the experimental prototype demonstrates an efficiency of 96% and a power factor of 0.998. This power converter, with its relatively high DC output voltage, is well suited for 110 V utility supply system. A circuit modification for universal input voltage range operation is also suggested.","PeriodicalId":423659,"journal":{"name":"Proceedings of APEC 97 - Applied Power Electronics Conference","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133007968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-02-23DOI: 10.1109/APEC.1997.575732
Y. Lin, A. Witulski
A new single-ended, zero current switching DC-to-AC power inverter named the Class-L introduced. Because of its parallel resonant nature, the Class-L inverter is well-suited for high voltage applications. Circuit operation is illustrated by a detailed description and a ballast application is given for driving a cold cathode fluorescent lamp. Solution for the output characteristics of the inverter is illustrated by the output plane plot of the inverter. Experimental results are also presented.
{"title":"Class L-a new single-ended DC-to-AC power inverter","authors":"Y. Lin, A. Witulski","doi":"10.1109/APEC.1997.575732","DOIUrl":"https://doi.org/10.1109/APEC.1997.575732","url":null,"abstract":"A new single-ended, zero current switching DC-to-AC power inverter named the Class-L introduced. Because of its parallel resonant nature, the Class-L inverter is well-suited for high voltage applications. Circuit operation is illustrated by a detailed description and a ballast application is given for driving a cold cathode fluorescent lamp. Solution for the output characteristics of the inverter is illustrated by the output plane plot of the inverter. Experimental results are also presented.","PeriodicalId":423659,"journal":{"name":"Proceedings of APEC 97 - Applied Power Electronics Conference","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130208837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-02-23DOI: 10.1109/APEC.1997.575749
S. Saetieo, D. Torrey
This paper presents a fuzzy logic control scheme of space vector pulsewidth modulation (PWM) for three-phase power converters. The conventional space vector PWM current regulator implementation is generally computationally complex. The fuzzy logic controller implementation relieves the processor of a number of computations, thereby accommodating a less expensive microprocessor. The AC side rectifier voltages are used as fuzzy state variables. The fuzzy logic control has two outputs: magnitude; and angle of reference voltage. Both conventional space vector PWM and the fuzzy logic controller are implemented to evaluate performance using 16-bit microcontroller (68HC16). Experimental results are provided for both controllers at the same operating point, where the power drawn by the load is about 3 kW. The fuzzy logic controller reduces the computational burden on the processor by about 30%.
{"title":"Fuzzy logic control of a space vector PWM current regulator for three phase power converters","authors":"S. Saetieo, D. Torrey","doi":"10.1109/APEC.1997.575749","DOIUrl":"https://doi.org/10.1109/APEC.1997.575749","url":null,"abstract":"This paper presents a fuzzy logic control scheme of space vector pulsewidth modulation (PWM) for three-phase power converters. The conventional space vector PWM current regulator implementation is generally computationally complex. The fuzzy logic controller implementation relieves the processor of a number of computations, thereby accommodating a less expensive microprocessor. The AC side rectifier voltages are used as fuzzy state variables. The fuzzy logic control has two outputs: magnitude; and angle of reference voltage. Both conventional space vector PWM and the fuzzy logic controller are implemented to evaluate performance using 16-bit microcontroller (68HC16). Experimental results are provided for both controllers at the same operating point, where the power drawn by the load is about 3 kW. The fuzzy logic controller reduces the computational burden on the processor by about 30%.","PeriodicalId":423659,"journal":{"name":"Proceedings of APEC 97 - Applied Power Electronics Conference","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124403184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-02-23DOI: 10.1109/APEC.1997.575760
D. Garabandic, W. Dunford
The use of additional capacitors and a resonating inductor with a bridge converter can allow zero voltage switching in high-power slow-switching applications. The performance can be further improved if a saturable reactor is used. This paper examines the design of such a saturable reactor and presents experimental results from a 3 kW, 30 kHz IGBT DC-DC converter.
{"title":"Primary saturable inductor for high power zero voltage switching DC-DC converter with IGBTs","authors":"D. Garabandic, W. Dunford","doi":"10.1109/APEC.1997.575760","DOIUrl":"https://doi.org/10.1109/APEC.1997.575760","url":null,"abstract":"The use of additional capacitors and a resonating inductor with a bridge converter can allow zero voltage switching in high-power slow-switching applications. The performance can be further improved if a saturable reactor is used. This paper examines the design of such a saturable reactor and presents experimental results from a 3 kW, 30 kHz IGBT DC-DC converter.","PeriodicalId":423659,"journal":{"name":"Proceedings of APEC 97 - Applied Power Electronics Conference","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128845372","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-02-23DOI: 10.1109/APEC.1997.575771
Y. Lin, A. Witulski
The authors present the analysis and design of current-fed Class-M, and voltage-fed Class-L zero current switching (ZCS) resonant inverters. These inverters are suitable for high voltage applications due to their parallel resonant nature. Operations of the circuits are illustrated by detailed descriptions. A design procedure and an example are presented and verified with experiments. A simple steady-state circuit model is also introduced.
{"title":"A unique analysis and design of ZCS resonant inverters","authors":"Y. Lin, A. Witulski","doi":"10.1109/APEC.1997.575771","DOIUrl":"https://doi.org/10.1109/APEC.1997.575771","url":null,"abstract":"The authors present the analysis and design of current-fed Class-M, and voltage-fed Class-L zero current switching (ZCS) resonant inverters. These inverters are suitable for high voltage applications due to their parallel resonant nature. Operations of the circuits are illustrated by detailed descriptions. A design procedure and an example are presented and verified with experiments. A simple steady-state circuit model is also introduced.","PeriodicalId":423659,"journal":{"name":"Proceedings of APEC 97 - Applied Power Electronics Conference","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128716132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-02-23DOI: 10.1109/APEC.1997.575773
J. Qian, F. Lee, T. Yamauchi
A charge pump high power factor converter cell is first derived, and its unity power factor condition is then reviewed. A single stage high power factor electronic ballast using the charge pump concept is then analyzed. Design criteria are derived to optimize the electronic ballast based on the steady state analysis. Constant lamp power operations associated with its control are also discussed. Large signal simulation and experimental results verify the theoretical analysis. It is shown that the designed electronic ballast has 0.995 power factor and 5% total harmonic distortion with lamp power variation within /spl plusmn/15% when the line input voltage changes /spl plusmn/10%.
{"title":"Analysis, design and experiments of a high power factor electronic ballast","authors":"J. Qian, F. Lee, T. Yamauchi","doi":"10.1109/APEC.1997.575773","DOIUrl":"https://doi.org/10.1109/APEC.1997.575773","url":null,"abstract":"A charge pump high power factor converter cell is first derived, and its unity power factor condition is then reviewed. A single stage high power factor electronic ballast using the charge pump concept is then analyzed. Design criteria are derived to optimize the electronic ballast based on the steady state analysis. Constant lamp power operations associated with its control are also discussed. Large signal simulation and experimental results verify the theoretical analysis. It is shown that the designed electronic ballast has 0.995 power factor and 5% total harmonic distortion with lamp power variation within /spl plusmn/15% when the line input voltage changes /spl plusmn/10%.","PeriodicalId":423659,"journal":{"name":"Proceedings of APEC 97 - Applied Power Electronics Conference","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126771224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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