Pub Date : 2019-07-01DOI: 10.1109/patmos.2019.8862052
{"title":"PATMOS 2019 Keynote","authors":"","doi":"10.1109/patmos.2019.8862052","DOIUrl":"https://doi.org/10.1109/patmos.2019.8862052","url":null,"abstract":"","PeriodicalId":430458,"journal":{"name":"2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124718924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-07-01DOI: 10.1109/PATMOS.2019.8862159
M. Arnold, I. Kouretas, Vassilis Paliouras, A. Morgan
Switching behavior and dynamic power consumption of arithmetic circuits are influenced by the distribution of operands as well as the number system used to encode them. Binary integer encoding may cause severe switching fluctuation; the integer Residue Number System (RNS) reduces this by breaking the integer into smaller moduli, which in turn may use either binary or one-hot encoding. One-hot switching is nearly consistent regardless of operand distribution, but this comes at the cost of increased bit width. Reals are represented by mapping integers, such as well-known examples of fixed point and Floating Point (FP). A more unusual system is the Logarithmic Number System (LNS) that takes the logarithm of the absolute value of the real (its sign is encoded separately) into an integer. Combining one-hot, RNS and LNS offers real arithmetic circuits with nearly uniform switching at the cost of some complexity in word size, addition, conversion and sign-detection.
{"title":"One-Hot Residue Logarithmic Number Systems","authors":"M. Arnold, I. Kouretas, Vassilis Paliouras, A. Morgan","doi":"10.1109/PATMOS.2019.8862159","DOIUrl":"https://doi.org/10.1109/PATMOS.2019.8862159","url":null,"abstract":"Switching behavior and dynamic power consumption of arithmetic circuits are influenced by the distribution of operands as well as the number system used to encode them. Binary integer encoding may cause severe switching fluctuation; the integer Residue Number System (RNS) reduces this by breaking the integer into smaller moduli, which in turn may use either binary or one-hot encoding. One-hot switching is nearly consistent regardless of operand distribution, but this comes at the cost of increased bit width. Reals are represented by mapping integers, such as well-known examples of fixed point and Floating Point (FP). A more unusual system is the Logarithmic Number System (LNS) that takes the logarithm of the absolute value of the real (its sign is encoded separately) into an integer. Combining one-hot, RNS and LNS offers real arithmetic circuits with nearly uniform switching at the cost of some complexity in word size, addition, conversion and sign-detection.","PeriodicalId":430458,"journal":{"name":"2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132511287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-07-01DOI: 10.1109/patmos.2019.8862058
PATMOS has a history of 29 years and it is one of the first conferences world-wide focusing on low power design. The traditional scope of PATMOS conference series has mainly been about the design of circuits and systems optimized for highest performance at lowest power consumption. But meanwhile, power-efficiency has become extremely important for many other areas spreading far beyond this traditional R&D niche. Energy efficiency has become a must in the connected network of battery-operated nodes known as Internet-of-Things (IoT). Wearable devices, home appliances, vehicles and security surveillance systems mostly rely on small sensors that should ideally operate on battery charge for days. However, current battery technology cannot meet the growing demands of these systems in terms of power. Also, energy-efficient ICT (Information and Communication Technology) infrastructures are a key issue of local and global economies. Based on the current trends, it is predicted that until the year 2030 the electricity consumption caused by the Internet will grow by up to 30 times. In addition, the strong increase of wireless communication and the growth of cloud computing require orders of magnitude more computational power. It is the intention of PATMOS 2019 to think beyond current solutions such that the wide gap between computation and the massive energy consumption for ICT infrastructures can be closed.
{"title":"About PATMOS","authors":"","doi":"10.1109/patmos.2019.8862058","DOIUrl":"https://doi.org/10.1109/patmos.2019.8862058","url":null,"abstract":"PATMOS has a history of 29 years and it is one of the first conferences world-wide focusing on low power design. The traditional scope of PATMOS conference series has mainly been about the design of circuits and systems optimized for highest performance at lowest power consumption. But meanwhile, power-efficiency has become extremely important for many other areas spreading far beyond this traditional R&D niche. Energy efficiency has become a must in the connected network of battery-operated nodes known as Internet-of-Things (IoT). Wearable devices, home appliances, vehicles and security surveillance systems mostly rely on small sensors that should ideally operate on battery charge for days. However, current battery technology cannot meet the growing demands of these systems in terms of power. Also, energy-efficient ICT (Information and Communication Technology) infrastructures are a key issue of local and global economies. Based on the current trends, it is predicted that until the year 2030 the electricity consumption caused by the Internet will grow by up to 30 times. In addition, the strong increase of wireless communication and the growth of cloud computing require orders of magnitude more computational power. It is the intention of PATMOS 2019 to think beyond current solutions such that the wide gap between computation and the massive energy consumption for ICT infrastructures can be closed.","PeriodicalId":430458,"journal":{"name":"2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122034272","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-07-01DOI: 10.1109/PATMOS.2019.8862097
Anil Kumar Gundu, V. Kursun
A new low power clock distribution network with multi-threshold-voltage (multi-Vt) repeaters is presented in this paper. A repeater circuit with two inputs and two outputs is employed for suppressing leakage currents in gated clock distribution networks. The standby leakage power consumption is reduced by 50.93% with the proposed clock tree as compared to the conventional 3 level H-tree operating with a power supply voltage of 0.8V in a 45nm CMOS technology. In addition to providing significant power savings in idle clock distribution networks, the proposed circuit technique also lowers the total energy consumption of partially active networks. Depending on the percent of segments that experience local clock gating, the total energy consumed by the proposed clock network is 6.78% to 80.43% lower as compared to the conventional clock tree with a power supply voltage of 0.4V and a clock frequency of 10MHz.
{"title":"Energy Efficient Clock Distribution with Low-Leakage Multi-Vt Buffers","authors":"Anil Kumar Gundu, V. Kursun","doi":"10.1109/PATMOS.2019.8862097","DOIUrl":"https://doi.org/10.1109/PATMOS.2019.8862097","url":null,"abstract":"A new low power clock distribution network with multi-threshold-voltage (multi-Vt) repeaters is presented in this paper. A repeater circuit with two inputs and two outputs is employed for suppressing leakage currents in gated clock distribution networks. The standby leakage power consumption is reduced by 50.93% with the proposed clock tree as compared to the conventional 3 level H-tree operating with a power supply voltage of 0.8V in a 45nm CMOS technology. In addition to providing significant power savings in idle clock distribution networks, the proposed circuit technique also lowers the total energy consumption of partially active networks. Depending on the percent of segments that experience local clock gating, the total energy consumed by the proposed clock network is 6.78% to 80.43% lower as compared to the conventional clock tree with a power supply voltage of 0.4V and a clock frequency of 10MHz.","PeriodicalId":430458,"journal":{"name":"2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130369594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-07-01DOI: 10.1109/PATMOS.2019.8862111
S. Nikolaidis, Dimitrios Porlidas, G. Glentis, A. Kalfas, Christos C. Spandonidis
The presented initiative aims at the development of a low cost and low energy wireless sensor system for the immediate detection of leaks in metallic piping systems for the transport of liquid and gaseous petroleum products in a noisy industrial environment. The method to be followed will be based on processing the changes monitored in the acoustic spectrum of sound signals appearing in the pipeline walls due to a leakage effect and will aim at minimal interference in the piping system. It is intended to use low frequencies to detect and characterize leakage in order to increase the range of sensors and thus to reduce cost. The method will focus only on the sounds produced during the leakage while intermittent processing will be applied with the potential to further reduce energy consumption and increase leakage detection reliability in a noisy environment.
{"title":"Smart sensor system for leakage detection in pipes carrying oil products in noisy environment: The ESTHISIS Project","authors":"S. Nikolaidis, Dimitrios Porlidas, G. Glentis, A. Kalfas, Christos C. Spandonidis","doi":"10.1109/PATMOS.2019.8862111","DOIUrl":"https://doi.org/10.1109/PATMOS.2019.8862111","url":null,"abstract":"The presented initiative aims at the development of a low cost and low energy wireless sensor system for the immediate detection of leaks in metallic piping systems for the transport of liquid and gaseous petroleum products in a noisy industrial environment. The method to be followed will be based on processing the changes monitored in the acoustic spectrum of sound signals appearing in the pipeline walls due to a leakage effect and will aim at minimal interference in the piping system. It is intended to use low frequencies to detect and characterize leakage in order to increase the range of sensors and thus to reduce cost. The method will focus only on the sounds produced during the leakage while intermittent processing will be applied with the potential to further reduce energy consumption and increase leakage detection reliability in a noisy environment.","PeriodicalId":430458,"journal":{"name":"2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129707216","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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