This paper describes the use of graph analysis for spatial networks. The use of community detection algorithms for detecting communities- groups of similar objects within networks of land cover objects to determine the land use is evaluated. Land cover to land use transformation requires some knowledge to merge land cover objects. Community detection algorithms merge objects of the formed spatial network into communities. Community detection algorithms are efficient analysis tool for spatial graphs and can identify land use communities but with different characteristics, although spatial networks with topological relationships between objects can cause some problems.
{"title":"Using community detection for spatial networks: POSTER","authors":"Krista Rizman Žalik, B. Žalik","doi":"10.1145/3310273.3323429","DOIUrl":"https://doi.org/10.1145/3310273.3323429","url":null,"abstract":"This paper describes the use of graph analysis for spatial networks. The use of community detection algorithms for detecting communities- groups of similar objects within networks of land cover objects to determine the land use is evaluated. Land cover to land use transformation requires some knowledge to merge land cover objects. Community detection algorithms merge objects of the formed spatial network into communities. Community detection algorithms are efficient analysis tool for spatial graphs and can identify land use communities but with different characteristics, although spatial networks with topological relationships between objects can cause some problems.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115463911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Meloni, Daniela Loi, Paola Busia, Gianfranco Deriu, A. Pimentel, Dolly Sapra, T. Stefanov, S. Minakova, Francesco Conti, L. Benini, Maura Pintor, B. Biggio, Bernhard Moser, Natalia Shepeleva, N. Fragoulis, Ilias Theodorakopoulos, M. Masin, F. Palumbo
Deep learning (DL) algorithms have already proved their effectiveness on a wide variety of application domains, including speech recognition, natural language processing, and image classification. To foster their pervasive adoption in applications where low latency, privacy issues and data bandwidth are paramount, the current trend is to perform inference tasks at the edge. This requires deployment of DL algorithms on low-energy and resource-constrained computing nodes, often heterogenous and parallel, that are usually more complex to program and to manage without adequate support and experience. In this paper, we present ALOHA, an integrated tool flow that tries to facilitate the design of DL applications and their porting on embedded heterogenous architectures. The proposed tool flow aims at automating different design steps and reducing development costs. ALOHA considers hardware-related variables and security, power efficiency, and adaptivity aspects during the whole development process, from pre-training hyperparameter optimization and algorithm configuration to deployment.
{"title":"Optimization and deployment of CNNs at the edge: the ALOHA experience","authors":"P. Meloni, Daniela Loi, Paola Busia, Gianfranco Deriu, A. Pimentel, Dolly Sapra, T. Stefanov, S. Minakova, Francesco Conti, L. Benini, Maura Pintor, B. Biggio, Bernhard Moser, Natalia Shepeleva, N. Fragoulis, Ilias Theodorakopoulos, M. Masin, F. Palumbo","doi":"10.1145/3310273.3323435","DOIUrl":"https://doi.org/10.1145/3310273.3323435","url":null,"abstract":"Deep learning (DL) algorithms have already proved their effectiveness on a wide variety of application domains, including speech recognition, natural language processing, and image classification. To foster their pervasive adoption in applications where low latency, privacy issues and data bandwidth are paramount, the current trend is to perform inference tasks at the edge. This requires deployment of DL algorithms on low-energy and resource-constrained computing nodes, often heterogenous and parallel, that are usually more complex to program and to manage without adequate support and experience. In this paper, we present ALOHA, an integrated tool flow that tries to facilitate the design of DL applications and their porting on embedded heterogenous architectures. The proposed tool flow aims at automating different design steps and reducing development costs. ALOHA considers hardware-related variables and security, power efficiency, and adaptivity aspects during the whole development process, from pre-training hyperparameter optimization and algorithm configuration to deployment.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125692236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Stochastic circuits (SCs) offer significant area, power and energy benefits at the cost of computational inaccuracies. SCs have received particular attention recently in the context of neural networks (NNs). Many NNs use the maximum function, e.g., in the max-pooling layer of convolutional NNs. Currently, approximate workarounds are often employed for this function. We propose NMax, a new SC design for the maximum function that produces an exact result with latency similar to an approximate circuit. Furthermore, unlike most stochastic functions, NMax is correlation insensitive. We also observe that maximum calculations are subject to application-specific bias and analyze this bias.
{"title":"On the maximum function in stochastic computing","authors":"Florian Neugebauer, I. Polian, J. Hayes","doi":"10.1145/3310273.3323050","DOIUrl":"https://doi.org/10.1145/3310273.3323050","url":null,"abstract":"Stochastic circuits (SCs) offer significant area, power and energy benefits at the cost of computational inaccuracies. SCs have received particular attention recently in the context of neural networks (NNs). Many NNs use the maximum function, e.g., in the max-pooling layer of convolutional NNs. Currently, approximate workarounds are often employed for this function. We propose NMax, a new SC design for the maximum function that produces an exact result with latency similar to an approximate circuit. Furthermore, unlike most stochastic functions, NMax is correlation insensitive. We also observe that maximum calculations are subject to application-specific bias and analyze this bias.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115525264","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Marcel Brand, Michael Witterauf, Frank Hannig, Jürgen Teich
Many embedded applications strive for high performance and power efficiency but rely on latency-intensive floating-point operations. This expensiveness can be offset, for example, by approximate and mixed-precision floating-point computation. In this paper, we present a novel concept called anytime instructions. Anytime instructions explicitly specify the number of result bits that are calculated at full precision. After presenting the basics of anytime instructions, we apply this novel concept to floating-point division by presenting an anytime division functional unit that is implemented in a VLIW processor. In this setup, we show the effectiveness of anytime instructions in iterative computations. We show a latency improvement of 54.8 % for computing 53 iterations of the Babylonian method for square-root calculation while not sacrificing the accuracy of the final square-root result.
{"title":"Anytime instructions for programmable accuracy floating-point arithmetic","authors":"Marcel Brand, Michael Witterauf, Frank Hannig, Jürgen Teich","doi":"10.1145/3310273.3322833","DOIUrl":"https://doi.org/10.1145/3310273.3322833","url":null,"abstract":"Many embedded applications strive for high performance and power efficiency but rely on latency-intensive floating-point operations. This expensiveness can be offset, for example, by approximate and mixed-precision floating-point computation. In this paper, we present a novel concept called anytime instructions. Anytime instructions explicitly specify the number of result bits that are calculated at full precision. After presenting the basics of anytime instructions, we apply this novel concept to floating-point division by presenting an anytime division functional unit that is implemented in a VLIW processor. In this setup, we show the effectiveness of anytime instructions in iterative computations. We show a latency improvement of 54.8 % for computing 53 iterations of the Babylonian method for square-root calculation while not sacrificing the accuracy of the final square-root result.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129687450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We describe a paradigm for designing parallel algorithms on massive graphs by employing approximation techniques. Instead of solving a problem exactly, for which efficient parallel algorithms do not exist, we seek a solution with provable approximation guarantees via approximation algorithms. Furthermore, we design approximation algorithms with high degrees of concurrency. We show the computation of degree-constrained subgraphs as an example of this paradigm.
{"title":"Parallel algorithms through approximation: graphs, data privacy and machine learning","authors":"A. Pothen","doi":"10.1145/3310273.3323431","DOIUrl":"https://doi.org/10.1145/3310273.3323431","url":null,"abstract":"We describe a paradigm for designing parallel algorithms on massive graphs by employing approximation techniques. Instead of solving a problem exactly, for which efficient parallel algorithms do not exist, we seek a solution with provable approximation guarantees via approximation algorithms. Furthermore, we design approximation algorithms with high degrees of concurrency. We show the computation of degree-constrained subgraphs as an example of this paradigm.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116307152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Alexandre Chabot, Ihsen Alouani, S. Niar, R. Nouacer
Technological advances make it possible to produce increasingly complex electronic components. Nevertheless, these advances are convoyed by an increasing sensitivity to operating conditions and an accelerated aging process. In safety critical applications, it is vital to provide solutions to avoid these limitations and to guarantee a high level of reliability. In most of the existing methods in the literature only Single Event Upsets (SEU) are assumed. The next generations of embedded systems must on one side support Multiple-Bit Upsets (MBU) and avoid to induce a significant memory and processing overheads on the other side. This paper proposes a new method to increase the reliability of SRAM, without dramatically increasing costs in memory space and processing time. Our method, named DPSR for Double Parity Single Redundancy, offers a high level of reliability and takes into fault patterns occurring in real conditions.
技术的进步使生产越来越复杂的电子元件成为可能。然而，这些进步伴随着对操作条件的日益敏感和老化过程的加速。在安全关键应用中，提供解决方案以避免这些限制并保证高水平的可靠性至关重要。在文献中的大多数现有方法中，只假设了单事件扰动(SEU)。下一代嵌入式系统必须一方面支持多比特干扰(multi - bit upset, MBU)，另一方面又要避免导致大量的内存和处理开销。本文提出了一种新的方法来提高SRAM的可靠性，而不会显著增加存储空间和处理时间的成本。我们的方法，双奇偶单冗余的DPSR，提供了高水平的可靠性，并考虑到在实际情况下发生的故障模式。
{"title":"A new memory reliability technique for multiple bit upsets mitigation","authors":"Alexandre Chabot, Ihsen Alouani, S. Niar, R. Nouacer","doi":"10.1145/3310273.3321564","DOIUrl":"https://doi.org/10.1145/3310273.3321564","url":null,"abstract":"Technological advances make it possible to produce increasingly complex electronic components. Nevertheless, these advances are convoyed by an increasing sensitivity to operating conditions and an accelerated aging process. In safety critical applications, it is vital to provide solutions to avoid these limitations and to guarantee a high level of reliability. In most of the existing methods in the literature only Single Event Upsets (SEU) are assumed. The next generations of embedded systems must on one side support Multiple-Bit Upsets (MBU) and avoid to induce a significant memory and processing overheads on the other side. This paper proposes a new method to increase the reliability of SRAM, without dramatically increasing costs in memory space and processing time. Our method, named DPSR for Double Parity Single Redundancy, offers a high level of reliability and takes into fault patterns occurring in real conditions.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124298252","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Location-aware applications have witnessed massive worldwide growth in recent years due to the introduction and advancement of smartphones. Most of these applications rely on the Global Positioning System (GPS) which is not available in indoor environments. As a result, Wi-Fi fingerprinting is becoming increasingly popular as an alternative as it allows localizing users in indoor environments, has lower power consumption, and is also more economical as it does not require a dedicated sensor other than a Wi-Fi card. The technique allows a service provider (SP) to construct a Wi-Fi database (called radio map) that can be used as a reference point to localize a user. However, this process does not preserve the user privacy, as the location can only be computed interactively with the SP. The service provider may also reveal sensitive information on the indoor space (e.g. the building map) to the user. Thus, we need an indoor localization protocol that addresses the privacy of both parties. In this paper, we present a privacy-preserving cryptographic protocol for indoor Wi-Fi localization, that prevents the SP from learning the exact location of the user outside of certain pre-defined sensitive areas, while keeping the SP's database secure. Thus, both parties cannot learn anything about each other's input beyond the implicit output revealed.
{"title":"A privacy-preserving protocol for indoor wi-fi localization","authors":"S. N. Eshun, P. Palmieri","doi":"10.1145/3310273.3323400","DOIUrl":"https://doi.org/10.1145/3310273.3323400","url":null,"abstract":"Location-aware applications have witnessed massive worldwide growth in recent years due to the introduction and advancement of smartphones. Most of these applications rely on the Global Positioning System (GPS) which is not available in indoor environments. As a result, Wi-Fi fingerprinting is becoming increasingly popular as an alternative as it allows localizing users in indoor environments, has lower power consumption, and is also more economical as it does not require a dedicated sensor other than a Wi-Fi card. The technique allows a service provider (SP) to construct a Wi-Fi database (called radio map) that can be used as a reference point to localize a user. However, this process does not preserve the user privacy, as the location can only be computed interactively with the SP. The service provider may also reveal sensitive information on the indoor space (e.g. the building map) to the user. Thus, we need an indoor localization protocol that addresses the privacy of both parties. In this paper, we present a privacy-preserving cryptographic protocol for indoor Wi-Fi localization, that prevents the SP from learning the exact location of the user outside of certain pre-defined sensitive areas, while keeping the SP's database secure. Thus, both parties cannot learn anything about each other's input beyond the implicit output revealed.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134126751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zhou Cheng, Jixiang Wang, T. Qi, Junfeng Zhao, Zhihong Wang, Yi Guo, Yu Zhou
The forecast and analysis of the trend of the RMB exchange rate have been deeply explored by many researchers in the financial field, but the combination of public opinion sentiment data and historical market data to forecast the RMB exchange rate in the short term has been studied little. With the rapid development of the Internet, the influence of public opinion sentiment on the economy and society is increasing. Online public opinion sentiment data not only have an impact on stock prices [1] and commodity prices, but also have a significant impact on foreign exchange (Forex) rates. However, the public opinion data are not applied for the RMB exchange rate forecast, because the impact of public events on the exchange rate is ignored. Besides, the lack of exact temporal sliding window of public opinion ignores its timeliness and sensibility.
{"title":"Will sentiment of forex news effect forecast of the RMB exchange rate?: POSTER","authors":"Zhou Cheng, Jixiang Wang, T. Qi, Junfeng Zhao, Zhihong Wang, Yi Guo, Yu Zhou","doi":"10.1145/3310273.3323422","DOIUrl":"https://doi.org/10.1145/3310273.3323422","url":null,"abstract":"The forecast and analysis of the trend of the RMB exchange rate have been deeply explored by many researchers in the financial field, but the combination of public opinion sentiment data and historical market data to forecast the RMB exchange rate in the short term has been studied little. With the rapid development of the Internet, the influence of public opinion sentiment on the economy and society is increasing. Online public opinion sentiment data not only have an impact on stock prices [1] and commodity prices, but also have a significant impact on foreign exchange (Forex) rates. However, the public opinion data are not applied for the RMB exchange rate forecast, because the impact of public events on the exchange rate is ignored. Besides, the lack of exact temporal sliding window of public opinion ignores its timeliness and sensibility.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134510342","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Implementations of ARX ciphers are hoped to have some intrinsic side channel resilience owing to the specific choice of cipher components: modular addition (A), rotation (R) and exclusive-or (X). Previous work has contributed to this understanding by developing theory regarding the side channel resilience of components (pioneered by the early works of Prouff) as well as some more recent practical investigations by Biryukov et al. that focused on lightweight cipher constructions. We add to this work by specifically studying ARX-boxes both mathematically as well as practically. Our results show that previous works' reliance on the simplistic assumption that intermediates independently leak (their Hamming weight) has led to the incorrect conclusion that the modular addition is necessarily the best target and that ARX constructions are therefore harder to attack in practice: we show that on an ARM M0, the best practical target is the exclusive or and attacks succeed with only tens of traces.
{"title":"Examining the practical side channel resilience of ARX-boxes","authors":"Yan Yan, E. Oswald","doi":"10.1145/3310273.3323399","DOIUrl":"https://doi.org/10.1145/3310273.3323399","url":null,"abstract":"Implementations of ARX ciphers are hoped to have some intrinsic side channel resilience owing to the specific choice of cipher components: modular addition (A), rotation (R) and exclusive-or (X). Previous work has contributed to this understanding by developing theory regarding the side channel resilience of components (pioneered by the early works of Prouff) as well as some more recent practical investigations by Biryukov et al. that focused on lightweight cipher constructions. We add to this work by specifically studying ARX-boxes both mathematically as well as practically. Our results show that previous works' reliance on the simplistic assumption that intermediates independently leak (their Hamming weight) has led to the incorrect conclusion that the modular addition is necessarily the best target and that ARX constructions are therefore harder to attack in practice: we show that on an ARM M0, the best practical target is the exclusive or and attacks succeed with only tens of traces.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124266324","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Anastasiia Butko, George Michelogiannakis, D. Donofrio, J. Shalf
Extensive research in material science together with outstanding engineering efforts allowed quantum technology to be significantly improved hence enabling continuing scaling of quantum circuit size. In around 10 years, quantum annealing circuits have reached 103 qubits and trailing by several years, universal quantum circuits now demonstrate similar trends. From the current trends we can expect that quantum computers will reach thousands of qubits in the next 5--10 years.
{"title":"Extending classical processors to support future large scale quantum accelerators","authors":"Anastasiia Butko, George Michelogiannakis, D. Donofrio, J. Shalf","doi":"10.1145/3310273.3324898","DOIUrl":"https://doi.org/10.1145/3310273.3324898","url":null,"abstract":"Extensive research in material science together with outstanding engineering efforts allowed quantum technology to be significantly improved hence enabling continuing scaling of quantum circuit size. In around 10 years, quantum annealing circuits have reached 103 qubits and trailing by several years, universal quantum circuits now demonstrate similar trends. From the current trends we can expect that quantum computers will reach thousands of qubits in the next 5--10 years.","PeriodicalId":431860,"journal":{"name":"Proceedings of the 16th ACM International Conference on Computing Frontiers","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114379953","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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