Fog computing aims to support novel real-time applications by extending cloud resources to the network edge. This technology is highly heterogeneous and comprises a wide variety of devices interconnected through the so-called fog layer. Compared to traditional cloud infrastructure, fog presents more varied reliability challenges, due to its constrained resources and mobility of nodes. This paper summarizes current research efforts on fault tolerance and dependability in fog computing and identifies less investigated open problems, which constitute interesting research directions to make fogs more dependable.
{"title":"A preliminary roadmap for dependability research in fog computing","authors":"Z. Bakhshi, G. Rodríguez-Navas","doi":"10.1145/3378408.3378410","DOIUrl":"https://doi.org/10.1145/3378408.3378410","url":null,"abstract":"Fog computing aims to support novel real-time applications by extending cloud resources to the network edge. This technology is highly heterogeneous and comprises a wide variety of devices interconnected through the so-called fog layer. Compared to traditional cloud infrastructure, fog presents more varied reliability challenges, due to its constrained resources and mobility of nodes. This paper summarizes current research efforts on fault tolerance and dependability in fog computing and identifies less investigated open problems, which constitute interesting research directions to make fogs more dependable.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114078404","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Harrison Kurunathan, Ricardo Severino, A. Koubâa, E. Tovar
Deterministic Synchronous Multichannel Extension (DSME) is a prominent MAC behavior first introduced in IEEE 802.15.4e. It can avail deterministic and best effort Service using its multisuperframe structure. RPL is a routing protocol for wireless networks with low power consumption and generally susceptible to packet loss. These two standards were designed independently but with the common objective to satisfy the requirements of IoT devices in terms of limited energy, reliability and determinism. A combination of these two protocols can integrate real-time QoS demanding and large-scale IoT networks. In this paper, we propose a new multi-channel, multi-timeslot scheduling algorithm called Symphony that provides QoS efficient schedules in DSME networks. In this paper we provide analytical and simulation based delay analysis for our approach against some state of the art algorithms. In this work, we show that integrating routing with DSME can improve reliability by 40% and by using Symphony, we can reduce the network delay by 10--20% against the state of the art algorithms.
{"title":"Symphony: routing aware scheduling for DSME networks","authors":"Harrison Kurunathan, Ricardo Severino, A. Koubâa, E. Tovar","doi":"10.1145/3378408.3378412","DOIUrl":"https://doi.org/10.1145/3378408.3378412","url":null,"abstract":"Deterministic Synchronous Multichannel Extension (DSME) is a prominent MAC behavior first introduced in IEEE 802.15.4e. It can avail deterministic and best effort Service using its multisuperframe structure. RPL is a routing protocol for wireless networks with low power consumption and generally susceptible to packet loss. These two standards were designed independently but with the common objective to satisfy the requirements of IoT devices in terms of limited energy, reliability and determinism. A combination of these two protocols can integrate real-time QoS demanding and large-scale IoT networks. In this paper, we propose a new multi-channel, multi-timeslot scheduling algorithm called Symphony that provides QoS efficient schedules in DSME networks. In this paper we provide analytical and simulation based delay analysis for our approach against some state of the art algorithms. In this work, we show that integrating routing with DSME can improve reliability by 40% and by using Symphony, we can reduce the network delay by 10--20% against the state of the art algorithms.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129152923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A carefully designed routing synthesis can help system designers achieve a better load balancing in TSN-based networks and avoid congestion. To this end purpose, this work proposes two heuristics referred to as (1) LB-DRR, which aims at achieving a better load balancing and compute as much disjoint routing paths as possible for each replicated flow; and (2) CR-DRR, which recomputes paths for time-sensitive flows in congestion situations. Extensive simulations demonstrate that the proposed approach outperforms the classical Shortest Path (SPA) and the weighted Equal Cost Multi-path (wt-ECMP) algorithms in terms of the maximum load transmitted on a link by more than 70% and 20%, respectively.
{"title":"Routing heuristics for load-balanced transmission in TSN-based networks","authors":"M. Ojewale, P. Yomsi","doi":"10.1145/3378408.3378411","DOIUrl":"https://doi.org/10.1145/3378408.3378411","url":null,"abstract":"A carefully designed routing synthesis can help system designers achieve a better load balancing in TSN-based networks and avoid congestion. To this end purpose, this work proposes two heuristics referred to as (1) LB-DRR, which aims at achieving a better load balancing and compute as much disjoint routing paths as possible for each replicated flow; and (2) CR-DRR, which recomputes paths for time-sensitive flows in congestion situations. Extensive simulations demonstrate that the proposed approach outperforms the classical Shortest Path (SPA) and the weighted Equal Cost Multi-path (wt-ECMP) algorithms in terms of the maximum load transmitted on a link by more than 70% and 20%, respectively.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126656399","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
U. Agarwal, Vara Punit Ashokbhai, Gedare Bloom, Christian Mauderer, J. Sherrill
Real-Time Executive for Multiprocessor Systems (RTEMS) is an open-source real-time operating system (RTOS) that is widely used in commercial and free embedded applications with notable adoption in space flight software and scientific instrument control for space science and high energy physics. RTEMS has rich support for POSIX environments and supports multiple POSIX and BSD file systems, along with some custom file systems designed specifically to meet the needs of real-time and embedded applications storage and retrieval of data. The range of file systems available in RTEMS motivates this study that investigates the salient features of each file system to help identify strengths and weaknesses with respect to application requirements and constraints. In this paper, we provide a comparison of the available RTEMS file systems and present some performance benchmarking results.
{"title":"Comparison of file systems in RTEMS","authors":"U. Agarwal, Vara Punit Ashokbhai, Gedare Bloom, Christian Mauderer, J. Sherrill","doi":"10.1145/3373400.3373406","DOIUrl":"https://doi.org/10.1145/3373400.3373406","url":null,"abstract":"Real-Time Executive for Multiprocessor Systems (RTEMS) is an open-source real-time operating system (RTOS) that is widely used in commercial and free embedded applications with notable adoption in space flight software and scientific instrument control for space science and high energy physics. RTEMS has rich support for POSIX environments and supports multiple POSIX and BSD file systems, along with some custom file systems designed specifically to meet the needs of real-time and embedded applications storage and retrieval of data. The range of file systems available in RTEMS motivates this study that investigates the salient features of each file system to help identify strengths and weaknesses with respect to application requirements and constraints. In this paper, we provide a comparison of the available RTEMS file systems and present some performance benchmarking results.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123426248","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Runtime monitoring tools have become fundamental to assess the correct operation of complex systems and applications. Unfortunately, the more precise is the monitoring (sampling rate, information granularity, and so on), the higher is the overhead introduced in the system itself. In this paper, we propose a new load shedding framework that enables runtime adaptation of monitoring agents under heavy system load, exploiting an heuristic Load Manager to control the agent status and a runtime support for domain-specific policies. We implemented the proposed methodology on Sysdig, with an average control error improvement of 3.51x (12.25x at most), w.r.t. previous solutions.
{"title":"Performance-aware load shedding for monitoring events in container based environments","authors":"Rolando Brondolin, M. Ferroni, M. Santambrogio","doi":"10.1145/3373400.3373404","DOIUrl":"https://doi.org/10.1145/3373400.3373404","url":null,"abstract":"Runtime monitoring tools have become fundamental to assess the correct operation of complex systems and applications. Unfortunately, the more precise is the monitoring (sampling rate, information granularity, and so on), the higher is the overhead introduced in the system itself. In this paper, we propose a new load shedding framework that enables runtime adaptation of monitoring agents under heavy system load, exploiting an heuristic Load Manager to control the agent status and a runtime support for domain-specific policies. We implemented the proposed methodology on Sysdig, with an average control error improvement of 3.51x (12.25x at most), w.r.t. previous solutions.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129002006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hiroki Nishikawa, Kaname Shimada, Ittetsu Taniguchi, H. Tomiyama
This paper proposes an energy-aware scheduling of malleable fork-join (MFJ) tasks on heterogeneous multicores. This work allows a task to be split into multiple sub-tasks for fork-join parallel execution. The number of the sub-tasks is determined simultaneously with scheduling. Our scheduling technique aims at the minimization of energy consumption under a deadline constraint. In addition, this paper proposes a technique for simultaneous scheduling and core-type optimization. The technique optimally decides types of cores (to be either "big" or "little") at the same time as MFJ task scheduling in order to further reduce energy consumption.
{"title":"Energy-aware scheduling of malleable fork-join tasks under a deadline constraint on heterogeneous multicores","authors":"Hiroki Nishikawa, Kaname Shimada, Ittetsu Taniguchi, H. Tomiyama","doi":"10.1145/3373400.3373409","DOIUrl":"https://doi.org/10.1145/3373400.3373409","url":null,"abstract":"This paper proposes an energy-aware scheduling of malleable fork-join (MFJ) tasks on heterogeneous multicores. This work allows a task to be split into multiple sub-tasks for fork-join parallel execution. The number of the sub-tasks is determined simultaneously with scheduling. Our scheduling technique aims at the minimization of energy consumption under a deadline constraint. In addition, this paper proposes a technique for simultaneous scheduling and core-type optimization. The technique optimally decides types of cores (to be either \"big\" or \"little\") at the same time as MFJ task scheduling in order to further reduce energy consumption.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129938401","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper studies scheduling of malleable fork-join tasks. In our scheduling problem, each task can be partitioned into multiple sub-tasks, and the sub-tasks are scheduled independently. The optimal number of sub-tasks is determined during scheduling simultaneously. This paper formulates the scheduling problem as an integer linear programming problem.
{"title":"ILP-based scheduling for malleable fork-join tasks","authors":"Kaname Shimada, Ittetsu Taniguchi, H. Tomiyama","doi":"10.1145/3373400.3373403","DOIUrl":"https://doi.org/10.1145/3373400.3373403","url":null,"abstract":"This paper studies scheduling of malleable fork-join tasks. In our scheduling problem, each task can be partitioned into multiple sub-tasks, and the sub-tasks are scheduled independently. The optimal number of sub-tasks is determined during scheduling simultaneously. This paper formulates the scheduling problem as an integer linear programming problem.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125221370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
General-purpose programming languages C and C++ address only the functional aspect of programs. In contrast, real-time programming languages address not only the functional aspect but also the nonfunctional real-time aspect to automatically ensure the consistency of both aspects in the resulting code. Despite many real-time programming languages proposed in the literature, embedded and real-time programs for economical reasons have continued to be written in C/C++ with their real-time aspect being dealt separately using modeling tools (e.g., MATLAB/Simulink) and the consistency of both aspects being checked manually. As embedded and real-time systems permeate through people's lives, it becomes increasingly imperative that both aspects be kept consistent automatically to improve the reliability of the systems. To that end, we propose a real-time programming language called Tice with three novel features: (1) Tice programs are written as modern standard C++ programs. (2) Tice programs can be compiled using any modern off-the-shelf standard C++ compiler. (3) Tice programs compose with other C/C++ programs as C++ libraries. These novel features make Tice significantly more economical than other real-time programming languages proposed in the literature.
{"title":"C++ hard-real-time active library: syntax, semantics, and compilation of Tice programs","authors":"Tadeus Prastowo, L. Palopoli, Luca Abeni","doi":"10.1145/3373400.3373411","DOIUrl":"https://doi.org/10.1145/3373400.3373411","url":null,"abstract":"General-purpose programming languages C and C++ address only the functional aspect of programs. In contrast, real-time programming languages address not only the functional aspect but also the nonfunctional real-time aspect to automatically ensure the consistency of both aspects in the resulting code. Despite many real-time programming languages proposed in the literature, embedded and real-time programs for economical reasons have continued to be written in C/C++ with their real-time aspect being dealt separately using modeling tools (e.g., MATLAB/Simulink) and the consistency of both aspects being checked manually. As embedded and real-time systems permeate through people's lives, it becomes increasingly imperative that both aspects be kept consistent automatically to improve the reliability of the systems. To that end, we propose a real-time programming language called Tice with three novel features: (1) Tice programs are written as modern standard C++ programs. (2) Tice programs can be compiled using any modern off-the-shelf standard C++ compiler. (3) Tice programs compose with other C/C++ programs as C++ libraries. These novel features make Tice significantly more economical than other real-time programming languages proposed in the literature.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123541069","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this work, we introduce a power-consumption model for heterogeneous multicore architectures that captures the variability of energy consumption based on processing workload type, in addition to the classical variables considered in the literature, like type and frequency of the CPU. We motivate the approach presenting experimental results gathered on a Odroid-XU3 board equipped with an Arm big.LITTLE CPU, showing that power consumption has a non-negligible dependency on the workload type. We also present a model to define the execution time of the tasks, which depends on both the workload, and the CPU frequency and architecture. We present our modifications to the open-source RTSIM real-time scheduling simulator to extend its CPU power consumption and execution time duration models, integrating results taken from the real platform. The presented work constitutes a useful base for future research in power-aware real-time scheduling on heterogeneous platforms.
{"title":"Modeling and simulation of power consumption and execution times for real-time tasks on embedded heterogeneous architectures","authors":"Alessio Balsini, Luigi Pannocchi, T. Cucinotta","doi":"10.1145/3373400.3373408","DOIUrl":"https://doi.org/10.1145/3373400.3373408","url":null,"abstract":"In this work, we introduce a power-consumption model for heterogeneous multicore architectures that captures the variability of energy consumption based on processing workload type, in addition to the classical variables considered in the literature, like type and frequency of the CPU.\u0000 We motivate the approach presenting experimental results gathered on a Odroid-XU3 board equipped with an Arm big.LITTLE CPU, showing that power consumption has a non-negligible dependency on the workload type. We also present a model to define the execution time of the tasks, which depends on both the workload, and the CPU frequency and architecture. We present our modifications to the open-source RTSIM real-time scheduling simulator to extend its CPU power consumption and execution time duration models, integrating results taken from the real platform.\u0000 The presented work constitutes a useful base for future research in power-aware real-time scheduling on heterogeneous platforms.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125574468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article proposes an automata-based model for describing and verifying the behavior of thread management code in the Linux PREEMPT_RT kernel, on a single-core system. The automata model defines the events that influence the timing behavior of the execution of threads, and the relations among them. This article also presents the extension of the Linux trace features that enable the trace of such events in a real system. Finally, one example is presented of how the presented model and tracing tool helped catching an inefficiency bug in the scheduler code and ultimately led to improving the kernel.
{"title":"Modeling the behavior of threads in the PREEMPT_RT Linux kernel using automata","authors":"D. B. D. Oliveira, T. Cucinotta, R. S. Oliveira","doi":"10.1145/3373400.3373410","DOIUrl":"https://doi.org/10.1145/3373400.3373410","url":null,"abstract":"This article proposes an automata-based model for describing and verifying the behavior of thread management code in the Linux PREEMPT_RT kernel, on a single-core system. The automata model defines the events that influence the timing behavior of the execution of threads, and the relations among them. This article also presents the extension of the Linux trace features that enable the trace of such events in a real system. Finally, one example is presented of how the presented model and tracing tool helped catching an inefficiency bug in the scheduler code and ultimately led to improving the kernel.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125599881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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