Small teams of cooperating robots have been shown to be useful in a myriad of applications, with robots communicating with one another in real-time, be it multimedia, motion control or position information. Their mobility leads to a dynamic network mesh topology through which communications have to be routed, interfering in intricate patterns that vary with time, with the number of active robots in the team, and with their relative positions. In this short paper we advocate that routing for small teams of cooperating robots benefits from global synchronization and immediate forwarding, supporting composability of communications in the time domain by isolating the paths of each flow in separate time slots.
{"title":"Composable routing in mobile mesh networks","authors":"Luis Oliveira, L. Almeida","doi":"10.1145/3166227.3166235","DOIUrl":"https://doi.org/10.1145/3166227.3166235","url":null,"abstract":"Small teams of cooperating robots have been shown to be useful in a myriad of applications, with robots communicating with one another in real-time, be it multimedia, motion control or position information. Their mobility leads to a dynamic network mesh topology through which communications have to be routed, interfering in intricate patterns that vary with time, with the number of active robots in the team, and with their relative positions. In this short paper we advocate that routing for small teams of cooperating robots benefits from global synchronization and immediate forwarding, supporting composability of communications in the time domain by isolating the paths of each flow in separate time slots.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127216441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper we highlight challenges of the applicability of contracting (based on assumptions and guarantees) for cyber-physical systems design. We illustrate in an example the limitations of an entirely composability-centered contracting approach. An alternative approach is subsequently proposed and applied to the presented example to illustrate that it is capable of handling the limitations demonstrated for the composable approach.
{"title":"Contracting challenges for system design and integration","authors":"Mischa Möstl, R. Ernst","doi":"10.1145/3166227.3166236","DOIUrl":"https://doi.org/10.1145/3166227.3166236","url":null,"abstract":"In this paper we highlight challenges of the applicability of contracting (based on assumptions and guarantees) for cyber-physical systems design. We illustrate in an example the limitations of an entirely composability-centered contracting approach. An alternative approach is subsequently proposed and applied to the presented example to illustrate that it is capable of handling the limitations demonstrated for the composable approach.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124333157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
More and more infrastructure is becoming virtualized. Recently this trend has begun to include network functions - such as firewalls, WAN optimizers, and intrusion prevention systems - that have traditionally been implemented as middleboxes using dedicated hardware. This trend towards network function virtualization (NFV) offers a variety of potential benefits that resemble those of cloud computing, including consolidation, easier management, higher efficiency, and better scalability. However, current cloud technology is not a perfect match for NFV workloads: since the infrastructure is shared, the time it takes for a packet to pass through a particular function is no longer predictable, and can in fact vary considerably. This is causing headaches for operators, who can no longer treat network functions as "bumps in the wire" and must now consider a complex web of possible interactions and cross-talk when operating or diagnosing their systems. In this position paper, we propose a compositional approach towards building a scalable NFV platform that can provide latency and throughput guarantees using timing interfaces. We discuss our preliminary results that leverage and extend recent advances on timing interfaces and compositional theory from the real-time systems domain to the NFV setting, and we highlight open challenges and potential directions towards real-time NFV.
{"title":"Real-time network function virtualization with timing interfaces","authors":"L. T. Phan","doi":"10.1145/3166227.3166238","DOIUrl":"https://doi.org/10.1145/3166227.3166238","url":null,"abstract":"More and more infrastructure is becoming virtualized. Recently this trend has begun to include network functions - such as firewalls, WAN optimizers, and intrusion prevention systems - that have traditionally been implemented as middleboxes using dedicated hardware. This trend towards network function virtualization (NFV) offers a variety of potential benefits that resemble those of cloud computing, including consolidation, easier management, higher efficiency, and better scalability. However, current cloud technology is not a perfect match for NFV workloads: since the infrastructure is shared, the time it takes for a packet to pass through a particular function is no longer predictable, and can in fact vary considerably. This is causing headaches for operators, who can no longer treat network functions as \"bumps in the wire\" and must now consider a complex web of possible interactions and cross-talk when operating or diagnosing their systems.\u0000 In this position paper, we propose a compositional approach towards building a scalable NFV platform that can provide latency and throughput guarantees using timing interfaces. We discuss our preliminary results that leverage and extend recent advances on timing interfaces and compositional theory from the real-time systems domain to the NFV setting, and we highlight open challenges and potential directions towards real-time NFV.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130149835","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Björn Andersson, Hyoseung Kim, J. Lehoczky, Dionisio de Niz
Many solutions for composability and compositionality rely on specifying the interface for a component using bandwidth. Some previous works specify period (P) and budget (Q) as an interface for a component. Q/P provides us with a bandwidth (the share of a processor that this component may request); P specifies the time granularity of the allocation of this processing capacity. Other works add another parameter, deadline, which can help to provide tighter bounds on how this processing capacity is distributed. Yet other works use the parameters α and Δ where α is the bandwidth and Δ specifies how smoothly this bandwidth is distributed. It is known [4] that such bandwidth-like interfaces carry a cost: there are tasksets that could be guaranteed to be schedulable if tasks were scheduled directly on the processor, but with bandwidth-like interfaces, it is impossible to guarantee the taskset to be schedulable. It is known that this penalty can be infinite, i.e., the use of bandwidth-like interfaces may require the use of a processor that has a speed that is k times faster, and one can show this for any k. This brings the following question: "What is the average-case performance penalty of bandwidth-like interfaces?" A previous paper [5] has partially answered this question by stating an expression on this penalty as a function of taskset parameters and then randomly generated tasksets to obtain a probability distribution of this penalty. In this paper, we answer this question analytically for the case that the taskset has tasks with infinite minimum inter-arrival time, equal task density, uniformly distributed deadlines, and the number of tasks approaches infinity. For this specific case, we derive an expression; if deadlines are uniformly distributed in [0,1], then we find that the penalty is two. We also run experiments to explore systems with these assumptions but for finite number of tasks. From these experiments, we conclude that (i) the larger the number of tasks is, the larger the penalty is, (ii) the larger the number of tasks is, the less skewed the probability distribution is, and (iii) the larger the number of tasks is, the smaller the variance of the penalty is. We are currently working on the case where deadlines follow other distributions.
{"title":"Deriving the average-case performance of bandwidth-like interfaces for tasksets with infinite minimum inter-arrival time, equal task density, uniformly distributed deadlines, and infinite number of tasks","authors":"Björn Andersson, Hyoseung Kim, J. Lehoczky, Dionisio de Niz","doi":"10.1145/3166227.3166229","DOIUrl":"https://doi.org/10.1145/3166227.3166229","url":null,"abstract":"Many solutions for composability and compositionality rely on specifying the interface for a component using bandwidth. Some previous works specify period (P) and budget (Q) as an interface for a component. Q/P provides us with a bandwidth (the share of a processor that this component may request); P specifies the time granularity of the allocation of this processing capacity. Other works add another parameter, deadline, which can help to provide tighter bounds on how this processing capacity is distributed. Yet other works use the parameters α and Δ where α is the bandwidth and Δ specifies how smoothly this bandwidth is distributed. It is known [4] that such bandwidth-like interfaces carry a cost: there are tasksets that could be guaranteed to be schedulable if tasks were scheduled directly on the processor, but with bandwidth-like interfaces, it is impossible to guarantee the taskset to be schedulable. It is known that this penalty can be infinite, i.e., the use of bandwidth-like interfaces may require the use of a processor that has a speed that is k times faster, and one can show this for any k. This brings the following question: \"What is the average-case performance penalty of bandwidth-like interfaces?\" A previous paper [5] has partially answered this question by stating an expression on this penalty as a function of taskset parameters and then randomly generated tasksets to obtain a probability distribution of this penalty. In this paper, we answer this question analytically for the case that the taskset has tasks with infinite minimum inter-arrival time, equal task density, uniformly distributed deadlines, and the number of tasks approaches infinity. For this specific case, we derive an expression; if deadlines are uniformly distributed in [0,1], then we find that the penalty is two. We also run experiments to explore systems with these assumptions but for finite number of tasks. From these experiments, we conclude that (i) the larger the number of tasks is, the larger the penalty is, (ii) the larger the number of tasks is, the less skewed the probability distribution is, and (iii) the larger the number of tasks is, the smaller the variance of the penalty is. We are currently working on the case where deadlines follow other distributions.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114833548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Maryam Bagheri, E. Khamespanah, M. Sirjani, Ali Movaghar-Rahimabadi, Edward A. Lee
In this paper we address the development of dependable self-adaptive systems focusing on the specific domain of track-based traffic control systems where timing issues are critical.
{"title":"Runtime compositional analysis of track-based traffic control systems","authors":"Maryam Bagheri, E. Khamespanah, M. Sirjani, Ali Movaghar-Rahimabadi, Edward A. Lee","doi":"10.1145/3166227.3166233","DOIUrl":"https://doi.org/10.1145/3166227.3166233","url":null,"abstract":"In this paper we address the development of dependable self-adaptive systems focusing on the specific domain of track-based traffic control systems where timing issues are critical.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130251095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Ayed, Jean-Luc Scharbarg, Jérôme Ermont, C. Fraboul
A heterogeneous network, where a switched-Ethernet backbone, e.g. AFDX, interconnects several end systems based on Network-on-Chip (NoC), is a promising candidate to build new avionics architectures. When using such a heterogeneous network for real-time applications, a global worst-case traversal time (WCTT) analysis is needed. In this short paper we focus on the intra-NoC communication on a Tilera TILE64-like NoC. First, we extend the Recursive Calculus (RC) to achieve tighter intra-NoC WCTT. Then, we explain how this intra-NoC WCTT analysis could be used in a compositional manner for the end-to-end inter-NoC delay analysis.
{"title":"Extended recursive analysis for tilera tile64 NoC architectures: towards inter-NoC delay analysis","authors":"H. Ayed, Jean-Luc Scharbarg, Jérôme Ermont, C. Fraboul","doi":"10.1145/3166227.3166232","DOIUrl":"https://doi.org/10.1145/3166227.3166232","url":null,"abstract":"A heterogeneous network, where a switched-Ethernet backbone, e.g. AFDX, interconnects several end systems based on Network-on-Chip (NoC), is a promising candidate to build new avionics architectures. When using such a heterogeneous network for real-time applications, a global worst-case traversal time (WCTT) analysis is needed. In this short paper we focus on the intra-NoC communication on a Tilera TILE64-like NoC. First, we extend the Recursive Calculus (RC) to achieve tighter intra-NoC WCTT. Then, we explain how this intra-NoC WCTT analysis could be used in a compositional manner for the end-to-end inter-NoC delay analysis.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"221 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123021882","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In order to increase the flexibility of design process, we consider a component-based system in which some components may be changed, repaired, or upgraded. We assume that the worst-case execution time (WCET) of each task that is implemented by a component is known. Our first goal is to find the smallest set of periods that make the task set schedulable by EDF or by RM. We call these periods safe periods because then any period assignment which is larger than the safe periods will be schedulable. Having safe periods, system designer will be able to use any optimization criteria of his choice to assign periods of the tasks without a need to incorporate the response time analysis techniques, which are usually NP-Hard problems, into his optimization constraints. Instead, the schedulability constraint will be reduced to verifying that the assigned periods are larger than the safe periods. Our solution for safe periods for the RM, is based on finding the smallest set of harmonic periods with utilization 1. Here we use our recently developed polynomial-time approximation algorithm with bounded error of 2 for finding these safe periods for RM. As the second part of our contribution, we consider the robustness property. First we explain how to find safe periods such that a certain level of robustness (based on potential changes of each component) is guaranteed. Doing this, if one of the components changes in the future, other components can still run using their previous periods, and hence, we isolate the effect of future changes from parameters of the other components. Finally, we obtain the robustness factor as a function of the available spare capacity of the system, i.e., the unused utilization. We determine to what extend the WCET of any of the components can be increased without violating the safe periods.
{"title":"On flexible and robust parameter assignment for periodic real-time components","authors":"M. Nasri","doi":"10.1145/3166227.3166228","DOIUrl":"https://doi.org/10.1145/3166227.3166228","url":null,"abstract":"In order to increase the flexibility of design process, we consider a component-based system in which some components may be changed, repaired, or upgraded. We assume that the worst-case execution time (WCET) of each task that is implemented by a component is known. Our first goal is to find the smallest set of periods that make the task set schedulable by EDF or by RM. We call these periods safe periods because then any period assignment which is larger than the safe periods will be schedulable. Having safe periods, system designer will be able to use any optimization criteria of his choice to assign periods of the tasks without a need to incorporate the response time analysis techniques, which are usually NP-Hard problems, into his optimization constraints. Instead, the schedulability constraint will be reduced to verifying that the assigned periods are larger than the safe periods. Our solution for safe periods for the RM, is based on finding the smallest set of harmonic periods with utilization 1. Here we use our recently developed polynomial-time approximation algorithm with bounded error of 2 for finding these safe periods for RM.\u0000 As the second part of our contribution, we consider the robustness property. First we explain how to find safe periods such that a certain level of robustness (based on potential changes of each component) is guaranteed. Doing this, if one of the components changes in the future, other components can still run using their previous periods, and hence, we isolate the effect of future changes from parameters of the other components. Finally, we obtain the robustness factor as a function of the available spare capacity of the system, i.e., the unused utilization. We determine to what extend the WCET of any of the components can be increased without violating the safe periods.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129552470","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wireless sensor and actuator networks (WSAN) are created through the integration of multiple nodes which acquire data and perform reaction based on them. In a general overview, sensor nodes of WSANs are responsible for data acquisition and sending them to a central node. The central node stores all the received data and performs reactions. Timing verification of WSAN applications to ensure schedulability of tasks is a challenge, and is generally performed by worst-case analysis. This process is error-prone and inherently conservative. On the other hand, using model checking for analyzing WSAN applications results in state space explosion even for middle-sized configurations. The reason is the necessity of considering the interleaving of the large number of sensors in WSANs. In this paper, we show how to build an actor-based model of WSAN applications, starting from sensor node-level and moving towards the full system, and we show how this compositional modeling improves analysability and modifiability. Realtime extension of actor model is appropriate for modeling WSAN applications where we have many concurrent and asynchronous processes, and interdependent realtime deadlines. We demonstrate the approach using a case study of a distributed realtime data acquisition system for high-frequency sensing, where Timed Rebeca is used for modeling. We use model checking to check the intra/inter-sensor node schedulability.
{"title":"A compositional approach for modeling and timing analysis of wireless sensor and actuator networks","authors":"M. Sirjani, E. Khamespanah, K. Mechitov, G. Agha","doi":"10.1145/3166227.3166237","DOIUrl":"https://doi.org/10.1145/3166227.3166237","url":null,"abstract":"Wireless sensor and actuator networks (WSAN) are created through the integration of multiple nodes which acquire data and perform reaction based on them. In a general overview, sensor nodes of WSANs are responsible for data acquisition and sending them to a central node. The central node stores all the received data and performs reactions. Timing verification of WSAN applications to ensure schedulability of tasks is a challenge, and is generally performed by worst-case analysis. This process is error-prone and inherently conservative. On the other hand, using model checking for analyzing WSAN applications results in state space explosion even for middle-sized configurations. The reason is the necessity of considering the interleaving of the large number of sensors in WSANs. In this paper, we show how to build an actor-based model of WSAN applications, starting from sensor node-level and moving towards the full system, and we show how this compositional modeling improves analysability and modifiability. Realtime extension of actor model is appropriate for modeling WSAN applications where we have many concurrent and asynchronous processes, and interdependent realtime deadlines. We demonstrate the approach using a case study of a distributed realtime data acquisition system for high-frequency sensing, where Timed Rebeca is used for modeling. We use model checking to check the intra/inter-sensor node schedulability.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134599505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In the last few years, multi-core processors entered into the domain of embedded systems: this, together with virtualization techniques, allows multiple applications to easily run on the same System-on-Chip (SoC). As power consumption remains one of the most impacting costs on any digital system, several approaches have been explored in literature to cope with power caps, trying to maximize the performance of the hosted applications. In this paper, we present some preliminary results and opportunities towards a performance-aware power capping orchestrator for the Xen hypervisor. The proposed solution, called XeMPUPiL, uses the Intel Running Average Power Limit (RAPL) hardware interface to set a strict limit on the processor's power consumption, while a software-level Observe-Decide-Act (ODA) loop performs an exploration of the available resource allocations to find the most power efficient one for the running workload. We show how XeMPUPiL is able to achieve higher performance under different power caps for almost all the different classes of benchmarks analyzed (e.g., CPU-, memory-and IO-bound).
{"title":"Towards a performance-aware power capping orchestrator for the Xen hypervisor","authors":"M. Arnaboldi, M. Ferroni, M. Santambrogio","doi":"10.1145/3199610.3199611","DOIUrl":"https://doi.org/10.1145/3199610.3199611","url":null,"abstract":"In the last few years, multi-core processors entered into the domain of embedded systems: this, together with virtualization techniques, allows multiple applications to easily run on the same System-on-Chip (SoC). As power consumption remains one of the most impacting costs on any digital system, several approaches have been explored in literature to cope with power caps, trying to maximize the performance of the hosted applications. In this paper, we present some preliminary results and opportunities towards a performance-aware power capping orchestrator for the Xen hypervisor. The proposed solution, called XeMPUPiL, uses the Intel Running Average Power Limit (RAPL) hardware interface to set a strict limit on the processor's power consumption, while a software-level Observe-Decide-Act (ODA) loop performs an exploration of the available resource allocations to find the most power efficient one for the running workload. We show how XeMPUPiL is able to achieve higher performance under different power caps for almost all the different classes of benchmarks analyzed (e.g., CPU-, memory-and IO-bound).","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126548146","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
F. Terraneo, A. Papadopoulos, A. Leva, M. Prandini
The development of distributed real-time systems often relies on clock synchronization. However, achieving precise synchronization in the field of Wireless Sensor Networks (WSNs) is hampered by competing design challenges, such as energy consumption and cost constraints, e.g., in Internet of Things applications. For these reasons many WSN hardware platforms rely on a low frequency clock crystal to provide the local timebase. Although this solution is inexpensive and allows for a remarkably low energy consumption, it limits the resolution at which time can be measured. The FLOPSYNC synchronization scheme provides low-energy synchronization that takes into account the quartz crystal imperfections. The main limitation of the approach are the effects of quantization. In this paper we propose a clock synchronization scheme that explicitly takes into account quantization effects caused by low frequency clock crystal, thus addressing the clock synchronization issue in cost-sensitive WSN node platforms. The solution adopts switched control for minimizing the effect of quantization, with minimal overhead. We provide experimental evidence that the approach manages to reach a synchronization error of at most 1 clock tick in a real WSN.
{"title":"FLOPSYNC-QACS: quantization-aware clock synchronization for wireless sensor networks","authors":"F. Terraneo, A. Papadopoulos, A. Leva, M. Prandini","doi":"10.1145/3177803.3177809","DOIUrl":"https://doi.org/10.1145/3177803.3177809","url":null,"abstract":"The development of distributed real-time systems often relies on clock synchronization. However, achieving precise synchronization in the field of Wireless Sensor Networks (WSNs) is hampered by competing design challenges, such as energy consumption and cost constraints, e.g., in Internet of Things applications. For these reasons many WSN hardware platforms rely on a low frequency clock crystal to provide the local timebase. Although this solution is inexpensive and allows for a remarkably low energy consumption, it limits the resolution at which time can be measured. The FLOPSYNC synchronization scheme provides low-energy synchronization that takes into account the quartz crystal imperfections. The main limitation of the approach are the effects of quantization.\u0000 In this paper we propose a clock synchronization scheme that explicitly takes into account quantization effects caused by low frequency clock crystal, thus addressing the clock synchronization issue in cost-sensitive WSN node platforms. The solution adopts switched control for minimizing the effect of quantization, with minimal overhead. We provide experimental evidence that the approach manages to reach a synchronization error of at most 1 clock tick in a real WSN.","PeriodicalId":447904,"journal":{"name":"SIGBED Rev.","volume":"175 11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133858199","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：