Pub Date : 2022-10-14DOI: 10.1109/IET-ICETA56553.2022.9971595
Kai-Chung Yu, Chih-Hsiung Shen
In this research, we discuss and analyze the thermal insulation microstructure which appropriately reduce the thermal conductivity and form a local channel where the heat flow is concentrated. As the channel becomes smaller, the thermal resistance increases and the noise will also increase. For the Johnson noise, the bandwidth can be reduced through subsequent electronic circuit signal processing. Although the response speed is sacrificed, the overall thermal sensing signal is improved in practical applications without introducing additional noise.
{"title":"Research on Novel Thermal Insulation Structure of CMOS-MEMS Thermopile","authors":"Kai-Chung Yu, Chih-Hsiung Shen","doi":"10.1109/IET-ICETA56553.2022.9971595","DOIUrl":"https://doi.org/10.1109/IET-ICETA56553.2022.9971595","url":null,"abstract":"In this research, we discuss and analyze the thermal insulation microstructure which appropriately reduce the thermal conductivity and form a local channel where the heat flow is concentrated. As the channel becomes smaller, the thermal resistance increases and the noise will also increase. For the Johnson noise, the bandwidth can be reduced through subsequent electronic circuit signal processing. Although the response speed is sacrificed, the overall thermal sensing signal is improved in practical applications without introducing additional noise.","PeriodicalId":46240,"journal":{"name":"IET Networks","volume":null,"pages":null},"PeriodicalIF":1.4,"publicationDate":"2022-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89482596","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, we proposed facial expression recognition based on snaking data access and pipeline convolution neural network. This paper performs an expression recognition system composed of fast convolution operations. We use Winograd algorithm to reduce the number of multipliers and design data reuse, pipeline and Snaking data access structures to increase the performance of the chip. Therefore, the chip can perform high-speed computing and achieve a well facial expression recognition rate.
{"title":"Facial Expression Recognition Based on Snaking Data Access and Pipeline Convolution Neural Network","authors":"Chi-Chang Lin, Chia-Yu Hsieh, Ping-Cheng Wu, Ping-Chun Chen, You-Sheng Xiao, Yunqi Fan","doi":"10.1109/IET-ICETA56553.2022.9971645","DOIUrl":"https://doi.org/10.1109/IET-ICETA56553.2022.9971645","url":null,"abstract":"In this paper, we proposed facial expression recognition based on snaking data access and pipeline convolution neural network. This paper performs an expression recognition system composed of fast convolution operations. We use Winograd algorithm to reduce the number of multipliers and design data reuse, pipeline and Snaking data access structures to increase the performance of the chip. Therefore, the chip can perform high-speed computing and achieve a well facial expression recognition rate.","PeriodicalId":46240,"journal":{"name":"IET Networks","volume":null,"pages":null},"PeriodicalIF":1.4,"publicationDate":"2022-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89952847","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-10-14DOI: 10.1109/IET-ICETA56553.2022.9971590
Kuan-Hung Chen, Chun-Wei Su, Jen-He Wang
With the innovation of hardware equipment, the development of artificial intelligence has broken through the limitations of the past. Neural networks have been continuously deepened to improve the accuracy of detection, so that the parameters have increased with a direct proportional rate. In this way, however, high energy consumption has been induced which obstacles the deployment of AI algorithms on portable devices. Therefore, the design of neural network must consider not only detection accuracy but also energy efficiency. In this paper, we analyzed energy consumption, detection accuracy and execution speed of our neural network model as well as the state-of-the-art models based on an FPGA platform called ZCU-102. We adopt the performance index from Low Power Computer Vision (LPCV) challenge which considers power dissipation, mean Average Precision (mAP) and Frames Per Second (FPS) at the same time to evaluate these models in an overall point of view. Agilev4 can achieve 59.9% of mAP@50 on MS COCO test-dev2017 datasets. If the input frame resolution is turned into $416times 416$, the processing frame rate can reach 20.7 FPS on ZCU-102. Compared with the state-of-the-art models, the LPCV score of Agilev4-416 is 1475. S which is 1.56 times of that of YOLOv4-416.
{"title":"Energy-efficient and Accurate Object Detection Design on an FPGA Platform","authors":"Kuan-Hung Chen, Chun-Wei Su, Jen-He Wang","doi":"10.1109/IET-ICETA56553.2022.9971590","DOIUrl":"https://doi.org/10.1109/IET-ICETA56553.2022.9971590","url":null,"abstract":"With the innovation of hardware equipment, the development of artificial intelligence has broken through the limitations of the past. Neural networks have been continuously deepened to improve the accuracy of detection, so that the parameters have increased with a direct proportional rate. In this way, however, high energy consumption has been induced which obstacles the deployment of AI algorithms on portable devices. Therefore, the design of neural network must consider not only detection accuracy but also energy efficiency. In this paper, we analyzed energy consumption, detection accuracy and execution speed of our neural network model as well as the state-of-the-art models based on an FPGA platform called ZCU-102. We adopt the performance index from Low Power Computer Vision (LPCV) challenge which considers power dissipation, mean Average Precision (mAP) and Frames Per Second (FPS) at the same time to evaluate these models in an overall point of view. Agilev4 can achieve 59.9% of mAP@50 on MS COCO test-dev2017 datasets. If the input frame resolution is turned into $416times 416$, the processing frame rate can reach 20.7 FPS on ZCU-102. Compared with the state-of-the-art models, the LPCV score of Agilev4-416 is 1475. S which is 1.56 times of that of YOLOv4-416.","PeriodicalId":46240,"journal":{"name":"IET Networks","volume":null,"pages":null},"PeriodicalIF":1.4,"publicationDate":"2022-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75334117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-10-14DOI: 10.1109/IET-ICETA56553.2022.9971695
Yu-Jen Liu, Pei-Hao Sun, Po-Yu Hou
For the operation of the microgrid system, it must de-energize from utility grid when the system meets fault conditions due to the safety and stability reasons. Meanwhile, it also need to guarantee continued power supply for the remaining facilities in microgrid. To achieve this operation task, inverters with grid-forming control are considered as mature solutions in recent years. In this paper, a microgrid system with a 30kVA and a 5kVA grid-forming inverters that integrated in two energy storage systems are modelling and the droop control with virtual impedances are designed for the inverters to operate in off-grid state. MATLAB/Simulink is implemented to carry out the power sharing simulation for the validation of the performance of proposed microgrid and grid-forming inverters models.
{"title":"Grid-Forming Inverter Control for Power Sharing Simulation in Microgrid","authors":"Yu-Jen Liu, Pei-Hao Sun, Po-Yu Hou","doi":"10.1109/IET-ICETA56553.2022.9971695","DOIUrl":"https://doi.org/10.1109/IET-ICETA56553.2022.9971695","url":null,"abstract":"For the operation of the microgrid system, it must de-energize from utility grid when the system meets fault conditions due to the safety and stability reasons. Meanwhile, it also need to guarantee continued power supply for the remaining facilities in microgrid. To achieve this operation task, inverters with grid-forming control are considered as mature solutions in recent years. In this paper, a microgrid system with a 30kVA and a 5kVA grid-forming inverters that integrated in two energy storage systems are modelling and the droop control with virtual impedances are designed for the inverters to operate in off-grid state. MATLAB/Simulink is implemented to carry out the power sharing simulation for the validation of the performance of proposed microgrid and grid-forming inverters models.","PeriodicalId":46240,"journal":{"name":"IET Networks","volume":null,"pages":null},"PeriodicalIF":1.4,"publicationDate":"2022-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78299362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-10-14DOI: 10.1109/IET-ICETA56553.2022.9971683
Yu-sheng Tsao, Berlin Chen, J. Hung
The highly effective deep learning-based technique FullSubNet+ employs a full-band and sub-band fusion model to fulfill the speech enhancement task. FullSubNet+ exploits the short-time magnitude spectrogram, real-and imaginary parts of the complex-valued spectrogram to learn the deep neural network that mainly comprises multi-scale time-sensitive channel attention (MulCA) modules and stacked temporal convolution network (TCN) blocks. To capture the phase information of input time-domain signals more simply, we propose using the short-time DCT-based spectrogram as an alternative for the real and imaginary spectrograms to be an input source to learn the FullSubNet+ framework. The preliminary experiments conducted with the VoiceBank-DEMAND task indicate that exploiting STDCT spectrograms in FullSubNet+ achieves higher objective speech quality and intelligibility in terms of PESQ and STOI metric scores, respectively, for the test set compared with the original FullSubNet+ arrangement. In addition, the STDCT-wise FullSubNet+ obtains a real-time factor (RTF) of 0.229, lower than 0.260, the RTF for the original FullSubNet+.
{"title":"Exploiting Discrete Cosine Transform Features in Speech Enhancement Technique FullSubNet+","authors":"Yu-sheng Tsao, Berlin Chen, J. Hung","doi":"10.1109/IET-ICETA56553.2022.9971683","DOIUrl":"https://doi.org/10.1109/IET-ICETA56553.2022.9971683","url":null,"abstract":"The highly effective deep learning-based technique FullSubNet+ employs a full-band and sub-band fusion model to fulfill the speech enhancement task. FullSubNet+ exploits the short-time magnitude spectrogram, real-and imaginary parts of the complex-valued spectrogram to learn the deep neural network that mainly comprises multi-scale time-sensitive channel attention (MulCA) modules and stacked temporal convolution network (TCN) blocks. To capture the phase information of input time-domain signals more simply, we propose using the short-time DCT-based spectrogram as an alternative for the real and imaginary spectrograms to be an input source to learn the FullSubNet+ framework. The preliminary experiments conducted with the VoiceBank-DEMAND task indicate that exploiting STDCT spectrograms in FullSubNet+ achieves higher objective speech quality and intelligibility in terms of PESQ and STOI metric scores, respectively, for the test set compared with the original FullSubNet+ arrangement. In addition, the STDCT-wise FullSubNet+ obtains a real-time factor (RTF) of 0.229, lower than 0.260, the RTF for the original FullSubNet+.","PeriodicalId":46240,"journal":{"name":"IET Networks","volume":null,"pages":null},"PeriodicalIF":1.4,"publicationDate":"2022-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73174333","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-10-14DOI: 10.1109/IET-ICETA56553.2022.9971596
Paolo Joshua R. Billones, Dailyne D. Macasaet, Shearyl U. Arenas
This study aims to mitigate the absorption of fraudulent news by exploring the feasibility of using Naive Bayes and SGD classifier models in predicting whether the English or Filipino article is real or fake. This is accomplished by training the models through large pre-processed datasets. After evaluation, both models have achieved an accuracy of 93% and 95% accuracy respectively.
{"title":"Bilingual Fake News Detection Algorithm Using Naïve Bayes and Support Vector Machine Models","authors":"Paolo Joshua R. Billones, Dailyne D. Macasaet, Shearyl U. Arenas","doi":"10.1109/IET-ICETA56553.2022.9971596","DOIUrl":"https://doi.org/10.1109/IET-ICETA56553.2022.9971596","url":null,"abstract":"This study aims to mitigate the absorption of fraudulent news by exploring the feasibility of using Naive Bayes and SGD classifier models in predicting whether the English or Filipino article is real or fake. This is accomplished by training the models through large pre-processed datasets. After evaluation, both models have achieved an accuracy of 93% and 95% accuracy respectively.","PeriodicalId":46240,"journal":{"name":"IET Networks","volume":null,"pages":null},"PeriodicalIF":1.4,"publicationDate":"2022-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73372842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-10-14DOI: 10.1109/IET-ICETA56553.2022.9971523
Hu Ming, LE Ti, Hsien Chung Chen, Thai Cheng Yu, Huang You Ming, Ying Hsun Lai
This study uses AIoT combined with virtual-real integration technology to explore the cultural knowledge and information literacy learning of Indigenous people. In this era when few cultures need to be valued and preserved, this study uses virtual reality technology to turn the preservation of cultures into digitalization, so that complete objects can be preserved more safely and completely. The virtual reality space is used to further promote cultural and information literacy education. Learning through games, guided tours and teaching can strengthen the identity of one’s own culture and promote the cultural assets of some ethnic minorities. This research uses a broad range of Indigenous ethnic groups as an introduction to understanding, and then goes deep into other related cultures, celebrations, and festivals as secondary promotions, inspects or observes ethnic-related architectural structures, totems, pottery and other cultural relics, and at the same time achieves digital preservation and Provision of educational resources. This research also uses 3D printing technology to print and reproduce cultural objects to help learners strengthen their cultural understanding and identification concepts while learning new technologies.
{"title":"Multicultural Knowledge and Information Literacy Learning Using AIoT Integration Technology","authors":"Hu Ming, LE Ti, Hsien Chung Chen, Thai Cheng Yu, Huang You Ming, Ying Hsun Lai","doi":"10.1109/IET-ICETA56553.2022.9971523","DOIUrl":"https://doi.org/10.1109/IET-ICETA56553.2022.9971523","url":null,"abstract":"This study uses AIoT combined with virtual-real integration technology to explore the cultural knowledge and information literacy learning of Indigenous people. In this era when few cultures need to be valued and preserved, this study uses virtual reality technology to turn the preservation of cultures into digitalization, so that complete objects can be preserved more safely and completely. The virtual reality space is used to further promote cultural and information literacy education. Learning through games, guided tours and teaching can strengthen the identity of one’s own culture and promote the cultural assets of some ethnic minorities. This research uses a broad range of Indigenous ethnic groups as an introduction to understanding, and then goes deep into other related cultures, celebrations, and festivals as secondary promotions, inspects or observes ethnic-related architectural structures, totems, pottery and other cultural relics, and at the same time achieves digital preservation and Provision of educational resources. This research also uses 3D printing technology to print and reproduce cultural objects to help learners strengthen their cultural understanding and identification concepts while learning new technologies.","PeriodicalId":46240,"journal":{"name":"IET Networks","volume":null,"pages":null},"PeriodicalIF":1.4,"publicationDate":"2022-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73587530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
RF-DC converter integrated circuits (ICs) are presented for RF energy harvesting and power charging. To achieve wide incident RF signal variations that sketch the directing frequency band, an adaptive impedance matching network is used. The proposed RF signal to DC converter is fabricated in 0.18-um CMOS process. The simulated performances present the proposed circuit achieves Peak Power Converting Efficiency (PPCE) of 27% at 0 dBm input power, across 50 k$Omega$ load resistance and 1 pF load capacitance and can provide an output voltage of higher than 2 V.
提出了一种用于射频能量采集和功率充电的RF- dc变换器集成电路。为了实现宽入射射频信号的变化，勾画了指导频带，自适应阻抗匹配网络被使用。所提出的射频信号到直流转换器采用0.18 μ m CMOS工艺制作。仿真结果表明，该电路在0 dBm输入功率下，负载电阻为50 k$Omega$，负载电容为1 pF，峰值功率转换效率(PPCE)为27%，输出电压高于2 V。
{"title":"An RF-DC Converter IC for Power Charging Application","authors":"Pin-You Chen, Bo-Yuan Chen, Chia-Hung Chang, Jheng-Yu Cheng, Syuan-Sou Chen, Meng-Man Yang, Wei-Wen Hu","doi":"10.1109/IET-ICETA56553.2022.9971475","DOIUrl":"https://doi.org/10.1109/IET-ICETA56553.2022.9971475","url":null,"abstract":"RF-DC converter integrated circuits (ICs) are presented for RF energy harvesting and power charging. To achieve wide incident RF signal variations that sketch the directing frequency band, an adaptive impedance matching network is used. The proposed RF signal to DC converter is fabricated in 0.18-um CMOS process. The simulated performances present the proposed circuit achieves Peak Power Converting Efficiency (PPCE) of 27% at 0 dBm input power, across 50 k$Omega$ load resistance and 1 pF load capacitance and can provide an output voltage of higher than 2 V.","PeriodicalId":46240,"journal":{"name":"IET Networks","volume":null,"pages":null},"PeriodicalIF":1.4,"publicationDate":"2022-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72438022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-10-14DOI: 10.1109/IET-ICETA56553.2022.9971575
Jia-Min Chiau, Min‐Hua Ho, W. Lai
This letter presents a 5.2 GHz differential mixer design that uses MOS switch and differential CS amplifier. The fully integrated mixer is fabricated by the tsmc 0. 1S$mu$m BiCMOS process with its IIP3 of -13dBm, conversion gain of 15 dB, and the radio frequency (RF) and local oscillator (LO) to an intermediate frequency (IF) isolation of 15S and 139 dB, respectively. Overall chipset consumes 30. SmW with a supply voltage of 1.SV.
{"title":"A 5.2 GHz Differential Down Conversion Mixer Design","authors":"Jia-Min Chiau, Min‐Hua Ho, W. Lai","doi":"10.1109/IET-ICETA56553.2022.9971575","DOIUrl":"https://doi.org/10.1109/IET-ICETA56553.2022.9971575","url":null,"abstract":"This letter presents a 5.2 GHz differential mixer design that uses MOS switch and differential CS amplifier. The fully integrated mixer is fabricated by the tsmc 0. 1S$mu$m BiCMOS process with its IIP3 of -13dBm, conversion gain of 15 dB, and the radio frequency (RF) and local oscillator (LO) to an intermediate frequency (IF) isolation of 15S and 139 dB, respectively. Overall chipset consumes 30. SmW with a supply voltage of 1.SV.","PeriodicalId":46240,"journal":{"name":"IET Networks","volume":null,"pages":null},"PeriodicalIF":1.4,"publicationDate":"2022-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84477170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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