Pub Date : 2023-11-10DOI: 10.1587/elex.20.20230370
Geng Chamin, Zhang Tianhai, Chen Bo, Zhou Qingfu
The health status estimation of lithium-ion battery is a challenging through measurement. To establish a connection between battery health status and data features, a battery State of Health (SOH) estimation method based on data feature mining is proposed. Four features are extracted from the battery charging curve, and the grey correlation analysis is used to determine the high correlation between features and health status. The method combines a Backpropagation (BP) neural network with Genetic Algorithm (GA) for feature training and learning, enabling the estimation of battery SOH. The feasibility of the proposed method is validated using the NASA battery dataset. The results show that the battery SOH estimation method proposed in this paper outperforms the traditional BP neural network method achieving accurate estimation.
{"title":"Battery health state estimation method based on data feature mining","authors":"Geng Chamin, Zhang Tianhai, Chen Bo, Zhou Qingfu","doi":"10.1587/elex.20.20230370","DOIUrl":"https://doi.org/10.1587/elex.20.20230370","url":null,"abstract":"The health status estimation of lithium-ion battery is a challenging through measurement. To establish a connection between battery health status and data features, a battery State of Health (SOH) estimation method based on data feature mining is proposed. Four features are extracted from the battery charging curve, and the grey correlation analysis is used to determine the high correlation between features and health status. The method combines a Backpropagation (BP) neural network with Genetic Algorithm (GA) for feature training and learning, enabling the estimation of battery SOH. The feasibility of the proposed method is validated using the NASA battery dataset. The results show that the battery SOH estimation method proposed in this paper outperforms the traditional BP neural network method achieving accurate estimation.","PeriodicalId":50387,"journal":{"name":"Ieice Electronics Express","volume":"77 13","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135087356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-11-10DOI: 10.1587/elex.20.20230377
Guanbao Zhai, Pengjun Wang, Gang Li, Youyi Zhuang
By using the XOR method to obfuscate response of Arbiter PUFs (APUFs), the ability to resist machine learning (ML) modeling attacks can be improved, but this method will reduce the stable of PUF to a certain extent, making PUF lose usability. In view of this, a highly stable XOR APUF (HS-XOR APUF) circuit is proposed by studying the generation mechanism of unstable response bits and the screening characteristics of the logic gates delay signals. First, the maximum and minimum delay signals are screened with AND/OR gate to generate highly stable response bits; Then, by inserting a inverter in the APUF switch unit, the delay time of the signal is increased, and the influence of environmental factors on the comparison signal with small delay deviation is weakened; Finally, the FPGA experimental results show that the response stability of HS-XOR APUF is rarely affected by the count of XOR units, and the AND/OR gate delay signal screening structure is simple and consumes a small amount of hardware resources, which can be widely used in the fields of information security.
{"title":"A Highly Stable XOR APUF Based on Deviation Signal Screening Mechanism","authors":"Guanbao Zhai, Pengjun Wang, Gang Li, Youyi Zhuang","doi":"10.1587/elex.20.20230377","DOIUrl":"https://doi.org/10.1587/elex.20.20230377","url":null,"abstract":"By using the XOR method to obfuscate response of Arbiter PUFs (APUFs), the ability to resist machine learning (ML) modeling attacks can be improved, but this method will reduce the stable of PUF to a certain extent, making PUF lose usability. In view of this, a highly stable XOR APUF (HS-XOR APUF) circuit is proposed by studying the generation mechanism of unstable response bits and the screening characteristics of the logic gates delay signals. First, the maximum and minimum delay signals are screened with AND/OR gate to generate highly stable response bits; Then, by inserting a inverter in the APUF switch unit, the delay time of the signal is increased, and the influence of environmental factors on the comparison signal with small delay deviation is weakened; Finally, the FPGA experimental results show that the response stability of HS-XOR APUF is rarely affected by the count of XOR units, and the AND/OR gate delay signal screening structure is simple and consumes a small amount of hardware resources, which can be widely used in the fields of information security.","PeriodicalId":50387,"journal":{"name":"Ieice Electronics Express","volume":"77 8","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135087358","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-11-10DOI: 10.1587/elex.20.20230372
Yanqing Cheng, Shuyun Lin, Qi Chen, Jinqi Dong, Lunyi Liu
In this paper, a broadband reconfigurable frequency-selective surface (FSS) in terahertz band based on different metal-insulator transition (MIT) temperature of vanadium dioxide (VO2) is proposed. By using different MIT temperature of VO2, the broadband reconfigurable design of the FSS is realized. The results show that the center frequency of the FSS is 2.15 THz and when the temperature is lower than 60℃, the relative bandwidth is 74.19%. When the temperature is between 60℃ and 72℃, the relative bandwidth is 55.59%. Above 72℃, the relative bandwidth is 33.78%. The FSS has broad application prospects in other emerging terahertz fields such as terahertz regulation and communication.
{"title":"A Broadband Reconfigurable Frequency-Selective Surface in Terahertz Band Based on Different Metal-Insulator Transition Temperature of VO<sub>2</sub>","authors":"Yanqing Cheng, Shuyun Lin, Qi Chen, Jinqi Dong, Lunyi Liu","doi":"10.1587/elex.20.20230372","DOIUrl":"https://doi.org/10.1587/elex.20.20230372","url":null,"abstract":"In this paper, a broadband reconfigurable frequency-selective surface (FSS) in terahertz band based on different metal-insulator transition (MIT) temperature of vanadium dioxide (VO2) is proposed. By using different MIT temperature of VO2, the broadband reconfigurable design of the FSS is realized. The results show that the center frequency of the FSS is 2.15 THz and when the temperature is lower than 60℃, the relative bandwidth is 74.19%. When the temperature is between 60℃ and 72℃, the relative bandwidth is 55.59%. Above 72℃, the relative bandwidth is 33.78%. The FSS has broad application prospects in other emerging terahertz fields such as terahertz regulation and communication.","PeriodicalId":50387,"journal":{"name":"Ieice Electronics Express","volume":"78 9","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135087343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-11-10DOI: 10.1587/elex.20.20230398
Ning Liu, Haoyong Ding, Xianjun Sheng, Xiangyan Liu, Hongwei Wang
This paper presents an effective medium modeling method for frequency selective surface (FSS). The proposed method only retrieves the electromagnetic parameters of the effective medium once, then the reflection/transmission coefficients under arbitrary incidence can be calculated. Compared with previous works, the proposed method reduces the modeling and calculation time by equating the complex FSS to single-layer or multi-layer dielectric slabs. For verification, we built an effective medium model for gridded square loop FSS and obtained a modeling empirical formula. The calculated results are in good agreement with CST and better than the equivalent circuit method.
{"title":"Effective medium modeling method for gridded square loop FSS","authors":"Ning Liu, Haoyong Ding, Xianjun Sheng, Xiangyan Liu, Hongwei Wang","doi":"10.1587/elex.20.20230398","DOIUrl":"https://doi.org/10.1587/elex.20.20230398","url":null,"abstract":"This paper presents an effective medium modeling method for frequency selective surface (FSS). The proposed method only retrieves the electromagnetic parameters of the effective medium once, then the reflection/transmission coefficients under arbitrary incidence can be calculated. Compared with previous works, the proposed method reduces the modeling and calculation time by equating the complex FSS to single-layer or multi-layer dielectric slabs. For verification, we built an effective medium model for gridded square loop FSS and obtained a modeling empirical formula. The calculated results are in good agreement with CST and better than the equivalent circuit method.","PeriodicalId":50387,"journal":{"name":"Ieice Electronics Express","volume":"77 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135087359","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-11-10DOI: 10.1587/elex.20.20230381
Hiroaki Takahashi, Ziad Hatab, Erich Schlaffer, Helmut Paulitsch, Wolfgang Bösch
This paper presents an experimental characterization of grounded coplanar waveguides (GCPWs) with uncertainty analysis. GCPW lines to be analyzed were fabricated using different subtractive printed circuit board (PCB) manufacturing processes: panel plating method and pattern plating method. Using a modified multiline method, we have extracted the propagation constants with uncertainty propagation analysis. This considered instrumentation noise, length uncertainty, and impedance mismatch caused by variations in cross-section due to the fabrication capabilities of each manufacturing process. By reformulating the propagation constant, we obtained the attenuation per unit length and the effective relative permittivity as a function of frequencies up to 43.5GHz with 95% confidence interval. These results showed good agreement with full-wave simulations and highlighted the differences between the PCB manufacturing processes.
{"title":"Experimental analysis of grounded coplanar waveguide structures based on different PCB processes with uncertainty analysis","authors":"Hiroaki Takahashi, Ziad Hatab, Erich Schlaffer, Helmut Paulitsch, Wolfgang Bösch","doi":"10.1587/elex.20.20230381","DOIUrl":"https://doi.org/10.1587/elex.20.20230381","url":null,"abstract":"This paper presents an experimental characterization of grounded coplanar waveguides (GCPWs) with uncertainty analysis. GCPW lines to be analyzed were fabricated using different subtractive printed circuit board (PCB) manufacturing processes: panel plating method and pattern plating method. Using a modified multiline method, we have extracted the propagation constants with uncertainty propagation analysis. This considered instrumentation noise, length uncertainty, and impedance mismatch caused by variations in cross-section due to the fabrication capabilities of each manufacturing process. By reformulating the propagation constant, we obtained the attenuation per unit length and the effective relative permittivity as a function of frequencies up to 43.5GHz with 95% confidence interval. These results showed good agreement with full-wave simulations and highlighted the differences between the PCB manufacturing processes.","PeriodicalId":50387,"journal":{"name":"Ieice Electronics Express","volume":"74 23","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135088356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-11-10DOI: 10.1587/elex.20.20230351
Tomoki Yamada, Yu Yonezawa, Masayoshi Yamamoto
This letter proposes a simpler and more efficient circuit scheme than the conventional current fed full bridge converter. In the proposed circuit, an auxiliary resonant capacitor is added to the conventional circuit to eliminate the adverse effects of leakage inductance of the transformer on the circuit operation, and at the same time, soft switching is achieved. As a result, switching losses were reduced and the efficiency was improved by approximately 4.7 % compared to the conventional method, which was confirmed on LTspice. First, the basic structure of the proposed circuit is shown, followed by the principle of operation. Next, the advantages and disadvantages of the proposed method are presented. Finally, we compare the proposed method with the conventional method.
{"title":"A Current Fed Full Bridge Converter with Auxiliary Resonant Capacitor","authors":"Tomoki Yamada, Yu Yonezawa, Masayoshi Yamamoto","doi":"10.1587/elex.20.20230351","DOIUrl":"https://doi.org/10.1587/elex.20.20230351","url":null,"abstract":"This letter proposes a simpler and more efficient circuit scheme than the conventional current fed full bridge converter. In the proposed circuit, an auxiliary resonant capacitor is added to the conventional circuit to eliminate the adverse effects of leakage inductance of the transformer on the circuit operation, and at the same time, soft switching is achieved. As a result, switching losses were reduced and the efficiency was improved by approximately 4.7 % compared to the conventional method, which was confirmed on LTspice. First, the basic structure of the proposed circuit is shown, followed by the principle of operation. Next, the advantages and disadvantages of the proposed method are presented. Finally, we compare the proposed method with the conventional method.","PeriodicalId":50387,"journal":{"name":"Ieice Electronics Express","volume":"77 18","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135087354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Event-based deep neural networks (DNNs) have shown great promise in computer vision under difficult lighting conditions. However, existing hardware solutions cannot provide efficient event-based DNN accelerations owing to the characteristic of event streams, which are typically in low datarate and high-dynamic range. In this letter, we present a novel hardware design that can handle event-based DNNs according to the data characteristic of event streams. Furthermore, we provide a dataflow that enables flexible DNN data encodings (including both bitmask and compressed sparse row (CSR)) based on the event data characteristic for energy saving. Comprehensive evaluations based on four famous event-based benchmarks show that the proposed design can achieve higher performance and better energy efficiency compared with representative accelerator baselines.
{"title":"Accelerating Event-based Deep Neural Networks via Flexible Data Encoding","authors":"Yuanli Zhong, Yongqi Xu, Bosheng Liu, Yibing Tang, Jigang Wu","doi":"10.1587/elex.20.20230379","DOIUrl":"https://doi.org/10.1587/elex.20.20230379","url":null,"abstract":"Event-based deep neural networks (DNNs) have shown great promise in computer vision under difficult lighting conditions. However, existing hardware solutions cannot provide efficient event-based DNN accelerations owing to the characteristic of event streams, which are typically in low datarate and high-dynamic range. In this letter, we present a novel hardware design that can handle event-based DNNs according to the data characteristic of event streams. Furthermore, we provide a dataflow that enables flexible DNN data encodings (including both bitmask and compressed sparse row (CSR)) based on the event data characteristic for energy saving. Comprehensive evaluations based on four famous event-based benchmarks show that the proposed design can achieve higher performance and better energy efficiency compared with representative accelerator baselines.","PeriodicalId":50387,"journal":{"name":"Ieice Electronics Express","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135088526","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-08-10DOI: 10.1587/elex.20.20230226
Haipeng Duan, Qin Chen, Xuan Wang, Depeng Cheng, Xin Chen, Xu Wu, Dongming Wang, Lianming Li
This paper presents a fully integrated Ku-band transmitter front-end with high image rejection ratio (IRR), local oscillator feedthrough (LOFT) suppression, gain and output power for point-to-point (P2P) communication. To avoid the bulky off-chip image-rejection filter, the Hartley transmitter structure is employed, in which frequency plan is undertaken to improve the IRR and LOFT performance, and a two-stage polyphase filter (PPF) and an in/quadrature-phase (I/Q) Gilbert mixer are utilized to improve the IRR further. With the capacitive neutralization and transformer-based series power combining techniques, a two-stage power amplifier (PA) is used to obtain high gain and output power. In the LO buffer, a flexible phase inverting cascode structure is used to achieve reliable up-sideband operation, and the inductive peaking technique and cross-coupled transistor pair are employed to promote the LO swing. Fabricated in a 65-nm CMOS process, the proposed Ku-band transmitter occupies a chip area of 0.98 mm2, and consumes 304-mW power consumption from a 1.2-V supply voltage. With measurements, over 15.8-17.9-GHz radio frequency (RF) bandwidth, the transmitter achieves an IRR and LOFT suppression ratio of 45-55 and 43-52 dBc, respectively. Moreover, it exhibits a conversion gain of 28.5 dB, an output 1-dB compression point (OP1dB) of 13.3 dBm and a saturated output power (Psat) of 16 dBm.
{"title":"A Ku-band transmitter front-end in 65-nm CMOS with >45-dBc image-rejection ratio and >43-dBc LOFT suppression","authors":"Haipeng Duan, Qin Chen, Xuan Wang, Depeng Cheng, Xin Chen, Xu Wu, Dongming Wang, Lianming Li","doi":"10.1587/elex.20.20230226","DOIUrl":"https://doi.org/10.1587/elex.20.20230226","url":null,"abstract":"This paper presents a fully integrated Ku-band transmitter front-end with high image rejection ratio (IRR), local oscillator feedthrough (LOFT) suppression, gain and output power for point-to-point (P2P) communication. To avoid the bulky off-chip image-rejection filter, the Hartley transmitter structure is employed, in which frequency plan is undertaken to improve the IRR and LOFT performance, and a two-stage polyphase filter (PPF) and an in/quadrature-phase (I/Q) Gilbert mixer are utilized to improve the IRR further. With the capacitive neutralization and transformer-based series power combining techniques, a two-stage power amplifier (PA) is used to obtain high gain and output power. In the LO buffer, a flexible phase inverting cascode structure is used to achieve reliable up-sideband operation, and the inductive peaking technique and cross-coupled transistor pair are employed to promote the LO swing. Fabricated in a 65-nm CMOS process, the proposed Ku-band transmitter occupies a chip area of 0.98 mm2, and consumes 304-mW power consumption from a 1.2-V supply voltage. With measurements, over 15.8-17.9-GHz radio frequency (RF) bandwidth, the transmitter achieves an IRR and LOFT suppression ratio of 45-55 and 43-52 dBc, respectively. Moreover, it exhibits a conversion gain of 28.5 dB, an output 1-dB compression point (OP1dB) of 13.3 dBm and a saturated output power (Psat) of 16 dBm.","PeriodicalId":50387,"journal":{"name":"Ieice Electronics Express","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-08-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135492966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-07-10DOI: 10.1587/elex.20.20230219
Dihui Zeng, Qiongxuan Ge, A. L. Zhang
{"title":"Decoupling control of three-dimensional electromagnetic forces in linear induction motors based on novel equivalent circuit","authors":"Dihui Zeng, Qiongxuan Ge, A. L. Zhang","doi":"10.1587/elex.20.20230219","DOIUrl":"https://doi.org/10.1587/elex.20.20230219","url":null,"abstract":"","PeriodicalId":50387,"journal":{"name":"Ieice Electronics Express","volume":"1 1","pages":""},"PeriodicalIF":0.8,"publicationDate":"2023-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"67302102","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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