Pub Date : 2024-03-01DOI: 10.23919/cje.2022.00.397
Ruiming Xu;Zhongjie Guo;Suiyang Liu;Ningmei Yu;Yunfei Liu
Aiming at the problem of the non-uniformity of the ramp signal in the super-large array CMOS (complementary metal-oxide semiconductor) image sensors, a ramp uniformity correction method for CMOS image sensors is proposed in this paper. Based on the error storage technique, the ramp non-uniformity error is stored. And the input ramp signal of each column is shifted by level-shifting technique to eliminate the ramp non-uniformity error. Based on the 55 nm-1P4M CMOS process, this paper has completed the detailed circuit design and comprehensive simulation verification of the proposed method. Under the design conditions that the voltage range of the ramp signal is 1.4 V, the slope of the ramp signal is 71.908 V /ms, the number of pixels is 8192 (H) x 8192 (V), and a single pixel size is 10 µm, the correction method proposed in this paper reduces the ramp non-uniformity error from 7.89 m V to 36 µ V. The differential non-linearity of the ramp signal is +0.0013/-0.004 LSB and the integral non-linearity is +0.045/-0.021 LSB. The ramp uniformity correction method proposed in this paper reduces the ramp non-uniformity error by 99.54% on the basis of ensuring the high linearity of the ramp signal, without significantly increasing the chip area and without introducing additional power consumption. The column fixed-pattern noise is reduced from 1.9% to 0.01%. It provides theoretical support for the design of high-precision CMOS image sensors.
{"title":"Global Ramp Uniformity Correction Method for Super-Large Array CMOS Image Sensors","authors":"Ruiming Xu;Zhongjie Guo;Suiyang Liu;Ningmei Yu;Yunfei Liu","doi":"10.23919/cje.2022.00.397","DOIUrl":"https://doi.org/10.23919/cje.2022.00.397","url":null,"abstract":"Aiming at the problem of the non-uniformity of the ramp signal in the super-large array CMOS (complementary metal-oxide semiconductor) image sensors, a ramp uniformity correction method for CMOS image sensors is proposed in this paper. Based on the error storage technique, the ramp non-uniformity error is stored. And the input ramp signal of each column is shifted by level-shifting technique to eliminate the ramp non-uniformity error. Based on the 55 nm-1P4M CMOS process, this paper has completed the detailed circuit design and comprehensive simulation verification of the proposed method. Under the design conditions that the voltage range of the ramp signal is 1.4 V, the slope of the ramp signal is 71.908 V /ms, the number of pixels is 8192 (H) x 8192 (V), and a single pixel size is 10 µm, the correction method proposed in this paper reduces the ramp non-uniformity error from 7.89 m V to 36 µ V. The differential non-linearity of the ramp signal is +0.0013/-0.004 LSB and the integral non-linearity is +0.045/-0.021 LSB. The ramp uniformity correction method proposed in this paper reduces the ramp non-uniformity error by 99.54% on the basis of ensuring the high linearity of the ramp signal, without significantly increasing the chip area and without introducing additional power consumption. The column fixed-pattern noise is reduced from 1.9% to 0.01%. It provides theoretical support for the design of high-precision CMOS image sensors.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"33 2","pages":"415-422"},"PeriodicalIF":1.2,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488066","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140342781","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-01DOI: 10.23919/cje.2023.00.094
Xi Wang;Yuandan Dong;Yikai Chen
A high-efficiency polarization-rotating transmit array antenna (T A) using wideband elements is proposed for millimeter-wave applications. The polarization-rotating element consists of three metallic layers and two substrates. Orthogonal polarizers are employed on the top and bottom of the element. And the split ring with a parasitic stub on the middle layer is symmetric about the diagonal, performing the polarization rotation and phase compensation simultaneously. A parasitic stub is designed to decrease transmission loss and broaden the bandwidth. The periodicity of the element is only 1/4 wavelength at 30 GHz. A prototype TA with 28 × 28 elements is designed, fabricated, and measured. The measured peak gain reaches 27.5 dBi at 37.8 GHz. The 1-dB gain drop bandwidth is 30.8-40 GHz (26.0%). The aperture efficiency reaches as high as 71% at 31.5 GHz. Within the bandwidth of 26.5-38.8 GHz (37.7%), the aperture efficiency is higher than 50%. The proposed polarization-rotating TA features wide bandwidth and high efficiency, demonstrating great application potential for 5G millimeter-wave communication.
{"title":"High-Efficiency Wideband Transmitarray Antenna Using Polarization-Rotating Elements with Parasitic Stubs","authors":"Xi Wang;Yuandan Dong;Yikai Chen","doi":"10.23919/cje.2023.00.094","DOIUrl":"https://doi.org/10.23919/cje.2023.00.094","url":null,"abstract":"A high-efficiency polarization-rotating transmit array antenna (T A) using wideband elements is proposed for millimeter-wave applications. The polarization-rotating element consists of three metallic layers and two substrates. Orthogonal polarizers are employed on the top and bottom of the element. And the split ring with a parasitic stub on the middle layer is symmetric about the diagonal, performing the polarization rotation and phase compensation simultaneously. A parasitic stub is designed to decrease transmission loss and broaden the bandwidth. The periodicity of the element is only 1/4 wavelength at 30 GHz. A prototype TA with 28 × 28 elements is designed, fabricated, and measured. The measured peak gain reaches 27.5 dBi at 37.8 GHz. The 1-dB gain drop bandwidth is 30.8-40 GHz (26.0%). The aperture efficiency reaches as high as 71% at 31.5 GHz. Within the bandwidth of 26.5-38.8 GHz (37.7%), the aperture efficiency is higher than 50%. The proposed polarization-rotating TA features wide bandwidth and high efficiency, demonstrating great application potential for 5G millimeter-wave communication.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"33 2","pages":"496-503"},"PeriodicalIF":1.2,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488061","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140342807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
To solve the problems of redundant logic resources and poor scalability in protocol controller circuits among communication networks, we propose a traffic-driven software defined interconnection (TSDI) mechanism. The unified software defined interconnection interface standards and the normalized interconnection topology are designed to implement the architecture of TSDI-based protocol controller. The key indicators of power, performance and area (PPA) can be realized while resolving the flexible interconnection of the controller. We designed a TSDI-based RapidIO controller as an example. Compared to traditional designs, the design could achieve more protocol scalability, and RapidIO protocol standards of Gen4 could be supported directly. The key PPA indicators, such as a lower delay of 56.1 ns and more than twice throughput of 98.1 Gbps, were achieved at the cost of a 23.4% area increase.
{"title":"Architecture Design of Protocol Controller Based on Traffic-Driven Software Defined Interconnection","authors":"Peijie Li;Jianliang Shen;Ping Lyu;Chunlei Dong;Ting Chen;Shaojun Wei","doi":"10.23919/cje.2022.00.094","DOIUrl":"https://doi.org/10.23919/cje.2022.00.094","url":null,"abstract":"To solve the problems of redundant logic resources and poor scalability in protocol controller circuits among communication networks, we propose a traffic-driven software defined interconnection (TSDI) mechanism. The unified software defined interconnection interface standards and the normalized interconnection topology are designed to implement the architecture of TSDI-based protocol controller. The key indicators of power, performance and area (PPA) can be realized while resolving the flexible interconnection of the controller. We designed a TSDI-based RapidIO controller as an example. Compared to traditional designs, the design could achieve more protocol scalability, and RapidIO protocol standards of Gen4 could be supported directly. The key PPA indicators, such as a lower delay of 56.1 ns and more than twice throughput of 98.1 Gbps, were achieved at the cost of a 23.4% area increase.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"33 2","pages":"362-370"},"PeriodicalIF":1.2,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488074","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140342811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-01DOI: 10.23919/cje.2022.00.125
Xiaojuan Lian;Yuelin Shi;Xinyi Shen;Xiang Wan;Zhikuang Cai;Lei Wang;Yuchao Yang
Recent popularity to realize image recognition by memristor-based neural network hardware systems has been witnessed owing to their similarities to neurons and synapses. However, the stochastic formation of conductive filaments inside the oxide memristor devices inevitably makes them face some drawbacks, represented by relatively higher power consumption and severer resistance switching variability. In this work, we design and fabricate the Ag/MXene (Ti 3 C 2 ) /SiO 2 /Pt memristor after considering the stronger interactions between Ti 3 C 2 and Ag ions, which lead to a Ti 3 C 2 /SiO 2 structure memristor owning to much lower “SET” voltage and smaller resistance switching fluctuation than pure SiO 2 memristor. Furthermore, the conductances of the Ag/Ti 3 C 2 /SiO 2 /Pt memristor have been modulated by changing the number of the applied programming pulse, and two typical biological behaviors, i.e., long-term potentiation and long-term depression, have been achieved. Finally, device conductances are introduced into an integrated device-to-algorithm framework as synaptic weights, by which the MNIST hand-written digits are recognized with accuracy up to 77.39%.
{"title":"Design of High Performance MXene/Oxide Structure Memristors for Image Recognition Applications","authors":"Xiaojuan Lian;Yuelin Shi;Xinyi Shen;Xiang Wan;Zhikuang Cai;Lei Wang;Yuchao Yang","doi":"10.23919/cje.2022.00.125","DOIUrl":"https://doi.org/10.23919/cje.2022.00.125","url":null,"abstract":"Recent popularity to realize image recognition by memristor-based neural network hardware systems has been witnessed owing to their similarities to neurons and synapses. However, the stochastic formation of conductive filaments inside the oxide memristor devices inevitably makes them face some drawbacks, represented by relatively higher power consumption and severer resistance switching variability. In this work, we design and fabricate the Ag/MXene (Ti\u0000<inf>3</inf>\u0000C\u0000<inf>2</inf>\u0000) /SiO\u0000<inf>2</inf>\u0000/Pt memristor after considering the stronger interactions between Ti\u0000<inf>3</inf>\u0000C\u0000<inf>2</inf>\u0000 and Ag ions, which lead to a Ti\u0000<inf>3</inf>\u0000C\u0000<inf>2</inf>\u0000/SiO\u0000<inf>2</inf>\u0000 structure memristor owning to much lower “SET” voltage and smaller resistance switching fluctuation than pure SiO\u0000<inf>2</inf>\u0000 memristor. Furthermore, the conductances of the Ag/Ti\u0000<inf>3</inf>\u0000C\u0000<inf>2</inf>\u0000/SiO\u0000<inf>2</inf>\u0000/Pt memristor have been modulated by changing the number of the applied programming pulse, and two typical biological behaviors, i.e., long-term potentiation and long-term depression, have been achieved. Finally, device conductances are introduced into an integrated device-to-algorithm framework as synaptic weights, by which the MNIST hand-written digits are recognized with accuracy up to 77.39%.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"33 2","pages":"336-345"},"PeriodicalIF":1.2,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488072","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140342815","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-01DOI: 10.23919/cje.2023.00.057
Yan Zheng;Hanyu Tian;Yuandan Dong;Yongle Wu
Based on the full-mode capacitively loaded substrate integrated waveguide (SIW) resonator and the miniaturized shielded half-mode capacitively loaded SIW (S-HMCSIW) cavities, a novel compact high-performance filter is proposed. The footprint of the half-mode SIW (HMSIW) is further reduced due to the application of the capacitive-loading technique. By applying cross coupling, the proposed SIW filter's transmission zero enhances the stopband rejection and shows excellent selectivity. For the bandpass filter, the measured $vert S_{21}vert$ and $vert S_{11}vert$ are better than 1.09 dB and −14 dB, respectively. And a 3-dB fractional bandwidth (FBW) of 9.14-10.76 GHz (FBW=16.2%) is also observed. The filter achieves a wide stopband with a −20 dB out-of-band rejection up to 2.69f 0 (f 0 = 10 GHz), with a size of $0.39 lambda_{mathrm{g}} times 0.51 lambda_{mathrm{g}}$ only. Good agreement between measurement and simulation is obtained.
{"title":"Miniaturized, Wide Stopband Filter Based on Shielded Capacitively Loaded SIW Resonators","authors":"Yan Zheng;Hanyu Tian;Yuandan Dong;Yongle Wu","doi":"10.23919/cje.2023.00.057","DOIUrl":"https://doi.org/10.23919/cje.2023.00.057","url":null,"abstract":"Based on the full-mode capacitively loaded substrate integrated waveguide (SIW) resonator and the miniaturized shielded half-mode capacitively loaded SIW (S-HMCSIW) cavities, a novel compact high-performance filter is proposed. The footprint of the half-mode SIW (HMSIW) is further reduced due to the application of the capacitive-loading technique. By applying cross coupling, the proposed SIW filter's transmission zero enhances the stopband rejection and shows excellent selectivity. For the bandpass filter, the measured \u0000<tex>$vert S_{21}vert$</tex>\u0000 and \u0000<tex>$vert S_{11}vert$</tex>\u0000 are better than 1.09 dB and −14 dB, respectively. And a 3-dB fractional bandwidth (FBW) of 9.14-10.76 GHz (FBW=16.2%) is also observed. The filter achieves a wide stopband with a −20 dB out-of-band rejection up to 2.69f\u0000<inf>0</inf>\u0000 (f\u0000<inf>0</inf>\u0000 = 10 GHz), with a size of \u0000<tex>$0.39 lambda_{mathrm{g}} times 0.51 lambda_{mathrm{g}}$</tex>\u0000 only. Good agreement between measurement and simulation is obtained.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"33 2","pages":"456-462"},"PeriodicalIF":1.2,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488058","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140342816","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A compact filtering antenna system with wide-angle scanning is proposed for vehicle to infrastructure (V2I) communication which would handle complex communication scenarios. In this work, a wide beam filtering antenna is realized by using some inductive resistance structures such as metal pins and pillars, and capacitive structures such as slots, parasitical patches to produce the radiation nulls at two sides of the operating frequency band and improve the impedance matching in the passband. Meanwhile, the wide beam capability is also realized by the above structure. Furthermore, two H- and E-plane linear arrays are designed for the beam scanning capability with filtering characteristics based on the proposed antenna. To verify the proposed design concept, a prototype is fabricated and measured. The measurement and simulation agree well, demonstrating an excellent filtering characteristic with the operating frequency band from 3.18 to 3.45 GHz (about 8.1%), the high total efficiency of about 88%, and 3-dB-beamwidth of more than 100° and 120° in the above two arrays, respectively. Additionally, the proposed arrays can realize the beam scanning up to the coverage of 112° and 120° with a lower gain reduction and a good filtering characteristic, respectively.
本文提出了一种具有广角扫描功能的紧凑型滤波天线系统，用于车辆到基础设施（V2I）的通信，可应对复杂的通信场景。在这项工作中，通过使用一些电感电阻结构（如金属引脚和支柱）和电容结构（如槽、寄生贴片）来实现宽波束滤波天线，从而在工作频段的两侧产生辐射空，并改善通带内的阻抗匹配。同时，上述结构还实现了宽波束能力。此外，还设计了两个 H 平面和 E 平面线性阵列，在所提天线的基础上实现了具有滤波特性的波束扫描能力。为了验证所提出的设计理念，我们制作并测量了一个原型。测量结果与仿真结果完全吻合，表明上述两个阵列在 3.18 至 3.45 GHz 工作频段内具有出色的滤波特性（约 8.1%），总效率高达 88%，3-dB 波束宽度分别超过 100°和 120°。此外，所提出的阵列还能实现波束扫描，覆盖范围分别达到 112°和 120°，同时具有较低的增益降低率和良好的滤波特性。
{"title":"A Compact Filtering Antenna System with Wide-Angle Scanning Capability for V2I Communication","authors":"Chuang Han;Tong Li;Zhaolin Zhang;Ling Wang;Guangwei Yang;Yikai Chen","doi":"10.23919/cje.2023.00.039","DOIUrl":"https://doi.org/10.23919/cje.2023.00.039","url":null,"abstract":"A compact filtering antenna system with wide-angle scanning is proposed for vehicle to infrastructure (V2I) communication which would handle complex communication scenarios. In this work, a wide beam filtering antenna is realized by using some inductive resistance structures such as metal pins and pillars, and capacitive structures such as slots, parasitical patches to produce the radiation nulls at two sides of the operating frequency band and improve the impedance matching in the passband. Meanwhile, the wide beam capability is also realized by the above structure. Furthermore, two H- and E-plane linear arrays are designed for the beam scanning capability with filtering characteristics based on the proposed antenna. To verify the proposed design concept, a prototype is fabricated and measured. The measurement and simulation agree well, demonstrating an excellent filtering characteristic with the operating frequency band from 3.18 to 3.45 GHz (about 8.1%), the high total efficiency of about 88%, and 3-dB-beamwidth of more than 100° and 120° in the above two arrays, respectively. Additionally, the proposed arrays can realize the beam scanning up to the coverage of 112° and 120° with a lower gain reduction and a good filtering characteristic, respectively.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"33 2","pages":"516-526"},"PeriodicalIF":1.2,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488056","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140339931","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A novel trench insulated gate bipolar transistor (TIGBT) with a shallow emitter trench controlled P-type dummy region (STCP-TIGBT) is proposed. Compared with the conventional TIGBT with floating P-type dummy region (CFP-TIGBT) and TIGBT with floating P-type dummy region and normally on hole path (HFP-TIGBT), the proposed STCP structure not only speeds up the extraction of excessive holes in the turn-off process but also reduces the Miller plateau charge $(Q_{text{gc}})$ . Therefore, both the power loss and electromagnetic interference (EMI) noise are significantly reduced. Simulation results show that the $Q_{text{gc}}$ of the proposed device is only 501 $text{nC}/text{cm}^{2}$ , which is reduced by 58.5% and 26.4% when compared to the CFP-TIGBT and HFP-TIGBT, respectively. At same on-state voltage drop $(V_{text{ceon}})$ of 1.02 V, the turn-off loss $(E_{text{off})})$ of the proposed device is 13.49 $text{mJ}/text{cm}^{2}$ , which is 64.6% and 67.6% less than those of the CFP-TIGBT and HFP-TIGBT, respectively. Moreover, the reverse recovery $mathrm{d}V_{text{ak}}/text{dt}$ of the freewheeling diode at same turn-on loss $(E_{text{on}})$ of 31.8 $text{mJ}/text{cm}^{2}$ for the proposed STCP-TIGBT is only 2.15 $text{kV}/mu mathrm{s}$ , which is reduced by 91.3% and 57.2% when compared to 24.69 $mathrm{kV}/mu mathrm{s}$ and 5.02 $mathrm{kV}/mu mathrm{s}$ for the CFP-TIGBT and HFP-TIGBT, respectively. The reduced $mathrm{d}V/mathrm{d}t$ significantly suppresses the electromagnetic interference noise generated by the proposed device.
{"title":"Low Loss and Low EMI Noise Trench IGBT with Shallow Emitter Trench Controlled p-Type Dummy Region","authors":"Jinping Zhang;Xiaofeng Li;Rongrong Zhu;Kang Wang;Bo Zhang;Chunfu Zhang","doi":"10.23919/cje.2022.00.080","DOIUrl":"https://doi.org/10.23919/cje.2022.00.080","url":null,"abstract":"A novel trench insulated gate bipolar transistor (TIGBT) with a shallow emitter trench controlled P-type dummy region (STCP-TIGBT) is proposed. Compared with the conventional TIGBT with floating P-type dummy region (CFP-TIGBT) and TIGBT with floating P-type dummy region and normally on hole path (HFP-TIGBT), the proposed STCP structure not only speeds up the extraction of excessive holes in the turn-off process but also reduces the Miller plateau charge \u0000<tex>$(Q_{text{gc}})$</tex>\u0000. Therefore, both the power loss and electromagnetic interference (EMI) noise are significantly reduced. Simulation results show that the \u0000<tex>$Q_{text{gc}}$</tex>\u0000 of the proposed device is only 501 \u0000<tex>$text{nC}/text{cm}^{2}$</tex>\u0000, which is reduced by 58.5% and 26.4% when compared to the CFP-TIGBT and HFP-TIGBT, respectively. At same on-state voltage drop \u0000<tex>$(V_{text{ceon}})$</tex>\u0000 of 1.02 V, the turn-off loss \u0000<tex>$(E_{text{off})})$</tex>\u0000 of the proposed device is 13.49 \u0000<tex>$text{mJ}/text{cm}^{2}$</tex>\u0000, which is 64.6% and 67.6% less than those of the CFP-TIGBT and HFP-TIGBT, respectively. Moreover, the reverse recovery \u0000<tex>$mathrm{d}V_{text{ak}}/text{dt}$</tex>\u0000 of the freewheeling diode at same turn-on loss \u0000<tex>$(E_{text{on}})$</tex>\u0000 of 31.8 \u0000<tex>$text{mJ}/text{cm}^{2}$</tex>\u0000 for the proposed STCP-TIGBT is only 2.15 \u0000<tex>$text{kV}/mu mathrm{s}$</tex>\u0000, which is reduced by 91.3% and 57.2% when compared to 24.69 \u0000<tex>$mathrm{kV}/mu mathrm{s}$</tex>\u0000 and 5.02 \u0000<tex>$mathrm{kV}/mu mathrm{s}$</tex>\u0000 for the CFP-TIGBT and HFP-TIGBT, respectively. The reduced \u0000<tex>$mathrm{d}V/mathrm{d}t$</tex>\u0000 significantly suppresses the electromagnetic interference noise generated by the proposed device.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"33 2","pages":"326-335"},"PeriodicalIF":1.2,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488071","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140342780","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The asynchronous time-sensitive networking (TSN) based on IEEE 802.1Qcr is expected to be a promising solution for the asynchronous transmissions of safety-critical flows without the support of clock synchronization. When the asynchronous traffic shaping (ATS) mechanism is adopted to meet the deadline requirements for transmissions of safety-critical flow, it is necessary to formally verify the real-time properties and corresponding network performance. However, it is still unclear how to build an efficient formal model to evaluate different frame selection methods during the ATS scheduling process, which originate from the dominations of priority or eligibility time. In this paper, we present a formal modeling framework to compare the impacts of different frame selection on transmission sequence under the ATS mechanism. According to the priority level (pATS) or eligibility time (eATS) for flows, two transmission selection methods in ATS are modeled and compared. Then, we verify the real-time properties of ATS. The result shows that the shaping-for-free property can be satisfied with the pATS method but can not be fulfilled with the eATS method. Besides, the timing analysis results illustrate that the eATS method can provide more fairness than the pATS method for the transmission of low-priority flows in TSN networks.
{"title":"Formal Modeling of Frame Selection in Asynchronous TSN Communications","authors":"Ershuai Li;Xuan Zhou;Jinjing Sun;Huagang Xiong;Feng He;Nan Zhao","doi":"10.23919/cje.2022.00.321","DOIUrl":"https://doi.org/10.23919/cje.2022.00.321","url":null,"abstract":"The asynchronous time-sensitive networking (TSN) based on IEEE 802.1Qcr is expected to be a promising solution for the asynchronous transmissions of safety-critical flows without the support of clock synchronization. When the asynchronous traffic shaping (ATS) mechanism is adopted to meet the deadline requirements for transmissions of safety-critical flow, it is necessary to formally verify the real-time properties and corresponding network performance. However, it is still unclear how to build an efficient formal model to evaluate different frame selection methods during the ATS scheduling process, which originate from the dominations of priority or eligibility time. In this paper, we present a formal modeling framework to compare the impacts of different frame selection on transmission sequence under the ATS mechanism. According to the priority level (pATS) or eligibility time (eATS) for flows, two transmission selection methods in ATS are modeled and compared. Then, we verify the real-time properties of ATS. The result shows that the shaping-for-free property can be satisfied with the pATS method but can not be fulfilled with the eATS method. Besides, the timing analysis results illustrate that the eATS method can provide more fairness than the pATS method for the transmission of low-priority flows in TSN networks.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"33 2","pages":"549-563"},"PeriodicalIF":1.2,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488073","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140339976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wideband high power amplifier (PA) with poor harmonic suppression will degrade the performance of the active electronically scanned array (AESA) due to its harmonic products falling into the operating bandwidth of a wideband T/R module. In view of this, a compact reconfigurable harmonic suppress circuit (HSC) is proposed to achieve low in-band harmonic for compact T/R module with multiple octaves under TX-mode operation. The HSC consists of eight microstrip resonant stubs with high impedance and multiple p-i-n switches. By controlling the p-i-n switches, the HSC can work in three states. When six of the used p-i-n switches are “ON” state, the corresponding microstrip resonant stubs are loaded onto the 50 Ω transmission line, which performs a bandstop filter (BSF). For verification, the HSC with bandwidth of 12–15 GHz/15-18 GHz is designed to apply to a 6–18 GHz T/R module. As a result, the second harmonic of 6–9 GHz transmitting signal can be suppressed below 32 dBc when compared to the PA's fundamental output. While the p-i-n switches are “OFF” state, the HSC is almost the same as a 50 Ω transmission line, which will have a little effect on the 9–18 GHz transmitting signal. The measurement results approximately agree with the calculated results and simulated results, which demonstrate the validity of the proposed HSC.
{"title":"Realization of Low in-Band Harmonic for Compact 6–18-GHz T/R Module Under TX-Mode Operation","authors":"Jinming Lai;Zhiyou Li;Chaojie Wang;Hailong Wang;Xiaohua Ma;Yongle Wu","doi":"10.23919/cje.2022.00.295","DOIUrl":"https://doi.org/10.23919/cje.2022.00.295","url":null,"abstract":"Wideband high power amplifier (PA) with poor harmonic suppression will degrade the performance of the active electronically scanned array (AESA) due to its harmonic products falling into the operating bandwidth of a wideband T/R module. In view of this, a compact reconfigurable harmonic suppress circuit (HSC) is proposed to achieve low in-band harmonic for compact T/R module with multiple octaves under TX-mode operation. The HSC consists of eight microstrip resonant stubs with high impedance and multiple p-i-n switches. By controlling the p-i-n switches, the HSC can work in three states. When six of the used p-i-n switches are “ON” state, the corresponding microstrip resonant stubs are loaded onto the 50 Ω transmission line, which performs a bandstop filter (BSF). For verification, the HSC with bandwidth of 12–15 GHz/15-18 GHz is designed to apply to a 6–18 GHz T/R module. As a result, the second harmonic of 6–9 GHz transmitting signal can be suppressed below 32 dBc when compared to the PA's fundamental output. While the p-i-n switches are “OFF” state, the HSC is almost the same as a 50 Ω transmission line, which will have a little effect on the 9–18 GHz transmitting signal. The measurement results approximately agree with the calculated results and simulated results, which demonstrate the validity of the proposed HSC.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"33 2","pages":"380-384"},"PeriodicalIF":1.2,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488050","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140342734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-01DOI: 10.23919/cje.2022.00.003
Xiaoyan Zhao;Jincheng Hu;Haoran Zhang;Sidou Guo;Yuming Feng;Lin Tang;Kaichun Zhang;Diwei Liu;Shilong Pan
A backward wave oscillator with parallel multiple beams and multi-pin slow-wave structure (SWS) operating at the frequency above 500 GHz is studied. Both the cold-cavity dispersion characteristics and CST Particle Studio simulation results reveal that there are obvious mode competition problems in this kind of terahertz source. Considering that the structure of the multi-pin SWS is similar to that of two-dimensional photonic crystals, we introduce the defects of photonic crystal with the property of filtering into the SWS to suppress high-order modes. Furthermore, a detailed study of the effect of suppressing higher-order modes is carried out in the process of changing location and arrangement pattern of the point defects. The stable, single-mode operation of the terahertz source is realized. The simulation results show that the ratio of the output peak power of the higher-order modes to that of the fundamental mode is less than 1.9%. Also, the source can provide the output peak power of 44.8 mW at the frequency of 502.2 GHz in the case of low beam voltage of 4.7 kV.
{"title":"Mode Competition of Low Voltage Backward Wave Oscillator near 500 GHz with Parallel Multi-Beam","authors":"Xiaoyan Zhao;Jincheng Hu;Haoran Zhang;Sidou Guo;Yuming Feng;Lin Tang;Kaichun Zhang;Diwei Liu;Shilong Pan","doi":"10.23919/cje.2022.00.003","DOIUrl":"https://doi.org/10.23919/cje.2022.00.003","url":null,"abstract":"A backward wave oscillator with parallel multiple beams and multi-pin slow-wave structure (SWS) operating at the frequency above 500 GHz is studied. Both the cold-cavity dispersion characteristics and CST Particle Studio simulation results reveal that there are obvious mode competition problems in this kind of terahertz source. Considering that the structure of the multi-pin SWS is similar to that of two-dimensional photonic crystals, we introduce the defects of photonic crystal with the property of filtering into the SWS to suppress high-order modes. Furthermore, a detailed study of the effect of suppressing higher-order modes is carried out in the process of changing location and arrangement pattern of the point defects. The stable, single-mode operation of the terahertz source is realized. The simulation results show that the ratio of the output peak power of the higher-order modes to that of the fundamental mode is less than 1.9%. Also, the source can provide the output peak power of 44.8 mW at the frequency of 502.2 GHz in the case of low beam voltage of 4.7 kV.","PeriodicalId":50701,"journal":{"name":"Chinese Journal of Electronics","volume":"33 2","pages":"488-495"},"PeriodicalIF":1.2,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488065","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140342741","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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