In this paper, a Voltage Multiplier (VM) converter configuration has been designed for high Power PFC application, ensuring reduced losses and high system efficiency.The conventional PFC system is improved with adding VM circuit configuration that enhances the static gain features with moderate duty ratio (D), and hence, the reverse recovery (RR) issue is resolved. The VM section inherently adds two main specific features of clamping behavior and ZCS phenomenon to the PFC system. An experimental prototype of 2 kW, 600 V VM PFC converter configuration is designed and its effectiveness is validated under low line input of 100 V , operating at a high duty ratio, D = 0:67. The Real-Time Interface (RTI) feature of dSPACE1104 and MATLAB/Simulink are used to give the control signal for the verification of the system. Always, less than half of the output voltage (300 V ) appears across the switches of the converter, hence, voltage stress of the switch is minimized. Also, ZCS phenomenon is evident during switching commutations due to the snubber circuit behavior of the resonant tank, included in the proposed PFC converter. Hence, the overall system efficiency is improved. Furthermore, higher system efficiency is maintained for different rating which has been tested in this research work.
本文为大功率 PFC 应用设计了一种电压倍增器（VM）转换器配置，可确保降低损耗和提高系统效率。传统的 PFC 系统通过添加 VM 电路配置进行了改进，在适度占空比（D）的情况下增强了静态增益特性，从而解决了反向恢复（RR）问题。VM 部分在本质上为 PFC 系统增加了箝位行为和 ZCS 现象两大特殊功能。我们设计了一个 2 kW、600 VM PFC 转换器配置的实验原型，并在 100 V 低线路输入、高占空比 D = 0:67 条件下对其有效性进行了验证。dSPACE1104 的实时接口 (RTI) 功能和 MATLAB/Simulink 被用来为系统验证提供控制信号。转换器开关上的电压始终低于输出电压（300 V）的一半，因此开关的电压应力最小。此外，由于谐振槽的缓冲电路行为，在开关换向期间，ZCS 现象也很明显。因此，整个系统的效率得到了提高。此外，在本研究工作中测试的不同额定值下，都能保持较高的系统效率。
{"title":"High power voltage multiplier (VM) PFC Converter with inherent ZCS Characteristics and high step-ip gain for enhanced low-line efficiency","authors":"P. R. Mohanty, A. Panda, N. Patnaik","doi":"10.59168/dmxq7599","DOIUrl":"https://doi.org/10.59168/dmxq7599","url":null,"abstract":"In this paper, a Voltage Multiplier (VM) converter configuration has been designed for high Power PFC application, ensuring reduced losses and high system efficiency.The conventional PFC system is improved with adding VM circuit configuration that enhances the static gain features with moderate duty ratio (D), and hence, the reverse recovery (RR) issue is resolved. The VM section inherently adds two main specific features of clamping behavior and ZCS phenomenon to the PFC system. An experimental prototype of 2 kW, 600 V VM PFC converter configuration is designed and its effectiveness is validated under low line input of 100 V , operating at a high duty ratio, D = 0:67. The Real-Time Interface (RTI) feature of dSPACE1104 and MATLAB/Simulink are used to give the control signal for the verification of the system. Always, less than half of the output voltage (300 V ) appears across the switches of the converter, hence, voltage stress of the switch is minimized. Also, ZCS phenomenon is evident during switching commutations due to the snubber circuit behavior of the resonant tank, included in the proposed PFC converter. Hence, the overall system efficiency is improved. Furthermore, higher system efficiency is maintained for different rating which has been tested in this research work.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"158 3","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139862753","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Y. Cherif, D. Benoudjit, M. Nait-Said, N. Nait-Said
The short circuit is among one of the most dangerous electrical faults in induction motor, which leads to serious implications on the motor operation and its performances. The present paper deals with the influence of the stator short circuit fault in its early stage in terms of performances and service continuity of an electric vehicle (EV) using dual induction motor’s structure piloted by Backstepping control. An equivalent induction motor model with turn-to-turn fault on one stator phase, without already assuming the temperature effect through an intrinsic model, is investigated and thereafter its impacts on electric vehicle performance using simulation tests are presented and discussed.
{"title":"Incipient short circuit fault impact on service continuity of an electric vehicle propelled by dual induction motors structure","authors":"S. Y. Cherif, D. Benoudjit, M. Nait-Said, N. Nait-Said","doi":"10.59168/eera7018","DOIUrl":"https://doi.org/10.59168/eera7018","url":null,"abstract":"The short circuit is among one of the most dangerous electrical faults in induction motor, which leads to serious implications on the motor operation and its performances. The present paper deals with the influence of the stator short circuit fault in its early stage in terms of performances and service continuity of an electric vehicle (EV) using dual induction motor’s structure piloted by Backstepping control. An equivalent induction motor model with turn-to-turn fault on one stator phase, without already assuming the temperature effect through an intrinsic model, is investigated and thereafter its impacts on electric vehicle performance using simulation tests are presented and discussed.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"25 10","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139804736","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Y. Cherif, D. Benoudjit, M. Nait-Said, N. Nait-Said
The short circuit is among one of the most dangerous electrical faults in induction motor, which leads to serious implications on the motor operation and its performances. The present paper deals with the influence of the stator short circuit fault in its early stage in terms of performances and service continuity of an electric vehicle (EV) using dual induction motor’s structure piloted by Backstepping control. An equivalent induction motor model with turn-to-turn fault on one stator phase, without already assuming the temperature effect through an intrinsic model, is investigated and thereafter its impacts on electric vehicle performance using simulation tests are presented and discussed.
{"title":"Incipient short circuit fault impact on service continuity of an electric vehicle propelled by dual induction motors structure","authors":"S. Y. Cherif, D. Benoudjit, M. Nait-Said, N. Nait-Said","doi":"10.59168/eera7018","DOIUrl":"https://doi.org/10.59168/eera7018","url":null,"abstract":"The short circuit is among one of the most dangerous electrical faults in induction motor, which leads to serious implications on the motor operation and its performances. The present paper deals with the influence of the stator short circuit fault in its early stage in terms of performances and service continuity of an electric vehicle (EV) using dual induction motor’s structure piloted by Backstepping control. An equivalent induction motor model with turn-to-turn fault on one stator phase, without already assuming the temperature effect through an intrinsic model, is investigated and thereafter its impacts on electric vehicle performance using simulation tests are presented and discussed.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"2 12","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139864893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, a Voltage Multiplier (VM) converter configuration has been designed for high Power PFC application, ensuring reduced losses and high system efficiency.The conventional PFC system is improved with adding VM circuit configuration that enhances the static gain features with moderate duty ratio (D), and hence, the reverse recovery (RR) issue is resolved. The VM section inherently adds two main specific features of clamping behavior and ZCS phenomenon to the PFC system. An experimental prototype of 2 kW, 600 V VM PFC converter configuration is designed and its effectiveness is validated under low line input of 100 V , operating at a high duty ratio, D = 0:67. The Real-Time Interface (RTI) feature of dSPACE1104 and MATLAB/Simulink are used to give the control signal for the verification of the system. Always, less than half of the output voltage (300 V ) appears across the switches of the converter, hence, voltage stress of the switch is minimized. Also, ZCS phenomenon is evident during switching commutations due to the snubber circuit behavior of the resonant tank, included in the proposed PFC converter. Hence, the overall system efficiency is improved. Furthermore, higher system efficiency is maintained for different rating which has been tested in this research work.
本文为大功率 PFC 应用设计了一种电压倍增器（VM）转换器配置，可确保降低损耗和提高系统效率。传统的 PFC 系统通过添加 VM 电路配置进行了改进，在适度占空比（D）的情况下增强了静态增益特性，从而解决了反向恢复（RR）问题。VM 部分在本质上为 PFC 系统增加了箝位行为和 ZCS 现象两大特殊功能。我们设计了一个 2 kW、600 VM PFC 转换器配置的实验原型，并在 100 V 低线路输入、高占空比 D = 0:67 条件下对其有效性进行了验证。dSPACE1104 的实时接口 (RTI) 功能和 MATLAB/Simulink 被用来为系统验证提供控制信号。转换器开关上的电压始终低于输出电压（300 V）的一半，因此开关的电压应力最小。此外，由于谐振槽的缓冲电路行为，在开关换向期间，ZCS 现象也很明显。因此，整个系统的效率得到了提高。此外，在本研究工作中测试的不同额定值下，都能保持较高的系统效率。
{"title":"High power voltage multiplier (VM) PFC Converter with inherent ZCS Characteristics and high step-ip gain for enhanced low-line efficiency","authors":"P. R. Mohanty, A. Panda, N. Patnaik","doi":"10.59168/dmxq7599","DOIUrl":"https://doi.org/10.59168/dmxq7599","url":null,"abstract":"In this paper, a Voltage Multiplier (VM) converter configuration has been designed for high Power PFC application, ensuring reduced losses and high system efficiency.The conventional PFC system is improved with adding VM circuit configuration that enhances the static gain features with moderate duty ratio (D), and hence, the reverse recovery (RR) issue is resolved. The VM section inherently adds two main specific features of clamping behavior and ZCS phenomenon to the PFC system. An experimental prototype of 2 kW, 600 V VM PFC converter configuration is designed and its effectiveness is validated under low line input of 100 V , operating at a high duty ratio, D = 0:67. The Real-Time Interface (RTI) feature of dSPACE1104 and MATLAB/Simulink are used to give the control signal for the verification of the system. Always, less than half of the output voltage (300 V ) appears across the switches of the converter, hence, voltage stress of the switch is minimized. Also, ZCS phenomenon is evident during switching commutations due to the snubber circuit behavior of the resonant tank, included in the proposed PFC converter. Hence, the overall system efficiency is improved. Furthermore, higher system efficiency is maintained for different rating which has been tested in this research work.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"9 5","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139802762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ivan Hotový, Johann Zehetner, V. Rehacek, Miroslav Mikolasek, Ivan Kostic, S. Serečunová, Dana Seyringer, Fadi Dohnal
This study presents different approaches to increase the sensing area of NiO based semiconducting metal oxide gas sensors. Micro- and nanopatterned laser induced periodic surface structures (LIPSS) are generated on silicon and Si/SiO2 substrates. The surface morphologies of the fabricated samples are examined by FE SEM. We select the silicon samples with an intermediate Si3N4 layer due to its superior isolation quality over the thermal oxide for evaluating the hydrogen and acetone sensitivity of a NiO based test sensor.
本研究介绍了增加基于氧化镍的半导体金属氧化物气体传感器传感面积的不同方法。在硅和硅/二氧化硅基底上生成了微图案和纳米图案的激光诱导周期性表面结构 (LIPSS)。利用 FE SEM 扫描电子显微镜检查了制作样品的表面形态。我们选择了带有中间 Si3N4 层的硅样品，因为它的隔离质量优于热氧化物，可用于评估基于氧化镍的测试传感器的氢气和丙酮灵敏度。
{"title":"Preparation of laser induced periodic surface structures for gas sensing thin films and gas sensing verification of a NiO based sensor structure","authors":"Ivan Hotový, Johann Zehetner, V. Rehacek, Miroslav Mikolasek, Ivan Kostic, S. Serečunová, Dana Seyringer, Fadi Dohnal","doi":"10.2478/jee-2024-0004","DOIUrl":"https://doi.org/10.2478/jee-2024-0004","url":null,"abstract":"\u0000 This study presents different approaches to increase the sensing area of NiO based semiconducting metal oxide gas sensors. Micro- and nanopatterned laser induced periodic surface structures (LIPSS) are generated on silicon and Si/SiO2 substrates. The surface morphologies of the fabricated samples are examined by FE SEM. We select the silicon samples with an intermediate Si3N4 layer due to its superior isolation quality over the thermal oxide for evaluating the hydrogen and acetone sensitivity of a NiO based test sensor.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"28 2","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139883705","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ambuli B. R. Etemesi, T. Megahed, Haruichi Kanaya, D. Mansour
Existing distribution networks were not designed with large-scale electric vehicle (EV) charging infrastructure in mind. Integrating EV charging stations with the distribution grid might lead to power quality (PQ) issues at the point of common coupling (PCC). This work proposes a two-mode, unit template-based synchronous reference frame hysteresis current-controlled (SRF-HCC) three-phase Level 2 EV charger. Mode one focuses on charging the EV battery from the grid (G2V) and utilizes current and voltage control techniques to enhance battery life and performance. Whereas mode two enables the EV’s stored energy to be discharged to the grid (V2G) by the EV user, allowing the sale of power to support the transient effect of the grid voltage and frequency and enhancing the grid’s PQ. The HCC generates switching pulses for both the AC-DC and buck-boost converters. The SRF-based unit template-based control (SRF-UTC) method ensures system stability, voltage, and frequency regulation for power exchange with the grid by combining its efficiency with that of the HCC. The EV charger proposal comprises three primary components: a 3-phase bidirectional AC-DC converter, a bidirectional buck-boost converter, and a filter circuit. The proposed system was modeled using MATLAB/Simulink and evaluated in two case studies to assess its performance.
{"title":"Design of a bidirectional EV charger using unit template-based current-controlled synchronous reference frame hysteresis","authors":"Ambuli B. R. Etemesi, T. Megahed, Haruichi Kanaya, D. Mansour","doi":"10.2478/jee-2024-0005","DOIUrl":"https://doi.org/10.2478/jee-2024-0005","url":null,"abstract":"\u0000 Existing distribution networks were not designed with large-scale electric vehicle (EV) charging infrastructure in mind. Integrating EV charging stations with the distribution grid might lead to power quality (PQ) issues at the point of common coupling (PCC). This work proposes a two-mode, unit template-based synchronous reference frame hysteresis current-controlled (SRF-HCC) three-phase Level 2 EV charger. Mode one focuses on charging the EV battery from the grid (G2V) and utilizes current and voltage control techniques to enhance battery life and performance. Whereas mode two enables the EV’s stored energy to be discharged to the grid (V2G) by the EV user, allowing the sale of power to support the transient effect of the grid voltage and frequency and enhancing the grid’s PQ. The HCC generates switching pulses for both the AC-DC and buck-boost converters. The SRF-based unit template-based control (SRF-UTC) method ensures system stability, voltage, and frequency regulation for power exchange with the grid by combining its efficiency with that of the HCC. The EV charger proposal comprises three primary components: a 3-phase bidirectional AC-DC converter, a bidirectional buck-boost converter, and a filter circuit. The proposed system was modeled using MATLAB/Simulink and evaluated in two case studies to assess its performance.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"23 6","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139822325","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zuzana Košelová, Lenka Horáková, D. Burda, Mohammad M. Allaham, A. Knápek, Z. Fohlerova
This study investigates the crucial process of cleaning cold field emission electron emitters and scanning tunnel microscopy (STM) probes, particularly focusing on tungsten tips. The cleanliness of these tips is essential for maintaining optimal cathode properties, preventing impurities that can significantly affect the emission process. Various cleaning methods, including macroetching, ammonia cleaning, and hydrofluoric acid (HF) cleaning were explored and compared by scanning electron microscopy. The macroetching method, involving a mixture of hydrochloric acid, nitric acid, and hydrogen fluoride, proved to be too reactive, causing significant material removal and altering the tip’s structure. Ammonia cleaning did not significantly improve or harm the samples. However, oxide islands appeared in some areas, suggesting the potential formation of ammonium tungsten oxide. HF cleaning, specifically at 20% and 50% concentrations, demonstrated effectiveness in removing tungsten oxides without damaging the tip. Pre-cleaning with water and ethanol proved beneficial for subsequent HF refinement. Results suggest that HF is the most suitable method for oxide removal but a rinse with water is essential for removing residual sodium hydroxide. To maintain optimal properties, it is crucial to apply a less reactive layer quickly or transfer the tips to a water/ethanol bath to prevent oxidation.
{"title":"Cleaning of tungsten tips for subsequent use as cold field emitters or STM probes","authors":"Zuzana Košelová, Lenka Horáková, D. Burda, Mohammad M. Allaham, A. Knápek, Z. Fohlerova","doi":"10.2478/jee-2024-0006","DOIUrl":"https://doi.org/10.2478/jee-2024-0006","url":null,"abstract":"\u0000 This study investigates the crucial process of cleaning cold field emission electron emitters and scanning tunnel microscopy (STM) probes, particularly focusing on tungsten tips. The cleanliness of these tips is essential for maintaining optimal cathode properties, preventing impurities that can significantly affect the emission process. Various cleaning methods, including macroetching, ammonia cleaning, and hydrofluoric acid (HF) cleaning were explored and compared by scanning electron microscopy. The macroetching method, involving a mixture of hydrochloric acid, nitric acid, and hydrogen fluoride, proved to be too reactive, causing significant material removal and altering the tip’s structure. Ammonia cleaning did not significantly improve or harm the samples. However, oxide islands appeared in some areas, suggesting the potential formation of ammonium tungsten oxide. HF cleaning, specifically at 20% and 50% concentrations, demonstrated effectiveness in removing tungsten oxides without damaging the tip. Pre-cleaning with water and ethanol proved beneficial for subsequent HF refinement. Results suggest that HF is the most suitable method for oxide removal but a rinse with water is essential for removing residual sodium hydroxide. To maintain optimal properties, it is crucial to apply a less reactive layer quickly or transfer the tips to a water/ethanol bath to prevent oxidation.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"18 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139888298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Bhardwaj, Ravuri Narayana, Dheeraj Kalra, Mayank Srivastava
The article explores the compact emulation of the inverse memristor through a circuit-based approach. It introduces a floating emulator architecture that incorporates a dual output OTA (Operation Transconductance Amplifier) and DVCC (Differential Voltage Current Conveyor), along with two grounded passive elements, to achieve the emulation of an inverse memristor. The utilization of grounded resistance allows for tunability over the realized behaviour. A key contribution of this research is the novel application of the inverse memristor to extend the operating frequency range of any memristor emulator circuit. Validation of the proposed emulator circuit, in both incremental and decremental modes, along with its application, is conducted using PSPICE-generated simulation results in the 0.18 µm TSMC CMOS technology. Additionally, an inverse memristor emulator configuration employing the IC LM13700 is presented, and its functionality is tested through a breadboard implementation.
{"title":"Integrable emulation of a floating incremental/decremental inverse memristor for memristor bandwidth extension","authors":"K. Bhardwaj, Ravuri Narayana, Dheeraj Kalra, Mayank Srivastava","doi":"10.2478/jee-2024-0001","DOIUrl":"https://doi.org/10.2478/jee-2024-0001","url":null,"abstract":"\u0000 The article explores the compact emulation of the inverse memristor through a circuit-based approach. It introduces a floating emulator architecture that incorporates a dual output OTA (Operation Transconductance Amplifier) and DVCC (Differential Voltage Current Conveyor), along with two grounded passive elements, to achieve the emulation of an inverse memristor. The utilization of grounded resistance allows for tunability over the realized behaviour. A key contribution of this research is the novel application of the inverse memristor to extend the operating frequency range of any memristor emulator circuit. Validation of the proposed emulator circuit, in both incremental and decremental modes, along with its application, is conducted using PSPICE-generated simulation results in the 0.18 µm TSMC CMOS technology. Additionally, an inverse memristor emulator configuration employing the IC LM13700 is presented, and its functionality is tested through a breadboard implementation.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"50 5-6","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139880128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Human activity recognition (HAR) by deep learning is a challenging and interesting topic. Although there are robust models, there is also a bunch of parameters and variables, which affect the performance such as the number of layers, pooling type. This study presents a new deep learning architecture that is obtained by fine-tuning of the conventional CNN-LSTM model, namely, CNN (+3)-LSTM. Three changes are made to the conventional model to increase the accuracy. Firstly, kernel size is set to 1×1 to extract more information. Secondly, three convolutional layers are added to the model. Lastly, average pooling is used instead of max-pooling. Performance analysis of the proposed model is conducted on the KTH dataset and implemented on Keras. In addition to the overall accuracy of the proposed model, the contribution of each change is observed individually. Results show that adding layers made the highest contribution followed by kernel size and pooling, respectively. The proposed model is compared with state-of-art and outperformed some of the recent studies with a 94.1% recognition rate.
{"title":"Human activity recognition with fine-tuned CNN-LSTM","authors":"Erdal Genc, M. E. Yıldırım, Y. B. Salman","doi":"10.2478/jee-2024-0002","DOIUrl":"https://doi.org/10.2478/jee-2024-0002","url":null,"abstract":"\u0000 Human activity recognition (HAR) by deep learning is a challenging and interesting topic. Although there are robust models, there is also a bunch of parameters and variables, which affect the performance such as the number of layers, pooling type. This study presents a new deep learning architecture that is obtained by fine-tuning of the conventional CNN-LSTM model, namely, CNN (+3)-LSTM. Three changes are made to the conventional model to increase the accuracy. Firstly, kernel size is set to 1×1 to extract more information. Secondly, three convolutional layers are added to the model. Lastly, average pooling is used instead of max-pooling. Performance analysis of the proposed model is conducted on the KTH dataset and implemented on Keras. In addition to the overall accuracy of the proposed model, the contribution of each change is observed individually. Results show that adding layers made the highest contribution followed by kernel size and pooling, respectively. The proposed model is compared with state-of-art and outperformed some of the recent studies with a 94.1% recognition rate.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"210 ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139828338","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. M. Giang, Le Ho Manh Thang, Le Dang Manh, Tran Thi Thu Huong
In this paper, a novel design method for quad-band Wilkinson power dividers is proposed. The design method is based on using a quad-band microstrip line. In comparison with other design methods, the proposed method has the advantages of simplicity and low insertion loss. To validate the proposed method, an equal quad-band power divider operating at four bands of 0.7, 1.2, 1.78, and 2.28 GHz was simulated and measured. Good agreement between measured results and simulated ones is obtained. The measured results show that the developed quad-band power divider features low insertion loss of less than 0.75 dB, isolation greater than 20.92 dB, and return loss better than 18 dB at four operating bands.
{"title":"A simple design of low-loss quad-band Wilkinson power dividers","authors":"N. M. Giang, Le Ho Manh Thang, Le Dang Manh, Tran Thi Thu Huong","doi":"10.2478/jee-2024-0009","DOIUrl":"https://doi.org/10.2478/jee-2024-0009","url":null,"abstract":"\u0000 In this paper, a novel design method for quad-band Wilkinson power dividers is proposed. The design method is based on using a quad-band microstrip line. In comparison with other design methods, the proposed method has the advantages of simplicity and low insertion loss. To validate the proposed method, an equal quad-band power divider operating at four bands of 0.7, 1.2, 1.78, and 2.28 GHz was simulated and measured. Good agreement between measured results and simulated ones is obtained. The measured results show that the developed quad-band power divider features low insertion loss of less than 0.75 dB, isolation greater than 20.92 dB, and return loss better than 18 dB at four operating bands.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"21 4","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139883928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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