IET Power Electronics最新文献

Accurate and computationally efficient models are critical for real-time applications and system-level simulations. Finite element method (FEM)-based models offer highly accurate physical representations but their complexity renders them unsuitable for real-time computations on inexpensive hardware. Projection-based model order reduction (MOR) techniques can alleviate this issue by simplifying FEM models while retaining much of their accuracy. However, their effectiveness varies significantly for nonlinear problems, and their intrusive nature presents challenges, particularly when commercial software is employed. This paper introduces a hybrid modelling approach that combines a reduced order model (ROM), derived from a readily available linear representation of the system, with corrections provided by an artificial neural network (ANN) trained on data easily collected from the non-linear representation. The proposed method is applied to develop a lightweight thermal model of a power converter, capable of accurately reconstructing temperature distributions while accounting for non-linear surface-to-surface and surface-to-ambient radiation effects.

High-performance applicationsextensively use permanent magnet synchronous motor (PMSM) drives because of their high torque density and efficiency. However, conventional PI controllers employed in the outer speed control loop of direct torque control with space vector modulation (DTC-SVM) are limited by parameter sensitivity, poor adaptability under dynamic conditions, and the need for extensive manual tuning. To overcome these challenges, a Twin Delayed Deep Deterministic Policy Gradient (TD3) agent is introduced, incorporating a customised reward function to ensure precise torque reference generation. The TD3 agent is trained in MATLAB/Simulink using random speed and load profiles and deployed on a TMS320F28379D digital signal processor. Real-Time validation is carried out using an OPAL-RT 4512 simulator under a hardware-in-the-loop (HIL) framework. The inner-loop DTC operates at 20 kHz for torque and flux control, while the TD3 agent regulates speed at 2 kHz. Experimental results on 4.5 kW and 7.5 kW PMSMs show a 50% reduction in settling time, elimination of overshoot, and stable current responses without requiring controller retuning. The proposed method demonstrates robust and adaptive performance, confirming its effectiveness for embedded motor drive applications.

Compared to conventional three-phase permanent magnet synchronous motors (PMSMs) in electric vehicle (EV) applications, five-phase PMSMs driven by five-phase inverters exhibit enhanced fault tolerance. However, these systems may operate under unbalanced load conditions due to cabling asymmetry, operational faults, or winding ageing, leading to unbalanced phase voltages and disordered power distribution. To address this issue, this work proposes a dual-loop controlled five-phase six-leg inverter system capable of operating under both balanced and unbalanced loads. Using instantaneous voltage analysis, phase voltage equilibrium conditions for unbalanced loads are derived, and the topology-enabled zero-sequence compensation capability of the six-leg inverter is analytically validated through an averaged switching model. Then, a dual-loop control method for variable load conditions based on the generalised Park transformation dual-loop control scheme is proposed. Meanwhile, the generalised Park transformation can be applied to n-phase inverter systems, transforming the natural coordinates to the dq-axis coordinates. Finally, hardware in the loop (HIL) experiments in the real-time digital simulator (RTDS) platform are implemented. The experimental results show that, compared to a dual-loop controlled five-phase five-leg inverter, the proposed five-phase six-leg inverter can achieve balanced phase voltages and the required power distributions for each phase under unbalanced load conditions.

Reliable power quality is crucial for electric vehicle charging stations (EVCS), but persistent voltage quality issues in distribution networks pose a significant challenge. This study proposes DVShave, a novel system integrating a dynamic voltage restorer (DVR) with peak-shaving functionality to significantly enhance EVCS resilience. Designed, modelled and tested in MATLAB/Simulink and validated through OPAL-RT real-time studies, DVShave features a DVR supplied by a 700 V energy storage system (ESS) and controlled by an artificial neural network (ANN) using a synchronous reference frame strategy. The system's performance was evaluated under severe symmetrical voltage dips (30%, 60% and 80%), swells, unsymmetrical faults and non-linear voltage conditions. DVShave effectively prevents charging interruptions and maintains stable charging rates during these grid disturbances, notably reducing supply voltage total harmonic distortion from 19.60% to 4.84%. The ANN-based controller demonstrated a small but notable improvement in harmonic distortion elimination compared to PI-based DVRs. Concurrently, its integrated peak-shaving feature leverages the DVR's ESS, using a rule-based control technique to lower the peak-to-average ratio from 1.9 to 1.49 daily over 4.5 h for a charging station with 50 EV chargers.

The nine-level switched capacitor multilevel inverter with common ground configuration presented in this work is meant specifically for grid-tied solar photovoltaic (SPV) applications. Normally the SPV panels produce low-level voltage. In order to raise its voltage, a conventionally high-boost DC-DC converter followed by an inverter is implemented. Thus, in conventional systems there are two stages, and hence more switches are needed, which increases the overall cost and reduces the efficiency of SPV systems. Keeping these drawbacks in view, this paper eliminates the conventional high-gain DC-DC converter with a novel single-source reduced-switch common-ground (CG) nine-level switched capacitor (SC) inverter, which has quadruple boosting capability. The proposed inverter has eleven switches, among which nine switches are driven at higher frequency while being clamped by low capacitor voltages, and the remaining two switches experience high stress of voltage, as these are clamped by high-voltage capacitors but are fortunately driven at fundamental frequency. This helps in reducing the switching losses. Moreover, the inverter suppresses leakage current by implementing a shared ground between its AC output and DC input. The level-shifted sine pulse width modulation method has been utilised as a control strategy for the proposed inverter. Further, the expected performance has been analysed by utilising MATLAB/Simulink simulations, and simulation results are confirmed through experimental prototype. The findings are presented by taking into account the fluctuations in load, modulation index, and output frequency. Furthermore, thermal modelling has also been done in PLECS software for analysing the efficiency and power loss of the inverter.

The progress of power electronics technologies is critically dependent upon three principal elements: the availability of high-performance power semiconductor switches, the implementation of advanced control methodologies, and the thorough validation of system reliability within demanding industrial settings. While these technical underpinnings are essential, the concurrent development of readily accessible experimental platforms is equally vital to effectively translate theoretical constructs into practical realizations. This study addresses these crucial aspects by implementing a user-centric and adaptable static synchronous compensator (STATCOM) based on the single-star bridge-cell modular multilevel cascade converter (SSBC-MMCC) topology. This device is a versatile modular testbed for power electronics research and a viable solution for industrial applications. This manuscript delineates a streamlined yet comprehensive methodology for realizing STATCOM devices employing the SSBC topology, a member of the MMCC family. The presented approach demonstrates the feasibility of controlling configurations featuring three cascaded cells per cluster utilizing a single, cost-effective microcontroller unit (MCU). Concurrently, a novel modular architecture, leveraging the same affordable MCU framework, extends this control capability to systems incorporating more cells. This paper provides comprehensive design guidelines encompassing all levels of implementation, ranging from sensing and data acquisition to hierarchical control algorithms, modulation strategies, and the generation of switching signals. Experimental verification utilizing a 10 kVA maximum power prototype substantiates the efficacy of the proposed solution, which combines operational simplicity with resilient performance attributes, thereby rendering it particularly valuable for academic inquiry and industrial deployment.

The occurrence of voltage variations caused by the input/output of large loads and/or transmission lines, as well as faults and high levels of photovoltaic-based distributed energy resource (DER) penetration, impairs power quality indicators at the power grid and causes financial losses for industrial consumers. In industrial electrical systems, knowing the short-circuit level (SCL) at the point of common coupling (PCC), the relationship between the SCL and the desired reactive power can be used to define the capability of an existing inverter-based DER for voltage compensation under conditions of SAG or SWELL. In this context, this article presents a proposal of ‘control strategy for voltage disturbance compensation and power factor correction with on-site short circuit level calculation’ (CS-VDCPFC-SCLC) using grid-following inverter. The main contribution is the identification of the situations in which an ordinary grid-following (GFL) photovoltaic (PV) Inverter can or cannot be used for voltage compensation at the PCC, avoiding the use of the PV system to provide reactive power in cases where voltage compensation will not be possible. If the voltage at the PCC cannot be compensated, the CS-VDCPFC-SCLC can inject or absorb the exact amount of reactive power demanded by the local load to adjust the power factor, hence, avoiding the use of capacitor banks, synchronous compensators, thyristor reactors and/or static compensators (STATCOM). In order to validate the proposed control technique with an advanced method for the design of power electronics components, a controller hardware-in-the-loop (C-HIL) setup is employed. Results are provided and demonstrate the effectiveness and feasibility of the proposed solution. A 3.0 kW laboratory prototype was also built and analysed.

Digitally controlled LCL-type inverter is widely applied in grid-connected renewable energy generation system, and its harmonics resonance damping performance is critical to the stable operation and output power quality of system. Considering the low power loss and simple structure, an equivalent impedance model of digitally controlled LCL-type inverter with a widely deployed capacitor-current active damping feedback structure is built first. Then, according to the obtained model, the effects of digital time delay of control system and equivalent grid impedance on active damping performance of inverter, including effective damping region and harmonics resonance characteristics mainly, are investigated in detail. In order to improve the damping performance of digitally controlled LCL-type inverter under the action of digital time delay and grid impedance, a wide-band harmonic resonance damping strategy is proposed based on capacitor-voltage active damping structure finally. A prototype grid-connected digitally controlled LCL-type inverter system is built to verify the correctness of theoretical analysis results and effectiveness of proposed active damping strategy.

This article proposes a power electronics converter capable of providing high voltage gain while keeping a high-quality input current ripple operating with low duty cycle. The technique for achieving the zero input current ripple at a selected duty cycle consists of extracting two inductor currents from the source in a counter-phase manner. The technique is similar to those employed in interleaved converters, maintaining the high voltage gain. The quadratic-type voltage gain makes the proposed converter suitable for low-voltage renewable energy sources, such as PV panel generation. Another important topology feature is the common reference to the output voltage; that is, the load and source share the negative terminals. The high voltage gain is achieved by cascading two particular power cells. On the input side, a modified buck-boost converter is connected, while the second stage consists of an H-bridge based on the Watkin–Johnson topology. The H-bridge configuration consists of two capacitors, one inductor, and a pair of transistors and diodes to control the voltage gain, which provides polarity selection flexibility. This paper includes the mathematical development in continuous conduction mode operation, providing design guidelines. Besides, two commutation techniques are proposed to obtain direct or inverse polarity. The modeling is validated via simulation, and an experimental lab-scale corroborates its performance. The validation includes open-loop performance, demonstrating low input current ripple, and a closed-loop configuration that confirms proper output voltage regulation.

A method to control the inrush current of inductorless converters based on piezoelectric transformers (PTs) with high input capacitance is presented. With no magnetic core, inductorless PT based converters are of particular interest in medical equipment intended for use in the vicinity of high magnetic fields. The proposed method involves applying a reduced gate voltage to the converter MOSFETs during start-up to increase their on-resistance and decrease dv/dt at the switching point. A higher gate voltage is applied once steady state PT conditions are established to provide efficient operation. The design of the proposed gate drive solution and detailed LTSpice simulation results are described for a 3.6 W, 20 V DC/810 Vpk AC inverter. Due to the lack of commercial PTs with characteristics suitable for ZVS, the design of an emulated PT circuit is described to enable validation by testing. Experimental results successfully validate simulation results for the proposed start-up circuit.