Switching devices, the most vulnerable component within converters, underscores the critical need to enhance their reliability and prolong the power converter's lifetime. This paper proposes a multi-state reliability model for insulated gate bipolar transistors (IGBTs) that departs from conventional two-stage models with constant failure rate. Moreover, it quantifies the effect of DC-link voltage on IGBT reliability for switching frequencies below 5 kHz and derives an operating voltage ratio envelope of about 60% of the rated voltage. Operating within this band maximises lifetime and reduces maintenance cost, providing a practical voltage reference for control strategies. Finally, Monte Carlo simulations across multiple cases verify the feasibility and robustness of the proposed model and comparative hardware experiments support the underlying thermal assumptions of the proposed model.
{"title":"Power Converter's IGBT Multi-State Reliability Analysis for Low Failure Rate Operation","authors":"Qiaohan Su, Zhen Zhu, Danxian Ye, Man Chung Wong","doi":"10.1049/pel2.70195","DOIUrl":"https://doi.org/10.1049/pel2.70195","url":null,"abstract":"<p>Switching devices, the most vulnerable component within converters, underscores the critical need to enhance their reliability and prolong the power converter's lifetime. This paper proposes a multi-state reliability model for insulated gate bipolar transistors (IGBTs) that departs from conventional two-stage models with constant failure rate. Moreover, it quantifies the effect of DC-link voltage on IGBT reliability for switching frequencies below 5 kHz and derives an operating voltage ratio envelope of about 60% of the rated voltage. Operating within this band maximises lifetime and reduces maintenance cost, providing a practical voltage reference for control strategies. Finally, Monte Carlo simulations across multiple cases verify the feasibility and robustness of the proposed model and comparative hardware experiments support the underlying thermal assumptions of the proposed model.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"19 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2026-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70195","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146129957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The parasitic inductances of power loops in Silicon Carbide (SiC) power modules are critical parameters affecting dynamic current sharing, and their model can provide theoretical guidance for the design of dynamic current balancing. However, the coupled parasitic inductance matrix (CPIM) involved in the traditional model contains self-inductances and complex coupled mutual inductances, which hinder direct quantitative evaluation of the parasitic inductance differences in the power loops of paralleled chips. Based on the circuit equivalence principle, this paper proposes a decoupling calculation method for the CPIM, which realises the solution and modelling of equivalent parasitic inductances (EPIs) by matrix diagonalisation. Combined with the switching states of chips, the current distribution characteristics in dynamic current sharing are clarified. Then, according to the concepts of partial self- and mutual inductance, the coupled parasitic inductance network model (CPINM) is developed. Based on the identical V–I characteristics of model circuits before and after decoupling, the CPIM is diagonalised to calculate the EPIs. Finally, the EPI models for actual 4-chip and 6-chip paralleled power modules are developed, and the accuracy of the models is verified by theoretical and experimental analysis.
{"title":"Diagonalisation of Coupled Parasitic Inductance Matrix and Equivalent Modelling for SiC Power Modules During Dynamic Current Sharing","authors":"Xiaofeng Yang, Xuebao Li, Yongfan Zhan, Li Zhang, Rui Jin, Peng Sun, Xinling Tang, Zhibin Zhao","doi":"10.1049/pel2.70194","DOIUrl":"https://doi.org/10.1049/pel2.70194","url":null,"abstract":"<p>The parasitic inductances of power loops in Silicon Carbide (SiC) power modules are critical parameters affecting dynamic current sharing, and their model can provide theoretical guidance for the design of dynamic current balancing. However, the coupled parasitic inductance matrix (CPIM) involved in the traditional model contains self-inductances and complex coupled mutual inductances, which hinder direct quantitative evaluation of the parasitic inductance differences in the power loops of paralleled chips. Based on the circuit equivalence principle, this paper proposes a decoupling calculation method for the CPIM, which realises the solution and modelling of equivalent parasitic inductances (EPIs) by matrix diagonalisation. Combined with the switching states of chips, the current distribution characteristics in dynamic current sharing are clarified. Then, according to the concepts of partial self- and mutual inductance, the coupled parasitic inductance network model (CPINM) is developed. Based on the identical <i>V</i>–<i>I</i> characteristics of model circuits before and after decoupling, the CPIM is diagonalised to calculate the EPIs. Finally, the EPI models for actual 4-chip and 6-chip paralleled power modules are developed, and the accuracy of the models is verified by theoretical and experimental analysis.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"19 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2026-02-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70194","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146136105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The virtual synchronous generator (VSG), as a representative grid-forming control method, has become a key technology in distributed renewable energy systems. However, there exists an inherent trade-off between fast power reference tracking and high virtual inertia support in conventional VSG control. To solve it, this paper proposes a novel coordinated control strategy, whose first step is a power reference splitting and feedforward module. The key idea is to split the power reference into high-frequency and low-frequency components, where the high-frequency component can be fed forward to the current loop reference of the VSG control, thereby improving the dynamic response. Meanwhile, the low-frequency component serves as the mechanical power to the VSG swing equation, ensuring adequate virtual inertia support without compromising the power tracking speed. However, the direct injection of the high-frequency component into the point of common coupling causes a disturbance to the electromagnetic power of the VSG. To mitigate this disturbance, a high-frequency power compensation module is further proposed. The entire coordinated control strategy, comprising the above two control modules, is seamlessly compatible with conventional VSG control circuits, enabling a fast power reference response in grid-connected mode without accurate line impedance knowledge while ensuring sufficient inertia support in standalone or weak grid conditions. Finally, simulation and experimental results validate the effectiveness of the proposed control strategy.
{"title":"A Novel Coordinated Control Strategy for VSG to Enhance Power Tracking Speed Without Degrading Inertia Support Capability","authors":"Yubin Pang, Xiaohui Qu, Guanglei Yan, Zhicong Huang","doi":"10.1049/pel2.70193","DOIUrl":"https://doi.org/10.1049/pel2.70193","url":null,"abstract":"<p>The virtual synchronous generator (VSG), as a representative grid-forming control method, has become a key technology in distributed renewable energy systems. However, there exists an inherent trade-off between fast power reference tracking and high virtual inertia support in conventional VSG control. To solve it, this paper proposes a novel coordinated control strategy, whose first step is a power reference splitting and feedforward module. The key idea is to split the power reference into high-frequency and low-frequency components, where the high-frequency component can be fed forward to the current loop reference of the VSG control, thereby improving the dynamic response. Meanwhile, the low-frequency component serves as the mechanical power to the VSG swing equation, ensuring adequate virtual inertia support without compromising the power tracking speed. However, the direct injection of the high-frequency component into the point of common coupling causes a disturbance to the electromagnetic power of the VSG. To mitigate this disturbance, a high-frequency power compensation module is further proposed. The entire coordinated control strategy, comprising the above two control modules, is seamlessly compatible with conventional VSG control circuits, enabling a fast power reference response in grid-connected mode without accurate line impedance knowledge while ensuring sufficient inertia support in standalone or weak grid conditions. Finally, simulation and experimental results validate the effectiveness of the proposed control strategy.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"19 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2026-02-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70193","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146129997","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper presents an optimization-free PWM control method for a single-phase 9-level flying-capacitor (FC) multicell active neutral-point-clamped (A-NPC) inverter. The controller measures the output current and the FC voltages and compares them to their references, then converts the comparison results into logic variables. These variables drive a set of logic equations that simultaneously (i) regulate each FC voltage to its target value and (ii) select the appropriate switching state to synthesize the requested multilevel output through PWM. Because the gating decisions are produced by direct logical evaluation—without cost functions, iterative search, or computationally heavy optimization—the method is fast and simple to implement. Experimental results verify reliable voltage balancing and proper operation during abrupt changes in DC-link voltage, modulation index, and output frequency.
{"title":"Active Voltage Balancing Control of 9-Level Multicell-Based A-NPC Inverters","authors":"Kasra Amirsoleymani, Vahid Dargahi","doi":"10.1049/pel2.70188","DOIUrl":"https://doi.org/10.1049/pel2.70188","url":null,"abstract":"<p>This paper presents an optimization-free PWM control method for a single-phase 9-level flying-capacitor (FC) multicell active neutral-point-clamped (A-NPC) inverter. The controller measures the output current and the FC voltages and compares them to their references, then converts the comparison results into logic variables. These variables drive a set of logic equations that simultaneously (i) regulate each FC voltage to its target value and (ii) select the appropriate switching state to synthesize the requested multilevel output through PWM. Because the gating decisions are produced by direct logical evaluation—without cost functions, iterative search, or computationally heavy optimization—the method is fast and simple to implement. Experimental results verify reliable voltage balancing and proper operation during abrupt changes in DC-link voltage, modulation index, and output frequency.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"19 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2026-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70188","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146135863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jingxuan He, Lijuan Zhang, Feifei Bu, Yajun Zhao, Shiliang Miao, Jiangong Yang, Haihong Qin, Panru Yang
High-frequency switching operations of power switching tubes generate high-frequency voltage and current pulse signals, resulting in substantial electromagnetic interference. As servo drive systems continue to evolve toward higher power density, integration and miniaturization, their internal electromagnetic environment grows increasingly complex, further intensifying interference levels and imposing higher demands on system electromagnetic compatibility (EMC) design. To address this challenge, this paper proposes a modelling method based on multi-software co-simulation to precisely model radiated interference in permanent magnet servo drive systems. Through an in-depth analysis of interference sources and their main propagation paths within the servo drive system, high-frequency impedance models were established for key components including cables, bus capacitance, MOSFETs and permanent magnet motors. Combined with a field-circuit-control co-simulation strategy, this approach enables prediction of radiated interference. To validate the reliability of the model, a measurement scheme under typical operating conditions was designed. Radiated interference data from the actual system was obtained and compared with simulation results. The findings demonstrate that the established model is highly accurate and provides a reliable pre-evaluation tool for subsequent system-level EMC design and optimization.
{"title":"Establishment and Analysis of Radiation Interference Prediction Model for Permanent Magnet Servo Drive System","authors":"Jingxuan He, Lijuan Zhang, Feifei Bu, Yajun Zhao, Shiliang Miao, Jiangong Yang, Haihong Qin, Panru Yang","doi":"10.1049/pel2.70174","DOIUrl":"https://doi.org/10.1049/pel2.70174","url":null,"abstract":"<p>High-frequency switching operations of power switching tubes generate high-frequency voltage and current pulse signals, resulting in substantial electromagnetic interference. As servo drive systems continue to evolve toward higher power density, integration and miniaturization, their internal electromagnetic environment grows increasingly complex, further intensifying interference levels and imposing higher demands on system electromagnetic compatibility (EMC) design. To address this challenge, this paper proposes a modelling method based on multi-software co-simulation to precisely model radiated interference in permanent magnet servo drive systems. Through an in-depth analysis of interference sources and their main propagation paths within the servo drive system, high-frequency impedance models were established for key components including cables, bus capacitance, MOSFETs and permanent magnet motors. Combined with a field-circuit-control co-simulation strategy, this approach enables prediction of radiated interference. To validate the reliability of the model, a measurement scheme under typical operating conditions was designed. Radiated interference data from the actual system was obtained and compared with simulation results. The findings demonstrate that the established model is highly accurate and provides a reliable pre-evaluation tool for subsequent system-level EMC design and optimization.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"19 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2026-01-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70174","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146130140","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Brushless DC (BLDC) are common in electric cars, industrial automation, and robotics because of their high efficiency, high torque control, and compact size. Nevertheless, strong speed and current regulation is not easily attained because of system variation, load variations and the shortcomings of traditional fixed-gain proportional-integral (PI) controllers. In this paper, a new snake optimization-assisted deep transfer learning-based reinforcement learning (SOA-DTL-RL)-based adaptive cascade PI controller is proposed that combines transfer learning with fast adaptation, Reinforcement learning with real-time optimization, and snake optimization with optimal initial gain selection to guarantee the robust speed and current regulation in BLDC motors. The proposed approach combines transfer learning (TL) to use already trained control knowledge, but the reinforcement learning (RL) is used to dynamically optimize PI parameters to real-time system changes. The use of TL with RL allows the controller to have both the advantage of adapting quickly to new information by using previous knowledge and the advantage of learning in real-time to ensure there is no need to retrain a lot of the controller and makes it more robust in changing environments. One of the most important drawbacks of TL-based controllers is that they rely on clear initial gains and therefore may converge slowly or be unstable. To resolve this, snake optimization algorithm (SOA) is used to set the PI gains optimally in advance, so as to have a well-optimized initial point of real-time adaptation. Moreover, use of a deep neural network (DNN) in the TL-RL model improves generalization, enabling the controller to effectively learn complicated state-action relationships. The proposed cascade SOA-DTL-RL controller will guarantee the fast transient response, enhanced disturbance rejection, and high tracking accuracy under different operating conditions. The efficacy of the framework is proven by hardware-in-the-loop (HIL) real-time testing on the Typhoon HIL 606 platform, which showed great improvements in performance with respect to response time, robustness, and energy efficiency when compared to traditional PI controllers. An HIL experimental setup is used to validate that the proposed controller can be applied in real-time with minimal computational overhead, with robust speed and current regulation of BLDC motors in industrial and automotive applications.
{"title":"A Novel Deep Transfer Learning-based Adaptive Cascade PI Controller Enhanced by Reinforcement Learning Algorithm and Snake Optimization for Robust Speed Regulation of Brushless DC Motors","authors":"SeyyedMorteza Ghamari, Asma Aziz","doi":"10.1049/pel2.70157","DOIUrl":"https://doi.org/10.1049/pel2.70157","url":null,"abstract":"<p>Brushless DC (BLDC) are common in electric cars, industrial automation, and robotics because of their high efficiency, high torque control, and compact size. Nevertheless, strong speed and current regulation is not easily attained because of system variation, load variations and the shortcomings of traditional fixed-gain proportional-integral (PI) controllers. In this paper, a new snake optimization-assisted deep transfer learning-based reinforcement learning (SOA-DTL-RL)-based adaptive cascade PI controller is proposed that combines transfer learning with fast adaptation, Reinforcement learning with real-time optimization, and snake optimization with optimal initial gain selection to guarantee the robust speed and current regulation in BLDC motors. The proposed approach combines transfer learning (TL) to use already trained control knowledge, but the reinforcement learning (RL) is used to dynamically optimize PI parameters to real-time system changes. The use of TL with RL allows the controller to have both the advantage of adapting quickly to new information by using previous knowledge and the advantage of learning in real-time to ensure there is no need to retrain a lot of the controller and makes it more robust in changing environments. One of the most important drawbacks of TL-based controllers is that they rely on clear initial gains and therefore may converge slowly or be unstable. To resolve this, snake optimization algorithm (SOA) is used to set the PI gains optimally in advance, so as to have a well-optimized initial point of real-time adaptation. Moreover, use of a deep neural network (DNN) in the TL-RL model improves generalization, enabling the controller to effectively learn complicated state-action relationships. The proposed cascade SOA-DTL-RL controller will guarantee the fast transient response, enhanced disturbance rejection, and high tracking accuracy under different operating conditions. The efficacy of the framework is proven by hardware-in-the-loop (HIL) real-time testing on the Typhoon HIL 606 platform, which showed great improvements in performance with respect to response time, robustness, and energy efficiency when compared to traditional PI controllers. An HIL experimental setup is used to validate that the proposed controller can be applied in real-time with minimal computational overhead, with robust speed and current regulation of BLDC motors in industrial and automotive applications.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"19 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2026-01-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70157","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146136784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Chengjia Bao, Xingye Wang, Yonggang Li, Tianyi Zhang, Jianwen Li
Distributed generation (DG) aggregation points are typically equipped with reactive compensation devices to maintain voltage stability. However, improper parameter design may cause harmonic oscillations due to interactions between the device and inverter impedance. This paper investigates the impedance interaction between the inverter and reactive power compensation device, with the goal of enhancing system damping. A parameter design method for static var compensators (SVCs) is proposed to balance power quality requirements with harmonic oscillation suppression. First, a port impedance model of the inverter and SVC is established to analyse the interaction mechanism. The system's characteristic roots are obtained using modal analysis. Based on these results, system damping is calculated to quantify the impact of SVC integration on stability. Furthermore, for multi-inverter grid-connected systems, an SVC parameter optimisation procedure based on particle swarm optimisation (PSO) is developed. This approach considers reactive power capacity requirements and adopts improved system damping as a design objective to achieve a balanced provision of reactive power support and resonance suppression. The effectiveness of parallel SVCs in suppressing multimodal resonance peaks and improving system damping is validated through both qualitative and quantitative analysis. Simulation and experimental results confirm that the proposed method achieves both power quality optimisation and harmonic oscillation suppression.
{"title":"A Parameter Design Method for SVC Considering the Impedance Interaction Between Inverters and Reactive Compensation Devices","authors":"Chengjia Bao, Xingye Wang, Yonggang Li, Tianyi Zhang, Jianwen Li","doi":"10.1049/pel2.70191","DOIUrl":"https://doi.org/10.1049/pel2.70191","url":null,"abstract":"<p>Distributed generation (DG) aggregation points are typically equipped with reactive compensation devices to maintain voltage stability. However, improper parameter design may cause harmonic oscillations due to interactions between the device and inverter impedance. This paper investigates the impedance interaction between the inverter and reactive power compensation device, with the goal of enhancing system damping. A parameter design method for static var compensators (SVCs) is proposed to balance power quality requirements with harmonic oscillation suppression. First, a port impedance model of the inverter and SVC is established to analyse the interaction mechanism. The system's characteristic roots are obtained using modal analysis. Based on these results, system damping is calculated to quantify the impact of SVC integration on stability. Furthermore, for multi-inverter grid-connected systems, an SVC parameter optimisation procedure based on particle swarm optimisation (PSO) is developed. This approach considers reactive power capacity requirements and adopts improved system damping as a design objective to achieve a balanced provision of reactive power support and resonance suppression. The effectiveness of parallel SVCs in suppressing multimodal resonance peaks and improving system damping is validated through both qualitative and quantitative analysis. Simulation and experimental results confirm that the proposed method achieves both power quality optimisation and harmonic oscillation suppression.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"19 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2026-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70191","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146136726","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shuoyu Ye, Jingyang Hu, Jianghua Zhuo, Haoze Luo, Chushan Li, Wuhua Li, Xiangning He
An accurate simulation model can guide applications such as loss estimation and key parameter evaluation for power devices. Existing SPICE-compatible models suffer from compromised accuracy-efficiency trade-offs, inadequate characterization of temperature effects, and convergence limitations. To address the limitations of conventional behavioural models, which often require numerous parameters and exhibit poor extrapolation capability, this paper proposes a novel behavioural model utilizing a tanh(x)-based channel current expression. This formulation not only inherently ensures smoothness and continuous differentiability, mitigating convergence issues, but also significantly reduces the number of core characterization parameters to just five. A stepwise parameter extraction method is given via Levenberg–Marquardt optimization to effectively prevent overfitting-induced spurious points in the output characteristics during multiparameter fitting. Recognizing the critical impact of temperature on SiC MOSFET performance, temperature effects are embedded through second-order polynomial fittings across the full operational range. In the meantime, temperature effects on critical parameters during switching transients are considered through theoretical analysis. Experimental validation via double-pulse tests across a wide temperature range confirms the model's high fidelity, with static characteristics deviation below 3%, switching loss error within 8%, and transient oscillation discrepancy under 2%, demonstrating its value for precise simulation in SiC-based converter design.
{"title":"A Monolithic SiC MOSFET Behavioural Model with Full-Temperature-Range Capability: SPICE-Compatible Structure and Experimental Verification","authors":"Shuoyu Ye, Jingyang Hu, Jianghua Zhuo, Haoze Luo, Chushan Li, Wuhua Li, Xiangning He","doi":"10.1049/pel2.70183","DOIUrl":"https://doi.org/10.1049/pel2.70183","url":null,"abstract":"<p>An accurate simulation model can guide applications such as loss estimation and key parameter evaluation for power devices. Existing SPICE-compatible models suffer from compromised accuracy-efficiency trade-offs, inadequate characterization of temperature effects, and convergence limitations. To address the limitations of conventional behavioural models, which often require numerous parameters and exhibit poor extrapolation capability, this paper proposes a novel behavioural model utilizing a tanh(x)-based channel current expression. This formulation not only inherently ensures smoothness and continuous differentiability, mitigating convergence issues, but also significantly reduces the number of core characterization parameters to just five. A stepwise parameter extraction method is given via Levenberg–Marquardt optimization to effectively prevent overfitting-induced spurious points in the output characteristics during multiparameter fitting. Recognizing the critical impact of temperature on SiC MOSFET performance, temperature effects are embedded through second-order polynomial fittings across the full operational range. In the meantime, temperature effects on critical parameters during switching transients are considered through theoretical analysis. Experimental validation via double-pulse tests across a wide temperature range confirms the model's high fidelity, with static characteristics deviation below 3%, switching loss error within 8%, and transient oscillation discrepancy under 2%, demonstrating its value for precise simulation in SiC-based converter design.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"19 1","pages":""},"PeriodicalIF":1.9,"publicationDate":"2026-01-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.70183","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146136433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Tomas Reiter, Julius Schapdick, Michael Krug, Mark Muenzer, Frank Wolter
This article features a comprehensive methodology for analyzing and optimizing PWM dead time in automotive traction inverters, applicable to a wide range of power devices, including Si IGBT/Diodes, SiC MOSFETs, and Si/SiC Fusion switches. The proposed methodology enables a systematic comparison of dead time characteristics, focusing on part-to-part tolerances and operating point-dependent influence factors. Three traction inverter systems, each in the 200–300 kW class at 470 V, were built up utilizing Si IGBT/Diode, SiC MOSFET, and Si/SiC Fusion switches from the latest automotive-released technology. The impact of PWM dead times on power losses was experimentally investigated for all three inverter systems, supporting the analytical model. Key findings from the experimental data include: (1) PWM dead times can account for more than 10% of the total inverter power losses in high current density SiC MOSFET inverter designs operating at typical automotive switching frequencies of 10 kHz; (2) Optimizing PWM dead times in Si/SiC Fusion power modules leads to up to a 5% reduction in total inverter power losses and improved current sharing, resulting in lower thermal stress—This was evaluated using thermal infrared measurements from the Si/SiC Fusion inverter prototype; 3) Optimized PWM dead times can reduce total harmonic distortion at light load conditions by up to 2%–3% for IGBT/Diode and up to 4%–5% for SiC MOSFET and Si/SiC Fusion inverter systems; (4) A sensitivity study in addition revealed that Si/SiC Fusion switches exhibit the most stable dead time settings under parameter variations. The benefit of optimized versus conventional 2