Pub Date : 2019-04-01DOI: 10.1109/IranianCEE.2019.8786389
Pegah Rahmatian, E. Moradi, M. Movahhedi
Ultra wideband (UWB) wearable antennas with band notch property is favorable in high data rate, low power utilization and short range wireless communications without interfering on some systems. This paper proposes a planar full ground plane UWB antenna with ability to reject C band (6.3-7.15 GHz) using split ring slots. Unlike most of the planar UWB antennas that use partial ground plane to achieve wide bandwidth operation, the presence of the full ground plane makes the proposed UWB antenna appropriate for wearing applications by decreasing specific absorption rate (SAR) value. In addition, adding the split ring slots to the structure leads to the creation of a notch band and increase the antenna operating band.
{"title":"Single Notch Band UWB Off-Body Wearable Antenna with Full Ground Plane","authors":"Pegah Rahmatian, E. Moradi, M. Movahhedi","doi":"10.1109/IranianCEE.2019.8786389","DOIUrl":"https://doi.org/10.1109/IranianCEE.2019.8786389","url":null,"abstract":"Ultra wideband (UWB) wearable antennas with band notch property is favorable in high data rate, low power utilization and short range wireless communications without interfering on some systems. This paper proposes a planar full ground plane UWB antenna with ability to reject C band (6.3-7.15 GHz) using split ring slots. Unlike most of the planar UWB antennas that use partial ground plane to achieve wide bandwidth operation, the presence of the full ground plane makes the proposed UWB antenna appropriate for wearing applications by decreasing specific absorption rate (SAR) value. In addition, adding the split ring slots to the structure leads to the creation of a notch band and increase the antenna operating band.","PeriodicalId":6683,"journal":{"name":"2019 27th Iranian Conference on Electrical Engineering (ICEE)","volume":"129 1","pages":"1228-1232"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76156213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.1109/IranianCEE.2019.8786483
Afsaneh Raeesi Goojani, Mohammad Taherzadeh Sani
$A$ digital background calibration technique was proposed to estimate and correct the mismatch error related to the elements of a multi-bit binary DAC applied in a continuous time delta sigma modulator (CTDSM). Due to the large mismatch error in binary-weighted DACs, the use of these in delta-sigma modulators rarely happens. In order to make it possible to use of binary DAC a digital technique is presented. This study aimed to find the error associated with each binary DAC element using the correlation technique between a random signal and a modulator output. Results of simulation on a third-order six-bit delta sigma demonstrated that this method can estimate the error value of each element with high precision and raise the modulator accuracy up to an ideal value, independent of the OSR value. Compared to a six-bit unary DAC calibrated in the same way in which the coefficient of error of 26–1 elements should be calculated, this number was reduced to 6 coefficients in a binary DAC and thus, the time and circuit necessary for calibration significantly decreased.
{"title":"Digital Background Calibration for Binary DACs in Continuous Time Delta Sigma Modulators","authors":"Afsaneh Raeesi Goojani, Mohammad Taherzadeh Sani","doi":"10.1109/IranianCEE.2019.8786483","DOIUrl":"https://doi.org/10.1109/IranianCEE.2019.8786483","url":null,"abstract":"$A$ digital background calibration technique was proposed to estimate and correct the mismatch error related to the elements of a multi-bit binary DAC applied in a continuous time delta sigma modulator (CTDSM). Due to the large mismatch error in binary-weighted DACs, the use of these in delta-sigma modulators rarely happens. In order to make it possible to use of binary DAC a digital technique is presented. This study aimed to find the error associated with each binary DAC element using the correlation technique between a random signal and a modulator output. Results of simulation on a third-order six-bit delta sigma demonstrated that this method can estimate the error value of each element with high precision and raise the modulator accuracy up to an ideal value, independent of the OSR value. Compared to a six-bit unary DAC calibrated in the same way in which the coefficient of error of 26–1 elements should be calculated, this number was reduced to 6 coefficients in a binary DAC and thus, the time and circuit necessary for calibration significantly decreased.","PeriodicalId":6683,"journal":{"name":"2019 27th Iranian Conference on Electrical Engineering (ICEE)","volume":"15 1","pages":"388-392"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75138019","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.1109/IranianCEE.2019.8786451
R. Ghasemi, A. Ahmadi, Hossein Ghasemian, M. Salehi, E. Abiri
In this paper, a novel high speed dynamic comparator is presented, which its delay time is decreased compared to conventional dynamic comparators. In the suggested comparator, a complementary differential pair is utilized. As a result, the delay time is reduced and the offset voltage is improved. Furthermore, the delay and power consumption has less sensitivity to the variations of the input common mode voltage level. In the reset phase, an NMOS switch is utilized between the differential outputs nodes to reduce the delay time. The equations related to the delay time and input referred offset voltage of the proposed structure are derived and the effective parameters to reduce them are identified. The post-layout simulation results in 65nm CMOS technology demonstrate that the clock frequency of the proposed dynamic comparator can be 6GHz while the delay time is 30ps. The power consumption is 573µW when the proposed comparator is supplied with 1.2V. Also, the occupied area is 86.1 µm2 (10.63µm*8.1µm).
{"title":"A novel 6GHz/ 573µwatt/ 30ps Dynamic Comparator with complementary differential input in 65nm CMOS Technology","authors":"R. Ghasemi, A. Ahmadi, Hossein Ghasemian, M. Salehi, E. Abiri","doi":"10.1109/IranianCEE.2019.8786451","DOIUrl":"https://doi.org/10.1109/IranianCEE.2019.8786451","url":null,"abstract":"In this paper, a novel high speed dynamic comparator is presented, which its delay time is decreased compared to conventional dynamic comparators. In the suggested comparator, a complementary differential pair is utilized. As a result, the delay time is reduced and the offset voltage is improved. Furthermore, the delay and power consumption has less sensitivity to the variations of the input common mode voltage level. In the reset phase, an NMOS switch is utilized between the differential outputs nodes to reduce the delay time. The equations related to the delay time and input referred offset voltage of the proposed structure are derived and the effective parameters to reduce them are identified. The post-layout simulation results in 65nm CMOS technology demonstrate that the clock frequency of the proposed dynamic comparator can be 6GHz while the delay time is 30ps. The power consumption is 573µW when the proposed comparator is supplied with 1.2V. Also, the occupied area is 86.1 µm2 (10.63µm*8.1µm).","PeriodicalId":6683,"journal":{"name":"2019 27th Iranian Conference on Electrical Engineering (ICEE)","volume":"65 1","pages":"236-242"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77636250","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.1109/IranianCEE.2019.8786659
S. Baniardalani
A basic requirement in modeling of hybrid systems is deployment of a uniform framework, such as petri net, in such a way that the model can represent both continuous and discrete dynamics. This paper deals with modeling the continuous part of a hybrid system by a special Petri net called Continuous Time-Delay Petri Net (CTDPN). According to the theorem presented in this paper, an exact correspondence between discrete- time state space equations and fundamental equations of the CTDPN can be established. Based on this theorem, a systematic method is presented for realization of a continuous system represented by a discrete-time state space model. By integrating the concept of state space models and Petri Nets in this paper, new and effective methods can be proposed for analyzing and modeling of hybrid systems. Finally, the performance of the proposed method is investigated for a DC motor.
{"title":"Modeling of Discrete-Time Systems Using Petri Nets","authors":"S. Baniardalani","doi":"10.1109/IranianCEE.2019.8786659","DOIUrl":"https://doi.org/10.1109/IranianCEE.2019.8786659","url":null,"abstract":"A basic requirement in modeling of hybrid systems is deployment of a uniform framework, such as petri net, in such a way that the model can represent both continuous and discrete dynamics. This paper deals with modeling the continuous part of a hybrid system by a special Petri net called Continuous Time-Delay Petri Net (CTDPN). According to the theorem presented in this paper, an exact correspondence between discrete- time state space equations and fundamental equations of the CTDPN can be established. Based on this theorem, a systematic method is presented for realization of a continuous system represented by a discrete-time state space model. By integrating the concept of state space models and Petri Nets in this paper, new and effective methods can be proposed for analyzing and modeling of hybrid systems. Finally, the performance of the proposed method is investigated for a DC motor.","PeriodicalId":6683,"journal":{"name":"2019 27th Iranian Conference on Electrical Engineering (ICEE)","volume":"93 1","pages":"1188-1192"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79438076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.1109/IranianCEE.2019.8786592
A. Mahmoudi, R. A. Moghadam, Hooman Misaghi, I. Rafati
Passive dynamic walking is the simplest and the most efficient form of biped locomotion. Albeit the simplicity, the walking gait of passive dynamic walkers resembles human walking in slops very well. The most important drawbacks of these robots is their sensitivity on initial conditions and the limited range of slopes they can have a stable walking cycle on. The aim of this work is to alleviate these problems by adding a link that resembles a torso and controlling it using a Neuroevolutionary algorithm. To achieve this goal, initially the dynamical equations governing this robot was extracted. Then the control algorithm is applied. The reason to use this control strategy is to mimic how natural evolution could play a role in robust biped walking. It was observed that this strategy improved both shortcomings associated with passive dynamic walkers and interestingly the robot shows torso movements familiar to that of humans when facing steep slopes or zero slope.
{"title":"Passive Dynamic Walking with Neuroevolutionary Controlled Torso","authors":"A. Mahmoudi, R. A. Moghadam, Hooman Misaghi, I. Rafati","doi":"10.1109/IranianCEE.2019.8786592","DOIUrl":"https://doi.org/10.1109/IranianCEE.2019.8786592","url":null,"abstract":"Passive dynamic walking is the simplest and the most efficient form of biped locomotion. Albeit the simplicity, the walking gait of passive dynamic walkers resembles human walking in slops very well. The most important drawbacks of these robots is their sensitivity on initial conditions and the limited range of slopes they can have a stable walking cycle on. The aim of this work is to alleviate these problems by adding a link that resembles a torso and controlling it using a Neuroevolutionary algorithm. To achieve this goal, initially the dynamical equations governing this robot was extracted. Then the control algorithm is applied. The reason to use this control strategy is to mimic how natural evolution could play a role in robust biped walking. It was observed that this strategy improved both shortcomings associated with passive dynamic walkers and interestingly the robot shows torso movements familiar to that of humans when facing steep slopes or zero slope.","PeriodicalId":6683,"journal":{"name":"2019 27th Iranian Conference on Electrical Engineering (ICEE)","volume":"24 1","pages":"997-1001"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85064037","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.1109/IranianCEE.2019.8786461
M. Joozdani, Mohammad Khalai Amirhosseini
In this paper out-of-band radar cross section (RCS) reduction of conformal patch antenna without affecting the antenna characteristics is investigated by mantle cloaking. First, a conformal microstrip antenna with inset feed is considered on dielectric substrate with ε r = 10 grounded by a perfect electric conductor (PEC) cylinder. The working frequency and bandwidth of the patch antenna are 5 GHz and 80 MHz, respectively. Then, a patch frequency selective surface (FSS) is placed on top of the substrate layer except the regions covered by the patch and feed line of the antenna. The FSS, substrate and ground make a mantle cloak decreasing the monostatic and bistatic RCS of the antenna structure from 8.5 GHz to 10.5 GHz. The propagation characteristics of the new antenna are compared with the first one and it is shown that mantle cloaking has negligible effect on impedance bandwidth, gain and pattern of the antenna.
本文研究了在不影响天线特性的情况下，利用地幔隐身技术降低共形贴片天线的带外雷达截面。首先，在ε r = 10的介质基片上设计了一种插入馈电的共形微带天线。贴片天线的工作频率为5ghz，带宽为80mhz。然后，除了天线的贴片和馈线覆盖的区域外，在基板层的顶部放置贴片频率选择表面(FSS)。FSS、衬底和地形成一层斗篷，将天线结构的单、双基地RCS从8.5 GHz降低到10.5 GHz。将新天线的传播特性与原天线进行了比较，结果表明，地幔隐身对天线的阻抗带宽、增益和方向图的影响可以忽略不计。
{"title":"Radar Cross Section Reduction of Conformal Patch Antenna Using Mantle Cloak","authors":"M. Joozdani, Mohammad Khalai Amirhosseini","doi":"10.1109/IranianCEE.2019.8786461","DOIUrl":"https://doi.org/10.1109/IranianCEE.2019.8786461","url":null,"abstract":"In this paper out-of-band radar cross section (RCS) reduction of conformal patch antenna without affecting the antenna characteristics is investigated by mantle cloaking. First, a conformal microstrip antenna with inset feed is considered on dielectric substrate with ε r = 10 grounded by a perfect electric conductor (PEC) cylinder. The working frequency and bandwidth of the patch antenna are 5 GHz and 80 MHz, respectively. Then, a patch frequency selective surface (FSS) is placed on top of the substrate layer except the regions covered by the patch and feed line of the antenna. The FSS, substrate and ground make a mantle cloak decreasing the monostatic and bistatic RCS of the antenna structure from 8.5 GHz to 10.5 GHz. The propagation characteristics of the new antenna are compared with the first one and it is shown that mantle cloaking has negligible effect on impedance bandwidth, gain and pattern of the antenna.","PeriodicalId":6683,"journal":{"name":"2019 27th Iranian Conference on Electrical Engineering (ICEE)","volume":"60 1","pages":"1347-1351"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85653728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.1109/IranianCEE.2019.8786692
H. Behrouz, I. Mohammadzaman, A. Mohammadi
this paper investigates the problem of robust gain-scheduled static output feedback (SOF) controller for a class of uncertain linear parameter varying systems (LPVSs). An uncertain LPVS is described by an interconnection of a nominal LPVS which is solely dependent on the measurable parameters, and a block structured uncertainty. For designing a H∞ gain-scheduled SOF controller as well as performing the stability analysis, the proposed method uses integral quadratic constraints (IQCs) to derive the linear matrix inequalities (LMIs) without any constraints on nominal system matrices. The performance and effectiveness of the proposed method are demonstrated based on an example.
{"title":"Static Output Feedback H ∞ Control Design for a Class of Uncertain LPV Systems: An Integral Quadratic Constraint Approach","authors":"H. Behrouz, I. Mohammadzaman, A. Mohammadi","doi":"10.1109/IranianCEE.2019.8786692","DOIUrl":"https://doi.org/10.1109/IranianCEE.2019.8786692","url":null,"abstract":"this paper investigates the problem of robust gain-scheduled static output feedback (SOF) controller for a class of uncertain linear parameter varying systems (LPVSs). An uncertain LPVS is described by an interconnection of a nominal LPVS which is solely dependent on the measurable parameters, and a block structured uncertainty. For designing a H∞ gain-scheduled SOF controller as well as performing the stability analysis, the proposed method uses integral quadratic constraints (IQCs) to derive the linear matrix inequalities (LMIs) without any constraints on nominal system matrices. The performance and effectiveness of the proposed method are demonstrated based on an example.","PeriodicalId":6683,"journal":{"name":"2019 27th Iranian Conference on Electrical Engineering (ICEE)","volume":"1 1","pages":"1019-1023"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76627654","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.1109/IranianCEE.2019.8786415
Farshid Khajehrayeni, H. Ghassemian
Hyperspectral unmixing (HSU) aims at extracting sub-pixel information and solving the mixed pixel problem in hyperspectral (HS) imaging. The multi-layer perceptron (MLP) network has been widely employed to address the problem thanks to its capability in learning the complex nonlinear relationship between the endmembers and their abundances. In this paper, we investigate the application of finding a suitable synthetic library for HSU using MLP. Firstly, fully constrained least square method is utilized to extract the initial solution because of its speed and high accuracy. The synthetic library is only made of samples around the initial solution, which avoids searching in the entire abundance range. Secondly, the discrete cosine transform and discrete wavelet transform are utilized to reduce the number of HS image bands in order to reduce the network's parameters resulting in preventing the overfitting. Since these feature reduction methods are data-independent, they are proper for compacting synthetic libraries. Furthermore, the spectral information divergence is utilized as an objective function in order to achieve a better result. The proposed method is applied to both synthetic and real datasets and the robustness and abundance estimation error has been evaluated. The results illustrate the potency of the proposed method in real applications.
{"title":"Improving Performance of Hyperspectral Unmixing Using Multi-Layer Perceptron by Generating an Appropriate Synthetic Library","authors":"Farshid Khajehrayeni, H. Ghassemian","doi":"10.1109/IranianCEE.2019.8786415","DOIUrl":"https://doi.org/10.1109/IranianCEE.2019.8786415","url":null,"abstract":"Hyperspectral unmixing (HSU) aims at extracting sub-pixel information and solving the mixed pixel problem in hyperspectral (HS) imaging. The multi-layer perceptron (MLP) network has been widely employed to address the problem thanks to its capability in learning the complex nonlinear relationship between the endmembers and their abundances. In this paper, we investigate the application of finding a suitable synthetic library for HSU using MLP. Firstly, fully constrained least square method is utilized to extract the initial solution because of its speed and high accuracy. The synthetic library is only made of samples around the initial solution, which avoids searching in the entire abundance range. Secondly, the discrete cosine transform and discrete wavelet transform are utilized to reduce the number of HS image bands in order to reduce the network's parameters resulting in preventing the overfitting. Since these feature reduction methods are data-independent, they are proper for compacting synthetic libraries. Furthermore, the spectral information divergence is utilized as an objective function in order to achieve a better result. The proposed method is applied to both synthetic and real datasets and the robustness and abundance estimation error has been evaluated. The results illustrate the potency of the proposed method in real applications.","PeriodicalId":6683,"journal":{"name":"2019 27th Iranian Conference on Electrical Engineering (ICEE)","volume":"28 1","pages":"1303-1308"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80907356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.1109/IranianCEE.2019.8786523
Peyman Nejat Dehkordi, Sayed Vahid Mir-Moghtadaei, Noushin Ghaderi
A non-linear LC resonator technique is proposed for differential-drive cross-coupled (DDCC) Rectifier's structure, with applications in efficient portable-to-portable wireless charging. The proposed circuits improved the performance for a wide range of input power from −13dbm to 13dbm in 933 MHz. In the differential-drive cross-coupled (DDCC) Rectifier's structure, the received signal from the antenna is directly connected to the gates of the transistors. In the proposed structure an off-chip inductor series with a non-linear parasitic capacitance forms a resonator which increase the amplitude based on the input signal power. The voltage conversion ratio in non-linear resonator is high for low input power, while this ratio is low for high input power. Simulation result using CMOS 180nm technology shows a maximum of 68.26% in power conversion efficiency (PCE) with an input power of 8dbm with 10k load resistance and output DC voltage of 5.97V.
{"title":"A high Power Conversion Efficiency CMOS Rectifier Using LC Resonator Technique for Energy Harvesting Applications","authors":"Peyman Nejat Dehkordi, Sayed Vahid Mir-Moghtadaei, Noushin Ghaderi","doi":"10.1109/IranianCEE.2019.8786523","DOIUrl":"https://doi.org/10.1109/IranianCEE.2019.8786523","url":null,"abstract":"A non-linear LC resonator technique is proposed for differential-drive cross-coupled (DDCC) Rectifier's structure, with applications in efficient portable-to-portable wireless charging. The proposed circuits improved the performance for a wide range of input power from −13dbm to 13dbm in 933 MHz. In the differential-drive cross-coupled (DDCC) Rectifier's structure, the received signal from the antenna is directly connected to the gates of the transistors. In the proposed structure an off-chip inductor series with a non-linear parasitic capacitance forms a resonator which increase the amplitude based on the input signal power. The voltage conversion ratio in non-linear resonator is high for low input power, while this ratio is low for high input power. Simulation result using CMOS 180nm technology shows a maximum of 68.26% in power conversion efficiency (PCE) with an input power of 8dbm with 10k load resistance and output DC voltage of 5.97V.","PeriodicalId":6683,"journal":{"name":"2019 27th Iranian Conference on Electrical Engineering (ICEE)","volume":"45 1","pages":"290-294"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80921167","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.1109/IranianCEE.2019.8786598
R. Yavari, Javad Davazdah Emami, I. Izadi
Boilers have many applications from residential and commercial heating to power generation and petrochemical plants. Better control of boilers reduces fossil fuel consumption and environmental pollution. In this paper, a manually operated lab-scale boiler is set up for automatic control and monitoring. Boiler variables are measured using machine vision techniques and added sensors, and then sent to a computer. An actuator delivers the control command to change air flow. A feedforward feedback control algorithm is then suggested to maintain the air/flow equivalence ratio, which is shown to be a suitable indicator for better efficiency and less pollution. Experimental results are presented to support the performance of the control mechanism.
{"title":"Lab-scale Combustion Control Setup for Test and Implementation of Control Algorithms","authors":"R. Yavari, Javad Davazdah Emami, I. Izadi","doi":"10.1109/IranianCEE.2019.8786598","DOIUrl":"https://doi.org/10.1109/IranianCEE.2019.8786598","url":null,"abstract":"Boilers have many applications from residential and commercial heating to power generation and petrochemical plants. Better control of boilers reduces fossil fuel consumption and environmental pollution. In this paper, a manually operated lab-scale boiler is set up for automatic control and monitoring. Boiler variables are measured using machine vision techniques and added sensors, and then sent to a computer. An actuator delivers the control command to change air flow. A feedforward feedback control algorithm is then suggested to maintain the air/flow equivalence ratio, which is shown to be a suitable indicator for better efficiency and less pollution. Experimental results are presented to support the performance of the control mechanism.","PeriodicalId":6683,"journal":{"name":"2019 27th Iranian Conference on Electrical Engineering (ICEE)","volume":"5 1","pages":"1211-1215"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81147265","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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