Pub Date : 2020-04-01DOI: 10.1109/RADIOELEKTRONIKA49387.2020.9092394
P. Skryja, Marek Novák, P. Barcik, Z. Kolka
The article presents an analysis and comparison of methods for vibration measurement of Free Space Optic (FSO) communication terminal fixture. The purpose of gathered data is to improve algorithm for tracking and pointing the FSO. For it there were gathered and compared data from a three-axis accelerometer and a two-axis optic sensor. The obtained data from the measurement can be used to separate and compare the effects of vibrations and atmospheric turbulence on reliability and availability of the FSO link.
{"title":"Comparison of vibration measurement methods for FSO fixture","authors":"P. Skryja, Marek Novák, P. Barcik, Z. Kolka","doi":"10.1109/RADIOELEKTRONIKA49387.2020.9092394","DOIUrl":"https://doi.org/10.1109/RADIOELEKTRONIKA49387.2020.9092394","url":null,"abstract":"The article presents an analysis and comparison of methods for vibration measurement of Free Space Optic (FSO) communication terminal fixture. The purpose of gathered data is to improve algorithm for tracking and pointing the FSO. For it there were gathered and compared data from a three-axis accelerometer and a two-axis optic sensor. The obtained data from the measurement can be used to separate and compare the effects of vibrations and atmospheric turbulence on reliability and availability of the FSO link.","PeriodicalId":131117,"journal":{"name":"2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117071373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-04-01DOI: 10.1109/RADIOELEKTRONIKA49387.2020.9092426
V. Lesnikov, T. Naumovich, A. Chastikov
This study is an integral part of a project focusing on the synthesis of IIR digital filters with finite word length. The implementation of the project involves considering the finite word length already at the stage of computation zeros and poles. The results of this stage are final and are not distorted at the stage of structural synthesis. The computation uses the fact that the zeros and poles of a practically implemented digital filter are elements of the set of algebraic numbers of the corresponding degree. At the stage of structural synthesis, a digital filter block diagram is generated. This block diagram provides specified degrees of algebraic numbers, which are zeros and poles. The exact values of the coefficients of the generated digital filter structure are calculated taking into account previously calculated zeros and poles. Different structures are characterized by structural precision, independent of specific coefficient values. This paper is devoted to the study of the generation of structures that provide a given structural precision of the denominator of the transfer function and a given degree of algebraic numbers that are poles.
{"title":"Implementation of the Poles of IIR Digital Filters with a Declared Structural Precision","authors":"V. Lesnikov, T. Naumovich, A. Chastikov","doi":"10.1109/RADIOELEKTRONIKA49387.2020.9092426","DOIUrl":"https://doi.org/10.1109/RADIOELEKTRONIKA49387.2020.9092426","url":null,"abstract":"This study is an integral part of a project focusing on the synthesis of IIR digital filters with finite word length. The implementation of the project involves considering the finite word length already at the stage of computation zeros and poles. The results of this stage are final and are not distorted at the stage of structural synthesis. The computation uses the fact that the zeros and poles of a practically implemented digital filter are elements of the set of algebraic numbers of the corresponding degree. At the stage of structural synthesis, a digital filter block diagram is generated. This block diagram provides specified degrees of algebraic numbers, which are zeros and poles. The exact values of the coefficients of the generated digital filter structure are calculated taking into account previously calculated zeros and poles. Different structures are characterized by structural precision, independent of specific coefficient values. This paper is devoted to the study of the generation of structures that provide a given structural precision of the denominator of the transfer function and a given degree of algebraic numbers that are poles.","PeriodicalId":131117,"journal":{"name":"2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122137836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-04-01DOI: 10.1109/RADIOELEKTRONIKA49387.2020.9092400
M. Sokol, P. Galajda, M. Pecovský
The development of the flash analog-digital converter (ADC) includes mainly the design of the input comparators. This paper deals with the design and improvement of the high-speed comparator for a 7-bit Flash ADC for Ultra-Wideband (UWB) sensor systems. The comparator is designed in 0.35 µm SiGe BiCMOS technology by AMS. Proposed comparator achieves 480 MHz bandwidth with 1 mV input resolution at signal range 1.6 Vpp. The power consumption of the designed comparator cell is 5.9 mW at -3.3 V power supply. The improved comparator was compared with the previous one designed for 4-bit flash ADC. For comparison, the basic parameters of the post-layout simulations were performed.
{"title":"Improving Input Circuits for 7-bit Flash AD Converter","authors":"M. Sokol, P. Galajda, M. Pecovský","doi":"10.1109/RADIOELEKTRONIKA49387.2020.9092400","DOIUrl":"https://doi.org/10.1109/RADIOELEKTRONIKA49387.2020.9092400","url":null,"abstract":"The development of the flash analog-digital converter (ADC) includes mainly the design of the input comparators. This paper deals with the design and improvement of the high-speed comparator for a 7-bit Flash ADC for Ultra-Wideband (UWB) sensor systems. The comparator is designed in 0.35 µm SiGe BiCMOS technology by AMS. Proposed comparator achieves 480 MHz bandwidth with 1 mV input resolution at signal range 1.6 Vpp. The power consumption of the designed comparator cell is 5.9 mW at -3.3 V power supply. The improved comparator was compared with the previous one designed for 4-bit flash ADC. For comparison, the basic parameters of the post-layout simulations were performed.","PeriodicalId":131117,"journal":{"name":"2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129455415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-04-01DOI: 10.1109/RADIOELEKTRONIKA49387.2020.9092431
Ľuboš Podlucký, M. Vojs, J. Chovan, V. Rehacek, J. Kováč, F. Uherek
We have investigated the deposition and etching process of silicon oxynitride (SiON) films for optical waveguides on silicon wafer. SiON films were deposited using plasma-enhanced chemical vapor deposition (PECVD) system. Thickness, uniformity and refractive index was measured by micro-spot spectroscopic reflectometry and confirmed by ellipsometry. Aluminum (Al) mask was fabricated for etching purpose using lift-off process. SiON films were etched in low pressure inductively coupled plasma - reactive ion etching (ICP-RIE) chamber using CF4 gas. The effect of oxygen (O2) flow rate and source power on etch rate and profile of SiON waveguide was investigated. Scanning electron microscope (SEM) has been used to study the overall structure quality of SiON optical waveguide core. Deposition of SiOx cladding layer was also investigated. SiOx cladding layer was deposited using PECVD system. We investigated the impact of total gas flow rate, N2O/SiH4 ratio and power on the refractive index, growth rate, and uniformity of thickness of the deposited SiOx layer. Micro-trenching occurred in all cases, and their variation was explained by combination of variations in the plasma density and profile angles. The SiO2 cladding layer deposited with N2O/SiH4 ratio of 8,353, total gas flow rate of 1000 sccm and power P = 100W yielded the best results in terms of refractive index.
{"title":"Optimization of SiON/SiOx structures fabrication process for optical waveguides","authors":"Ľuboš Podlucký, M. Vojs, J. Chovan, V. Rehacek, J. Kováč, F. Uherek","doi":"10.1109/RADIOELEKTRONIKA49387.2020.9092431","DOIUrl":"https://doi.org/10.1109/RADIOELEKTRONIKA49387.2020.9092431","url":null,"abstract":"We have investigated the deposition and etching process of silicon oxynitride (SiON) films for optical waveguides on silicon wafer. SiON films were deposited using plasma-enhanced chemical vapor deposition (PECVD) system. Thickness, uniformity and refractive index was measured by micro-spot spectroscopic reflectometry and confirmed by ellipsometry. Aluminum (Al) mask was fabricated for etching purpose using lift-off process. SiON films were etched in low pressure inductively coupled plasma - reactive ion etching (ICP-RIE) chamber using CF4 gas. The effect of oxygen (O2) flow rate and source power on etch rate and profile of SiON waveguide was investigated. Scanning electron microscope (SEM) has been used to study the overall structure quality of SiON optical waveguide core. Deposition of SiOx cladding layer was also investigated. SiOx cladding layer was deposited using PECVD system. We investigated the impact of total gas flow rate, N2O/SiH4 ratio and power on the refractive index, growth rate, and uniformity of thickness of the deposited SiOx layer. Micro-trenching occurred in all cases, and their variation was explained by combination of variations in the plasma density and profile angles. The SiO2 cladding layer deposited with N2O/SiH4 ratio of 8,353, total gas flow rate of 1000 sccm and power P = 100W yielded the best results in terms of refractive index.","PeriodicalId":131117,"journal":{"name":"2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127004751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-04-01DOI: 10.1109/RADIOELEKTRONIKA49387.2020.9092386
V. Bilik
We present the design of and experiments with a high-power in-line transition between the WR340 rectangular waveguide and the 7/8” EIA coaxial line. The adapter is intended for operation in the 2.45-GHz ISM band, with CW power up to 2 kW. The design is based on electromagnetic simulation. Our measurements demonstrated the adapter's inband return loss typically exceeding 30 dB. The adapter successfully sustained tests with input CW power of 3 kW.
{"title":"High-Power In-Line Waveguide to Coaxial Adapter","authors":"V. Bilik","doi":"10.1109/RADIOELEKTRONIKA49387.2020.9092386","DOIUrl":"https://doi.org/10.1109/RADIOELEKTRONIKA49387.2020.9092386","url":null,"abstract":"We present the design of and experiments with a high-power in-line transition between the WR340 rectangular waveguide and the 7/8” EIA coaxial line. The adapter is intended for operation in the 2.45-GHz ISM band, with CW power up to 2 kW. The design is based on electromagnetic simulation. Our measurements demonstrated the adapter's inband return loss typically exceeding 30 dB. The adapter successfully sustained tests with input CW power of 3 kW.","PeriodicalId":131117,"journal":{"name":"2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116915350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-04-01DOI: 10.1109/RADIOELEKTRONIKA49387.2020.9092404
Marek Ruzicka, Marcel Volosin, J. Gazda, T. Maksymyuk
The end-user mobility patterns play an key role in the process of 5G network design. Massive increase of the RAN infastructure complexity creates additional requirements on precise network planning and overall orchestration of the network as such. The possible solution to enhance the statistics feeding the network planning process is to generate massive dataset of the end-user mobility patterns. Unfortunately, we are still constrained with few number of commercialy available datasets, far from the sample statistics needed for machine learning training purposes. Our solution to overcome this problem is to generate additional end user traffic statistics by using generative adversial networks approach. Given the existing sample-constrained end user mobility datasets, GAN network learns to generate new data with the same statistics as the training set. Thus, by leveraging this approach we are able to generate theoretically unlimited samples of realistic end user mobility trajectories. This artificial data jointly with existing limited datasets have the potential to be used for the training blocks of machine learning within the process of the network planning optimization.
{"title":"The extension of existing end-user mobility dataset based on generative adversarial networks","authors":"Marek Ruzicka, Marcel Volosin, J. Gazda, T. Maksymyuk","doi":"10.1109/RADIOELEKTRONIKA49387.2020.9092404","DOIUrl":"https://doi.org/10.1109/RADIOELEKTRONIKA49387.2020.9092404","url":null,"abstract":"The end-user mobility patterns play an key role in the process of 5G network design. Massive increase of the RAN infastructure complexity creates additional requirements on precise network planning and overall orchestration of the network as such. The possible solution to enhance the statistics feeding the network planning process is to generate massive dataset of the end-user mobility patterns. Unfortunately, we are still constrained with few number of commercialy available datasets, far from the sample statistics needed for machine learning training purposes. Our solution to overcome this problem is to generate additional end user traffic statistics by using generative adversial networks approach. Given the existing sample-constrained end user mobility datasets, GAN network learns to generate new data with the same statistics as the training set. Thus, by leveraging this approach we are able to generate theoretically unlimited samples of realistic end user mobility trajectories. This artificial data jointly with existing limited datasets have the potential to be used for the training blocks of machine learning within the process of the network planning optimization.","PeriodicalId":131117,"journal":{"name":"2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116716472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-04-01DOI: 10.1109/RADIOELEKTRONIKA49387.2020.9092370
Sushree Sila P. Goswami, Bikram Paul, Sunil Dutt, G. Trivedi
In the digital signal processing (DSP) system, multiplier is a significant arithmetic module. It contributes mainly in the power consumption and speed, and efficient multipliers are the need of the hour. Approximate computing has added a unique dimension in the area of digital design by reducing area, power and delay. The demand of efficient approximate multipliers is enhancing due to the high speed and fault tolerance as well as its power efficiency. This paper presents comparison of few recent approximate multiplier designs. Experimental results based on the accuracy and circuit parameters are presented. The accuracy parameters are amplitude data accuracy (ACC_amp), information data accuracy (ACC_inf), error rate (ER) and mean error distance (MED). The circuit parameters are delay, power consumption, area. Based on these parameters, the best design in terms of power consumption and area is datapath complexity reduction approximate multiplier which exhibits 58% less power and 61% less area as compared to broken array multiplier.
{"title":"Comparative Review of Approximate Multipliers","authors":"Sushree Sila P. Goswami, Bikram Paul, Sunil Dutt, G. Trivedi","doi":"10.1109/RADIOELEKTRONIKA49387.2020.9092370","DOIUrl":"https://doi.org/10.1109/RADIOELEKTRONIKA49387.2020.9092370","url":null,"abstract":"In the digital signal processing (DSP) system, multiplier is a significant arithmetic module. It contributes mainly in the power consumption and speed, and efficient multipliers are the need of the hour. Approximate computing has added a unique dimension in the area of digital design by reducing area, power and delay. The demand of efficient approximate multipliers is enhancing due to the high speed and fault tolerance as well as its power efficiency. This paper presents comparison of few recent approximate multiplier designs. Experimental results based on the accuracy and circuit parameters are presented. The accuracy parameters are amplitude data accuracy (ACC_amp), information data accuracy (ACC_inf), error rate (ER) and mean error distance (MED). The circuit parameters are delay, power consumption, area. Based on these parameters, the best design in terms of power consumption and area is datapath complexity reduction approximate multiplier which exhibits 58% less power and 61% less area as compared to broken array multiplier.","PeriodicalId":131117,"journal":{"name":"2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126984720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-04-01DOI: 10.1109/RADIOELEKTRONIKA49387.2020.9092417
Meenali Janveja, Bikram Paul, G. Trivedi, Gonella Vijayakanthi, Astha Agrawal, J. Pidanic, Z. Nemec
Cryptography has an important role in securing information which has gained prominence due to the digitization. Exchange of sensitive personal data such as medical information tends to take place frequently throughout the globe; therefore, protecting data from unauthorized adversary access is imperative. Advanced encryption standard (AES) algorithm is one of the algorithms which is broadly employed because of its exemplary security and usage in extensive applications. This research proposes a modified folded pipelined architecture of an AES algorithm for resources constraint applications. The folding transformation controls the circuit functionalities by time-multiplexing operations to a single functional unit and reduces its area considerably. The proposed architecture is implemented using fewer resources, hence, improves area and the power requirements as compared to the conventional algorithm. The work presented in this paper is applicable for encrypting and decrypting personalized Electrocardiograph (ECG) signals for secure transmission. The architecture proposed in this paper reduces the area requirements by 83% and power by 96.8% enabling its hardware implementation more efficient than the conventional AES. Due to its low power and area requirements, the architecture presented in this paper can be used for portable Internet of things (IoT) applications as well.
{"title":"Design of Efficient AES Architecture for Secure ECG Signal Transmission for Low-power IoT Applications","authors":"Meenali Janveja, Bikram Paul, G. Trivedi, Gonella Vijayakanthi, Astha Agrawal, J. Pidanic, Z. Nemec","doi":"10.1109/RADIOELEKTRONIKA49387.2020.9092417","DOIUrl":"https://doi.org/10.1109/RADIOELEKTRONIKA49387.2020.9092417","url":null,"abstract":"Cryptography has an important role in securing information which has gained prominence due to the digitization. Exchange of sensitive personal data such as medical information tends to take place frequently throughout the globe; therefore, protecting data from unauthorized adversary access is imperative. Advanced encryption standard (AES) algorithm is one of the algorithms which is broadly employed because of its exemplary security and usage in extensive applications. This research proposes a modified folded pipelined architecture of an AES algorithm for resources constraint applications. The folding transformation controls the circuit functionalities by time-multiplexing operations to a single functional unit and reduces its area considerably. The proposed architecture is implemented using fewer resources, hence, improves area and the power requirements as compared to the conventional algorithm. The work presented in this paper is applicable for encrypting and decrypting personalized Electrocardiograph (ECG) signals for secure transmission. The architecture proposed in this paper reduces the area requirements by 83% and power by 96.8% enabling its hardware implementation more efficient than the conventional AES. Due to its low power and area requirements, the architecture presented in this paper can be used for portable Internet of things (IoT) applications as well.","PeriodicalId":131117,"journal":{"name":"2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA)","volume":"60 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129299640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-04-01DOI: 10.1109/RADIOELEKTRONIKA49387.2020.9092422
P. Kadlec, M. Capek, J. Rýmus, M. Marek, M. Štumpf, L. Jelínek, M. Mašek, P. Kotalík
A linear antenna array design is usually formulated as a binary optimization task. A global optimization algorithm is then used to turn on/off a fixed number of elements positioned on a uniform grid. This paper introduces a new formulation of the problem: the optimizer searches for distances between individual elements and their total amount at the same time. Such a formulation has to be solved using the optimization with a variable number of dimensions that enables to work with decision space vectors having different lengths. Here, the Particle Swarm Optimization algorithm is used to solve different formulations of the linear antenna array design problem. The “uniform grid” formulation is compared with the “variable number of dimensions” formulation on several optimization tasks encompassing the minimization of selected antenna parameters: the Side-Lobe Level, the First Null Beam Width and the number of used (active) elements.
{"title":"Design of a Linear Antenna Array: Variable Number of Dimensions Approach","authors":"P. Kadlec, M. Capek, J. Rýmus, M. Marek, M. Štumpf, L. Jelínek, M. Mašek, P. Kotalík","doi":"10.1109/RADIOELEKTRONIKA49387.2020.9092422","DOIUrl":"https://doi.org/10.1109/RADIOELEKTRONIKA49387.2020.9092422","url":null,"abstract":"A linear antenna array design is usually formulated as a binary optimization task. A global optimization algorithm is then used to turn on/off a fixed number of elements positioned on a uniform grid. This paper introduces a new formulation of the problem: the optimizer searches for distances between individual elements and their total amount at the same time. Such a formulation has to be solved using the optimization with a variable number of dimensions that enables to work with decision space vectors having different lengths. Here, the Particle Swarm Optimization algorithm is used to solve different formulations of the linear antenna array design problem. The “uniform grid” formulation is compared with the “variable number of dimensions” formulation on several optimization tasks encompassing the minimization of selected antenna parameters: the Side-Lobe Level, the First Null Beam Width and the number of used (active) elements.","PeriodicalId":131117,"journal":{"name":"2020 30th International Conference Radioelektronika (RADIOELEKTRONIKA)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114440717","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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