Pub Date : 2015-11-01DOI: 10.1109/NUICONE.2015.7449645
H. Vaghela, B. Sarkar, A. Bisht, V. Lakhera
Cryogenic system in fusion research tokamak integrates many components, i.e., heat exchangers, valves, cold circulating pumps, cold compressor etc., in various configurations for the cooling of superconducting (SC) magnets like Toroidal Field (TF), Poloidal Field (PF) and Central Solenoid (CS). Helium refrigerator/liquefier (R/L) serves as a source of cold power for the cryogenic cooling of magnets at 4 K temperature level. However, normally the cryogenic cooling of the SC magnets is accomplished indirectly using the secondary circuit by the use of cold circulating pump, which circulates when the supercritical helium in closed circuit and rejects the heat from SC magnets to the Liquid Helium (LHe) bath which is maintained at ~4 K temperature level by the helium (R/L). This arrangement provides flexibility for the operation of SC magnets, which operates in pulsed manner, and still establishes stable operation for the helium (R/L). There are various configurations that are possible for LHe bath and cold compressor arrangements, i.e., there is a common LHe bath for all SC magnets or individual bath for each SC magnet with either individual cold compressor or common cold compressor for each bath. Thermal system modeling and analysis of the different cryogenic cooling configuration reveals the optimum configuration satisfying the main function of cryogenic cooling of SC magnets with required thermal performance.
{"title":"Thermal performance analysis of cryogenic system for cooling of superconducting magnets at 4K temperature level","authors":"H. Vaghela, B. Sarkar, A. Bisht, V. Lakhera","doi":"10.1109/NUICONE.2015.7449645","DOIUrl":"https://doi.org/10.1109/NUICONE.2015.7449645","url":null,"abstract":"Cryogenic system in fusion research tokamak integrates many components, i.e., heat exchangers, valves, cold circulating pumps, cold compressor etc., in various configurations for the cooling of superconducting (SC) magnets like Toroidal Field (TF), Poloidal Field (PF) and Central Solenoid (CS). Helium refrigerator/liquefier (R/L) serves as a source of cold power for the cryogenic cooling of magnets at 4 K temperature level. However, normally the cryogenic cooling of the SC magnets is accomplished indirectly using the secondary circuit by the use of cold circulating pump, which circulates when the supercritical helium in closed circuit and rejects the heat from SC magnets to the Liquid Helium (LHe) bath which is maintained at ~4 K temperature level by the helium (R/L). This arrangement provides flexibility for the operation of SC magnets, which operates in pulsed manner, and still establishes stable operation for the helium (R/L). There are various configurations that are possible for LHe bath and cold compressor arrangements, i.e., there is a common LHe bath for all SC magnets or individual bath for each SC magnet with either individual cold compressor or common cold compressor for each bath. Thermal system modeling and analysis of the different cryogenic cooling configuration reveals the optimum configuration satisfying the main function of cryogenic cooling of SC magnets with required thermal performance.","PeriodicalId":131332,"journal":{"name":"2015 5th Nirma University International Conference on Engineering (NUiCONE)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131693652","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-11-01DOI: 10.1109/NUICONE.2015.7449589
Debapriya Goswami, A. Chakraborty
This paper focuses on the essentiality of incorporating ethics as a course in engineering education. It claims that an amalgamation of ethical awareness and engineering skills can enable the future engineers to strengthen the relation between technology and society.
{"title":"Sensitizing engineers: A brief study of the role of ethics in engineering education","authors":"Debapriya Goswami, A. Chakraborty","doi":"10.1109/NUICONE.2015.7449589","DOIUrl":"https://doi.org/10.1109/NUICONE.2015.7449589","url":null,"abstract":"This paper focuses on the essentiality of incorporating ethics as a course in engineering education. It claims that an amalgamation of ethical awareness and engineering skills can enable the future engineers to strengthen the relation between technology and society.","PeriodicalId":131332,"journal":{"name":"2015 5th Nirma University International Conference on Engineering (NUiCONE)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115933783","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-11-01DOI: 10.1109/NUICONE.2015.7449593
V. Kadam, S. Jadhav, Mahesh Parihar, Amit Karande
Presently industrial automation is growing rapidly emphasizing on centralized monitoring and independent control of sub-systems. This increases the number of remote sub-systems, which need intermediate communication. Another challenges observed are the reduction of system size and the maintenance cost with flexibility in operation. Regulatory, repetitive sequential control and interlocking are the typical mandatory requirements for batch execution and safety. This paper presents development and analysis of prototype system for wireless controlling and monitoring of the batch process experimental set-up. It proposes the efficient utilization of ARM micro-controller for the real-time monitoring and control of temperature and level. A graphical user interface using Visual Studio.NET is developed to operate the plant remotely. This facilitates the user to control, supervision and data acquisition through wireless communication between laboratory set-up and user interface via ZigBee protocol. Sensitivity and linearity analysis of RTD output and ultrasonic level sensor output is carried out citing fair linearity of RTD and level sensors calibration. Additionally errors in calculated and observed output at ADC are also investigated. The normal operation and safety interlocks have been identified, executed & validated to mitigate the hazardous events in plant considering the possibility of failure of temperature and level sensors. The proposed system is developed successfully and works in defined manner with overall satisfactory performance.
{"title":"Development of wireless embedded automation system for batch process","authors":"V. Kadam, S. Jadhav, Mahesh Parihar, Amit Karande","doi":"10.1109/NUICONE.2015.7449593","DOIUrl":"https://doi.org/10.1109/NUICONE.2015.7449593","url":null,"abstract":"Presently industrial automation is growing rapidly emphasizing on centralized monitoring and independent control of sub-systems. This increases the number of remote sub-systems, which need intermediate communication. Another challenges observed are the reduction of system size and the maintenance cost with flexibility in operation. Regulatory, repetitive sequential control and interlocking are the typical mandatory requirements for batch execution and safety. This paper presents development and analysis of prototype system for wireless controlling and monitoring of the batch process experimental set-up. It proposes the efficient utilization of ARM micro-controller for the real-time monitoring and control of temperature and level. A graphical user interface using Visual Studio.NET is developed to operate the plant remotely. This facilitates the user to control, supervision and data acquisition through wireless communication between laboratory set-up and user interface via ZigBee protocol. Sensitivity and linearity analysis of RTD output and ultrasonic level sensor output is carried out citing fair linearity of RTD and level sensors calibration. Additionally errors in calculated and observed output at ADC are also investigated. The normal operation and safety interlocks have been identified, executed & validated to mitigate the hazardous events in plant considering the possibility of failure of temperature and level sensors. The proposed system is developed successfully and works in defined manner with overall satisfactory performance.","PeriodicalId":131332,"journal":{"name":"2015 5th Nirma University International Conference on Engineering (NUiCONE)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128536194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-11-01DOI: 10.1109/NUICONE.2015.7449647
N. Yadav, Rupal A. Kapdi
Modifying or enhancing an image is ubiquitous but, when enhancement tends to change the interpretation of the image they are termed as an attempt of forgery on digital images. Copy move forgery (CMF) is a simple technique and has a number of well built tools in a number of image enhancement software. CMF detection techniques often tend to establish similarity between copied and pasted region on the same image as both are from same original image. Keypoint and block based techniques are used to determine the CMF. SIFT keypoints are combined with different techniques to accurately localize forgery. High dimensionality of feature vector acts as a bottle neck in SIFT based analysis. We propose a method to detect CMF using SIFT descriptors which are clustered using GMM and segment the obtained suspect region speeding up the analysis.
{"title":"Copy move forgery detection using SIFT and GMM","authors":"N. Yadav, Rupal A. Kapdi","doi":"10.1109/NUICONE.2015.7449647","DOIUrl":"https://doi.org/10.1109/NUICONE.2015.7449647","url":null,"abstract":"Modifying or enhancing an image is ubiquitous but, when enhancement tends to change the interpretation of the image they are termed as an attempt of forgery on digital images. Copy move forgery (CMF) is a simple technique and has a number of well built tools in a number of image enhancement software. CMF detection techniques often tend to establish similarity between copied and pasted region on the same image as both are from same original image. Keypoint and block based techniques are used to determine the CMF. SIFT keypoints are combined with different techniques to accurately localize forgery. High dimensionality of feature vector acts as a bottle neck in SIFT based analysis. We propose a method to detect CMF using SIFT descriptors which are clustered using GMM and segment the obtained suspect region speeding up the analysis.","PeriodicalId":131332,"journal":{"name":"2015 5th Nirma University International Conference on Engineering (NUiCONE)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128586409","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-11-01DOI: 10.1109/NUICONE.2015.7449616
A. Patel
This paper presents technique to minimize cogging torque in radial flux surface mounted Permanent Magnet Brushless DC (PMBLDC) motor. Variation in magnet edge inset is done and its influence on cogging torque is analyzed. Magnet edge inset is varied from 0 mm to 2 mm keeping other dimensions same in three standard rating radial flux surface mounted Permanent Magnet Brushless DC Motors. It is observed that this technique is effective and cogging torque can be considerably reduced whereas average torque is marginally affected. Hence, it is very essential to select proper magnet edge inset to reduce the cogging torque in order to improve the performance.
{"title":"Cogging torque minimization by magnet edge inset variation technique in radial flux surface mounted Permanent Magnet Brushless DC (PMBLDC) motor","authors":"A. Patel","doi":"10.1109/NUICONE.2015.7449616","DOIUrl":"https://doi.org/10.1109/NUICONE.2015.7449616","url":null,"abstract":"This paper presents technique to minimize cogging torque in radial flux surface mounted Permanent Magnet Brushless DC (PMBLDC) motor. Variation in magnet edge inset is done and its influence on cogging torque is analyzed. Magnet edge inset is varied from 0 mm to 2 mm keeping other dimensions same in three standard rating radial flux surface mounted Permanent Magnet Brushless DC Motors. It is observed that this technique is effective and cogging torque can be considerably reduced whereas average torque is marginally affected. Hence, it is very essential to select proper magnet edge inset to reduce the cogging torque in order to improve the performance.","PeriodicalId":131332,"journal":{"name":"2015 5th Nirma University International Conference on Engineering (NUiCONE)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123202083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-11-01DOI: 10.1109/NUICONE.2015.7449651
Ankit Didwania, Z. Narmawala
Mobile social network is a type of delay tolerant network of mobile devices in which there is no end-to-end path available in advance for communication. It works on the principle of a store-carry-forward mechanism. The community is a very useful property of the mobile social network as humans are social animals and they like to live in a community. Such community structure enables efficient communication between devices carried by humans without any infrastructure. We have analyzed various community detection methods and identified those suitable for mobile social network. We have also analyzed various existing distributed community detection algorithms in mobile social networks based on important parameters like complexity and type of community detected. Such analysis will help in discovering strengths and shortcomings of various existing algorithms. As the mobile social network is self-organizing real network working on highly resource constraint mobile devices, it is necessary to enable each mobile device to detect its own community with minimal information, computation and space requirements. This is a very challenging task and very little work is done in it. So there is an immense opportunity available for research in this area.
{"title":"A comparative study of various community detection algorithms in the mobile social network","authors":"Ankit Didwania, Z. Narmawala","doi":"10.1109/NUICONE.2015.7449651","DOIUrl":"https://doi.org/10.1109/NUICONE.2015.7449651","url":null,"abstract":"Mobile social network is a type of delay tolerant network of mobile devices in which there is no end-to-end path available in advance for communication. It works on the principle of a store-carry-forward mechanism. The community is a very useful property of the mobile social network as humans are social animals and they like to live in a community. Such community structure enables efficient communication between devices carried by humans without any infrastructure. We have analyzed various community detection methods and identified those suitable for mobile social network. We have also analyzed various existing distributed community detection algorithms in mobile social networks based on important parameters like complexity and type of community detected. Such analysis will help in discovering strengths and shortcomings of various existing algorithms. As the mobile social network is self-organizing real network working on highly resource constraint mobile devices, it is necessary to enable each mobile device to detect its own community with minimal information, computation and space requirements. This is a very challenging task and very little work is done in it. So there is an immense opportunity available for research in this area.","PeriodicalId":131332,"journal":{"name":"2015 5th Nirma University International Conference on Engineering (NUiCONE)","volume":"238 1-2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114131533","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-11-01DOI: 10.1109/NUICONE.2015.7449598
Rajesh L. Zadfiya, J. Barve, Vijaykumar H. Unziya
In this paper, control oriented mean value model of naturally aspirated single cylinder diesel engine is studied. Then suitable single cylinder naturally aspirated diesel engine sub-system/system level models and simulation framework is developed in Matlab-Simulink platform. The same engine model-simulator is tuned and validated using the experimental data collected from the IC engine lab set-up. The developed model will be used to develop necessary instrumentation and data acquisition systems for integration with the available IC engine lab set-up and to evaluate performance of some SISO and MIMO control algorithms for suitable engine sub-system/system.
{"title":"Modelling, simulation and validation of reciprocating engine","authors":"Rajesh L. Zadfiya, J. Barve, Vijaykumar H. Unziya","doi":"10.1109/NUICONE.2015.7449598","DOIUrl":"https://doi.org/10.1109/NUICONE.2015.7449598","url":null,"abstract":"In this paper, control oriented mean value model of naturally aspirated single cylinder diesel engine is studied. Then suitable single cylinder naturally aspirated diesel engine sub-system/system level models and simulation framework is developed in Matlab-Simulink platform. The same engine model-simulator is tuned and validated using the experimental data collected from the IC engine lab set-up. The developed model will be used to develop necessary instrumentation and data acquisition systems for integration with the available IC engine lab set-up and to evaluate performance of some SISO and MIMO control algorithms for suitable engine sub-system/system.","PeriodicalId":131332,"journal":{"name":"2015 5th Nirma University International Conference on Engineering (NUiCONE)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121655988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-11-01DOI: 10.1109/NUICONE.2015.7449635
Ami J. Shukla, Vibha Patel, Nagendra P. Gajjar
Edge detection servers as a footstone step in image and video processing. These detected edges can further be given as input to other higher level applications like image enhancement, object recognition, object tracking etc. Literature provides various algorithms for edge detection in various domains. At the same time the process is extremely computational exhaustive. For carrying out this task in real time a system which is really fast is required. Software does not seem to be a suitable candidate for implementing it in real time. We require some technology that has huge amount of parallelism. The high amount of computation power in limited time can be achieved by using FPGA as a platform. Field Programmable Gate Array (FPGA) structures are reconfigurable in nature. These FPGA's can be programmed using a Hardware Description Language. But the popularity of FPGA has increased with the availability of high level tools for configuring it. These tools make the FPGA programming easier. This work proposes a real time embedded solution of various edge detection algorithms like Sobel, Laplacian and Prewitt. The performance evaluation of the proposed work is done on various platforms. The throughput is significantly high with a speedup of 26x-50x and the design time decreasing 5 to 6 times. The real time FPGA solution of edge detection algorithms is designed using a powerful design tool Altium Designer for hardware software co design. A 32-bit soft RISC TSK3000A is integrated as a peripheral to the edge detection hardware. The very same tool is also integrated to the ASP generated by CHC(C to Hardware). This CHC takes an input from DVD player and the processed output is given to VGA monitor. The results are verified in real time with an input video from DVD and an output on the VGA monitor.
边缘检测服务器是图像和视频处理的基石。这些检测到的边缘可以进一步作为输入输入到其他更高级的应用程序,如图像增强,对象识别,对象跟踪等。文献提供了不同领域的边缘检测的各种算法。与此同时,这一过程的计算量是极其详尽的。为了实时完成这项任务,需要一个速度非常快的系统。软件似乎不是实时实现它的合适人选。我们需要一些具有大量并行性的技术。以FPGA为平台,可以在有限的时间内实现大量的计算能力。现场可编程门阵列(FPGA)结构本质上是可重构的。这些FPGA可以使用硬件描述语言进行编程。但是随着配置FPGA的高级工具的出现,FPGA越来越受欢迎。这些工具使FPGA编程变得更加容易。这项工作提出了各种边缘检测算法(如Sobel, Laplacian和Prewitt)的实时嵌入式解决方案。在不同的平台上对所提出的工作进行了性能评估。吞吐量非常高,速度提高了26 -50倍,设计时间减少了5 - 6倍。利用强大的设计工具Altium Designer进行硬件软件协同设计,设计了边缘检测算法的实时FPGA解决方案。32位软RISC TSK3000A作为外围设备集成到边缘检测硬件中。同样的工具也被集成到由CHC(C to Hardware)生成的ASP中。这个CHC从DVD播放器输入,处理后的输出给VGA显示器。结果通过DVD的输入视频和VGA显示器的输出实时验证。
{"title":"Implementation of edge detection algorithms in real time on FPGA","authors":"Ami J. Shukla, Vibha Patel, Nagendra P. Gajjar","doi":"10.1109/NUICONE.2015.7449635","DOIUrl":"https://doi.org/10.1109/NUICONE.2015.7449635","url":null,"abstract":"Edge detection servers as a footstone step in image and video processing. These detected edges can further be given as input to other higher level applications like image enhancement, object recognition, object tracking etc. Literature provides various algorithms for edge detection in various domains. At the same time the process is extremely computational exhaustive. For carrying out this task in real time a system which is really fast is required. Software does not seem to be a suitable candidate for implementing it in real time. We require some technology that has huge amount of parallelism. The high amount of computation power in limited time can be achieved by using FPGA as a platform. Field Programmable Gate Array (FPGA) structures are reconfigurable in nature. These FPGA's can be programmed using a Hardware Description Language. But the popularity of FPGA has increased with the availability of high level tools for configuring it. These tools make the FPGA programming easier. This work proposes a real time embedded solution of various edge detection algorithms like Sobel, Laplacian and Prewitt. The performance evaluation of the proposed work is done on various platforms. The throughput is significantly high with a speedup of 26x-50x and the design time decreasing 5 to 6 times. The real time FPGA solution of edge detection algorithms is designed using a powerful design tool Altium Designer for hardware software co design. A 32-bit soft RISC TSK3000A is integrated as a peripheral to the edge detection hardware. The very same tool is also integrated to the ASP generated by CHC(C to Hardware). This CHC takes an input from DVD player and the processed output is given to VGA monitor. The results are verified in real time with an input video from DVD and an output on the VGA monitor.","PeriodicalId":131332,"journal":{"name":"2015 5th Nirma University International Conference on Engineering (NUiCONE)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128017100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-11-01DOI: 10.1109/NUICONE.2015.7449643
Smit Trambadia, Hemant Mayatra
T-CLS (Truncated Constrained Least Squares) filter is designed with Maxwell-Boltzmann distribution kernel in a frequency domain and hybridized with an SURE-LET algorithm for an effective restoration of degraded Endoscopic image. T-CLS filter successfully reduces degradation and the SURE-LET algorithm reduces Random noise in Endoscopic image. The proposed method provides advantages of reduction in Gradient reversal artifacts and Halos effect to a great extent in Endoscopic image. Experimental results show that the proposed method improves image quality parameters like PSNR (Peak Signal to Noise Ratio), MSE (Mean Square Error) and SSIM (Structure Similarity Index Measurement) as compared to conventional methods.
T-CLS (Truncated Constrained Least Squares,截断约束最小二乘)滤波器采用频率域麦克斯韦-玻尔兹曼分布核,并与SURE-LET算法相结合,实现了对退化内镜图像的有效恢复。T-CLS滤波成功地降低了图像的退化,SURE-LET算法降低了内镜图像中的随机噪声。该方法在很大程度上减少了内窥镜图像中的梯度反转伪影和光晕效应。实验结果表明,与传统方法相比,该方法提高了PSNR(峰值信噪比)、MSE(均方误差)和SSIM(结构相似指数测量)等图像质量参数。
{"title":"Endoscopic image restoration using truncated constrained least squares filter in frequency-domain and SURE-LET filter","authors":"Smit Trambadia, Hemant Mayatra","doi":"10.1109/NUICONE.2015.7449643","DOIUrl":"https://doi.org/10.1109/NUICONE.2015.7449643","url":null,"abstract":"T-CLS (Truncated Constrained Least Squares) filter is designed with Maxwell-Boltzmann distribution kernel in a frequency domain and hybridized with an SURE-LET algorithm for an effective restoration of degraded Endoscopic image. T-CLS filter successfully reduces degradation and the SURE-LET algorithm reduces Random noise in Endoscopic image. The proposed method provides advantages of reduction in Gradient reversal artifacts and Halos effect to a great extent in Endoscopic image. Experimental results show that the proposed method improves image quality parameters like PSNR (Peak Signal to Noise Ratio), MSE (Mean Square Error) and SSIM (Structure Similarity Index Measurement) as compared to conventional methods.","PeriodicalId":131332,"journal":{"name":"2015 5th Nirma University International Conference on Engineering (NUiCONE)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131933246","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-11-01DOI: 10.1109/NUICONE.2015.7449627
Sushma S. Sangolli, S. Rohini
In this paper, we present the design of a low voltage bandgap reference (LVBGR) circuit for supply voltage of 1.2V which can generate an output reference voltage of 0.363V. Traditional BJT based bandgap reference circuits give very precise output reference but power and area consumed by these BJT devices is larger so for low supply bandgap reference we chose MOSFETs operating in subthreshold region based reference circuits. LVBGR circuits with less sensitivity to supply voltage and temperature is used in both analog and digital circuits like high precise comparators used in data converter, phase-locked loop, ring oscillator, memory systems, implantable biomedical product etc. In the proposed circuit subthreshold MOSFETs temperature characteristics are used to achieve temperature compensation of output voltage reference and it can work under very low supply voltage. A PMOS structure 2stage opamp which will be operating in subthreshold region is designed for the proposed LVBGR circuit whose gain is 89.6dB and phase margin is 74 °. Finally a LVBGR circuit is designed which generates output voltage reference of 0.364V given with supply voltage of 1.2 V with 10 % variation and temperature coefficient of 240ppm/ °C is obtained for output reference voltage variation with respect to temperature over a range of 0 to 100°C. The output reference voltage exhibits a variation of 230μV with a supply range of 1.08V to 1.32V at typical process corner. The proposed LVBGR circuit for 1.2V supply is designed with the Mentor Graphics Pyxis tool using 130nm technology with EldoSpice simulator. Overall current consumed by the circuit is 900nA and also the power consumed by the entire LVBGR circuit is 0.9μW and the PSRR of the LVBGR circuit is -70dB.
{"title":"Design of low voltage bandgap reference circuit using subthreshold MOSFET","authors":"Sushma S. Sangolli, S. Rohini","doi":"10.1109/NUICONE.2015.7449627","DOIUrl":"https://doi.org/10.1109/NUICONE.2015.7449627","url":null,"abstract":"In this paper, we present the design of a low voltage bandgap reference (LVBGR) circuit for supply voltage of 1.2V which can generate an output reference voltage of 0.363V. Traditional BJT based bandgap reference circuits give very precise output reference but power and area consumed by these BJT devices is larger so for low supply bandgap reference we chose MOSFETs operating in subthreshold region based reference circuits. LVBGR circuits with less sensitivity to supply voltage and temperature is used in both analog and digital circuits like high precise comparators used in data converter, phase-locked loop, ring oscillator, memory systems, implantable biomedical product etc. In the proposed circuit subthreshold MOSFETs temperature characteristics are used to achieve temperature compensation of output voltage reference and it can work under very low supply voltage. A PMOS structure 2stage opamp which will be operating in subthreshold region is designed for the proposed LVBGR circuit whose gain is 89.6dB and phase margin is 74 °. Finally a LVBGR circuit is designed which generates output voltage reference of 0.364V given with supply voltage of 1.2 V with 10 % variation and temperature coefficient of 240ppm/ °C is obtained for output reference voltage variation with respect to temperature over a range of 0 to 100°C. The output reference voltage exhibits a variation of 230μV with a supply range of 1.08V to 1.32V at typical process corner. The proposed LVBGR circuit for 1.2V supply is designed with the Mentor Graphics Pyxis tool using 130nm technology with EldoSpice simulator. Overall current consumed by the circuit is 900nA and also the power consumed by the entire LVBGR circuit is 0.9μW and the PSRR of the LVBGR circuit is -70dB.","PeriodicalId":131332,"journal":{"name":"2015 5th Nirma University International Conference on Engineering (NUiCONE)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134546337","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}