Pub Date : 2008-08-01DOI: 10.1109/HOTCHIPS.2008.7476537
Richard Selvaggi, Larry Pearlstein
This article consists of a collection of slides from the authors' conference presentation. Summary points include: a platform-based approach enables rapid development of video processing solutions; programmability is important for addressing problems that have no unique solution and demand customer-tailored solutions; programming of heterogeneous cores can be simplified by promoting a uniform infrastructure for the cores; the heterogeneous approach provides programmability where flexibility is required and fixed function to save cost and power.
{"title":"mediaDSP™: A platform for building programmable multicore video processors","authors":"Richard Selvaggi, Larry Pearlstein","doi":"10.1109/HOTCHIPS.2008.7476537","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2008.7476537","url":null,"abstract":"This article consists of a collection of slides from the authors' conference presentation. Summary points include: a platform-based approach enables rapid development of video processing solutions; programmability is important for addressing problems that have no unique solution and demand customer-tailored solutions; programming of heterogeneous cores can be simplified by promoting a uniform infrastructure for the cores; the heterogeneous approach provides programmability where flexibility is required and fixed function to save cost and power.","PeriodicalId":134939,"journal":{"name":"2008 IEEE Hot Chips 20 Symposium (HCS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131317393","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-08-01DOI: 10.1109/HOTCHIPS.2008.7476552
R. Dimond, M. J. Flynn, O. Mencer, O. Pell
This article consists of a collection of slides from the authors' conference presentation. Acceleration based speedup using structured arrays. More attention to memory and/or arithmetic: data representation, streaming, and RAM. •Lower power with non aggressive frequency use. Programming uses cylindrical model; but speedup requires lots of low level program optimization. Good tools are golden.
{"title":"MAXware: Acceleration in HPC","authors":"R. Dimond, M. J. Flynn, O. Mencer, O. Pell","doi":"10.1109/HOTCHIPS.2008.7476552","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2008.7476552","url":null,"abstract":"This article consists of a collection of slides from the authors' conference presentation. Acceleration based speedup using structured arrays. More attention to memory and/or arithmetic: data representation, streaming, and RAM. •Lower power with non aggressive frequency use. Programming uses cylindrical model; but speedup requires lots of low level program optimization. Good tools are golden.","PeriodicalId":134939,"journal":{"name":"2008 IEEE Hot Chips 20 Symposium (HCS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127679274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-08-01DOI: 10.1109/HOTCHIPS.2008.7476535
D. Truong, Wayne H. Cheng, T. Mohsenin, Yuan Zhiyi, Toney Jacobson, Gouri Landge, Michael J. Meeuwsen, Christine Watnik, P. Mejia, A. Tran, Jeremy W. Webb, Eric W. Work, Zhibin Xiao, B. Baas
This article consists of a collection of slides from the authors' conference presentation. Some of the topics discussed included processors and shared memories; on-chip communication; dynamic voltage & clock frequency; and an analysis and summary.
{"title":"A 167-processor computational array for highly-efficient DSP and embedded application processing","authors":"D. Truong, Wayne H. Cheng, T. Mohsenin, Yuan Zhiyi, Toney Jacobson, Gouri Landge, Michael J. Meeuwsen, Christine Watnik, P. Mejia, A. Tran, Jeremy W. Webb, Eric W. Work, Zhibin Xiao, B. Baas","doi":"10.1109/HOTCHIPS.2008.7476535","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2008.7476535","url":null,"abstract":"This article consists of a collection of slides from the authors' conference presentation. Some of the topics discussed included processors and shared memories; on-chip communication; dynamic voltage & clock frequency; and an analysis and summary.","PeriodicalId":134939,"journal":{"name":"2008 IEEE Hot Chips 20 Symposium (HCS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133487655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-08-01DOI: 10.1109/HOTCHIPS.2008.7476549
M. Slater
This article consists of a collection of slides from the author's conference presentation. It is concluded that unrealistic targets are endemic to a highly visible project managed by executives disconnected from the engineers doing the real work.
{"title":"Intel, Merced, and the Fate of Microprocessor Forum","authors":"M. Slater","doi":"10.1109/HOTCHIPS.2008.7476549","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2008.7476549","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation. It is concluded that unrealistic targets are endemic to a highly visible project managed by executives disconnected from the engineers doing the real work.","PeriodicalId":134939,"journal":{"name":"2008 IEEE Hot Chips 20 Symposium (HCS)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123887726","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-08-01DOI: 10.1109/HOTCHIPS.2008.7476515
F. Kruger
The costs of doubling bandwidth appear to be escalating. Major investment will be needed to keep the current trend going past another five years.
带宽翻倍的成本似乎正在上升。要想让目前的趋势再持续五年,就需要大量投资。
{"title":"High bandwidth memory technology: System architecture implications and perspective","authors":"F. Kruger","doi":"10.1109/HOTCHIPS.2008.7476515","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2008.7476515","url":null,"abstract":"The costs of doubling bandwidth appear to be escalating. Major investment will be needed to keep the current trend going past another five years.","PeriodicalId":134939,"journal":{"name":"2008 IEEE Hot Chips 20 Symposium (HCS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114793025","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-08-01DOI: 10.1109/HOTCHIPS.2008.7476539
L. Watts, D. Massie, Allen M. Sansano, James Huey
{"title":"Voice processor based on the human hearing system","authors":"L. Watts, D. Massie, Allen M. Sansano, James Huey","doi":"10.1109/HOTCHIPS.2008.7476539","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2008.7476539","url":null,"abstract":"","PeriodicalId":134939,"journal":{"name":"2008 IEEE Hot Chips 20 Symposium (HCS)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122527596","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-08-01DOI: 10.1109/HOTCHIPS.2008.7476541
Martin M. Deneroff, D. Shaw, R. Dror, J. Kuskin, Richard H. Larson, J. Salmon, C. Young
This article consists of a collection of slides from the authors' conference presentation. Some of the thems presented include: Why build a molecular dynamics simulation engine?; Anton's overall, systematic design; and "Green" Computing?
{"title":"Anton: A specialized ASIC for molecular dynamics","authors":"Martin M. Deneroff, D. Shaw, R. Dror, J. Kuskin, Richard H. Larson, J. Salmon, C. Young","doi":"10.1109/HOTCHIPS.2008.7476541","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2008.7476541","url":null,"abstract":"This article consists of a collection of slides from the authors' conference presentation. Some of the thems presented include: Why build a molecular dynamics simulation engine?; Anton's overall, systematic design; and \"Green\" Computing?","PeriodicalId":134939,"journal":{"name":"2008 IEEE Hot Chips 20 Symposium (HCS)","volume":"271 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121310566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-08-01DOI: 10.1109/HOTCHIPS.2008.7476536
J. Janssen
{"title":"System architecture and applications of the PNX5100","authors":"J. Janssen","doi":"10.1109/HOTCHIPS.2008.7476536","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2008.7476536","url":null,"abstract":"","PeriodicalId":134939,"journal":{"name":"2008 IEEE Hot Chips 20 Symposium (HCS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116904467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}