Pub Date : 2015-04-02DOI: 10.1109/ICCSP.2015.7322894
Aparna Bhat, Vishwanath Gojanur, Rajeshwari Hegde
The Fourth Generation communication systems have speeds higher than those of 3G and have a more complicated architecture dedicated and defined for handling such voluminous data and to accommodate more users. The architecture also employs a specified protocol stack, software defined network along with their own security issues for wireless applications and remote access. In this paper we are trying to present the protocol stack for the 4G architecture and network, with particular applications directed towards BYOD and Cloud Computing (Virtual Networking).
{"title":"4G protocol and architecture for BYOD over Cloud Computing","authors":"Aparna Bhat, Vishwanath Gojanur, Rajeshwari Hegde","doi":"10.1109/ICCSP.2015.7322894","DOIUrl":"https://doi.org/10.1109/ICCSP.2015.7322894","url":null,"abstract":"The Fourth Generation communication systems have speeds higher than those of 3G and have a more complicated architecture dedicated and defined for handling such voluminous data and to accommodate more users. The architecture also employs a specified protocol stack, software defined network along with their own security issues for wireless applications and remote access. In this paper we are trying to present the protocol stack for the 4G architecture and network, with particular applications directed towards BYOD and Cloud Computing (Virtual Networking).","PeriodicalId":174192,"journal":{"name":"2015 International Conference on Communications and Signal Processing (ICCSP)","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122571474","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-04-02DOI: 10.1109/ICCSP.2015.7322873
Anirudh Ranga
In this paper we try to evaluate the aggregate interference on a primary user caused by random number of cognitive radios (secondary users). Some parameters like path loss, Rayleigh fading and shadowing are also studied. The Moment generating function and gamma approximation are in its exact and approximated form, which are calculated for measurement of interference power.
{"title":"To evaluate aggregate interference for underlay cognitive radio network","authors":"Anirudh Ranga","doi":"10.1109/ICCSP.2015.7322873","DOIUrl":"https://doi.org/10.1109/ICCSP.2015.7322873","url":null,"abstract":"In this paper we try to evaluate the aggregate interference on a primary user caused by random number of cognitive radios (secondary users). Some parameters like path loss, Rayleigh fading and shadowing are also studied. The Moment generating function and gamma approximation are in its exact and approximated form, which are calculated for measurement of interference power.","PeriodicalId":174192,"journal":{"name":"2015 International Conference on Communications and Signal Processing (ICCSP)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122677831","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-04-02DOI: 10.1109/ICCSP.2015.7322692
S. Gupta, Aditya Goel
A new technique is proposed for optical code division multiple accesses for enhancing the security against the eavesdropper. Switching of the pulse spectrum of code is performed between the two users and switching position of the pulse spectrum of code varies from group to group. In this technique every pulse of a code does not have direct information. Code detection probability of individual user decreases against the eavesdropper. The analysis and simulation result compares with the exiting method MQC, RD and MDW code.
{"title":"OCDMA technique with the switching of code between the users for enhancing the security","authors":"S. Gupta, Aditya Goel","doi":"10.1109/ICCSP.2015.7322692","DOIUrl":"https://doi.org/10.1109/ICCSP.2015.7322692","url":null,"abstract":"A new technique is proposed for optical code division multiple accesses for enhancing the security against the eavesdropper. Switching of the pulse spectrum of code is performed between the two users and switching position of the pulse spectrum of code varies from group to group. In this technique every pulse of a code does not have direct information. Code detection probability of individual user decreases against the eavesdropper. The analysis and simulation result compares with the exiting method MQC, RD and MDW code.","PeriodicalId":174192,"journal":{"name":"2015 International Conference on Communications and Signal Processing (ICCSP)","volume":"335 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122750190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-04-02DOI: 10.1109/ICCSP.2015.7322551
Ruchira Shirbhate, T. Panse, Chetan Ralekar
In this paper, a parallel FFT architecture is proposed to give an efficient throughput and less energy consumption with the help of Cooley Tukey algorithm for radix 8. In this algorithm the DFT of N size is divided into smaller sizes of N/2 and repeated until final DFT scalars are found. It divides the DFT in even index and odd index term. The computation time which is calculated by the pre defined formula (Nlog2(N)) is reduced by the use of parallel architecture. Energy is defined as power used per unit time. Parallel architecture helps to perform number of operations simultaneously. As less time is required, the energy is efficiency is increased. The aim of this paper is to check throughput and efficiency using Cooley Tukey algorithm for higher radix. The recent trends of this algorithm is development of FPGA that is Field Programmable Gate Array as it can perform signal processing tasks in parallel, execute pipeline structure as well as speed up the computation of tedious algorithms. The main advantage of Cooley Tukey algorithm is that it reduces arithmetic computations as well as fast processing. As this algorithm divides the DFT into smaller DFTs, it can be combined with any other algorithm simultaneously.
{"title":"Design of parallel FFT architecture using Cooley Tukey algorithm","authors":"Ruchira Shirbhate, T. Panse, Chetan Ralekar","doi":"10.1109/ICCSP.2015.7322551","DOIUrl":"https://doi.org/10.1109/ICCSP.2015.7322551","url":null,"abstract":"In this paper, a parallel FFT architecture is proposed to give an efficient throughput and less energy consumption with the help of Cooley Tukey algorithm for radix 8. In this algorithm the DFT of N size is divided into smaller sizes of N/2 and repeated until final DFT scalars are found. It divides the DFT in even index and odd index term. The computation time which is calculated by the pre defined formula (Nlog2(N)) is reduced by the use of parallel architecture. Energy is defined as power used per unit time. Parallel architecture helps to perform number of operations simultaneously. As less time is required, the energy is efficiency is increased. The aim of this paper is to check throughput and efficiency using Cooley Tukey algorithm for higher radix. The recent trends of this algorithm is development of FPGA that is Field Programmable Gate Array as it can perform signal processing tasks in parallel, execute pipeline structure as well as speed up the computation of tedious algorithms. The main advantage of Cooley Tukey algorithm is that it reduces arithmetic computations as well as fast processing. As this algorithm divides the DFT into smaller DFTs, it can be combined with any other algorithm simultaneously.","PeriodicalId":174192,"journal":{"name":"2015 International Conference on Communications and Signal Processing (ICCSP)","volume":"340 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122545095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-04-02DOI: 10.1109/ICCSP.2015.7322734
Pravin S. Kapgate, S. Gugulothu
Now a day's various real time applications and image processing applications requires hardware that can perform various complex arithmetic operations. These operations can be performed by using binary logarithmic number system. This paper includes binary logarithmic circuit based on FPGA. Above architecture uses combinational logic circuit elements and fixed point data path number format. The architecture is able to calculate the logarithm of integer number, fractional number and integer fractional number. This architecture is designed in Xilinx Virtex-5 device. This architecture consumes minimal FPGA resources that are shown by device utilization summary. Finally error analysis is done which shows that architecture has minimal number of errors considering fractional number and fixed point numbers.
{"title":"Design and implementation of complex arithmetic operations using binary logarithmic number system","authors":"Pravin S. Kapgate, S. Gugulothu","doi":"10.1109/ICCSP.2015.7322734","DOIUrl":"https://doi.org/10.1109/ICCSP.2015.7322734","url":null,"abstract":"Now a day's various real time applications and image processing applications requires hardware that can perform various complex arithmetic operations. These operations can be performed by using binary logarithmic number system. This paper includes binary logarithmic circuit based on FPGA. Above architecture uses combinational logic circuit elements and fixed point data path number format. The architecture is able to calculate the logarithm of integer number, fractional number and integer fractional number. This architecture is designed in Xilinx Virtex-5 device. This architecture consumes minimal FPGA resources that are shown by device utilization summary. Finally error analysis is done which shows that architecture has minimal number of errors considering fractional number and fixed point numbers.","PeriodicalId":174192,"journal":{"name":"2015 International Conference on Communications and Signal Processing (ICCSP)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114190179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-04-02DOI: 10.1109/ICCSP.2015.7322671
Mercy Paul Selvan, A. Shekar, D. R. Babu, A. Teja
This paper is focused on computing importance of a web page in an efficient way. Web page ranking is an essential factor in web search. Many modules and algorithms have been proposed using different resources with different assumptions. The algorithms proposed include Page Rank, Browse Rank, Browse Rank Plus, HITS and many more. Page Rank focuses on ranking a page based on the number of inlinks and outlinks to a page. Whereas Browse Rank focuses on ranking the page based on the value it provides to the user. Several other algorithms have been proposed since, that focuses only on one or two particular factors. This paper proposes ranking a page based on multiple factors that includes reachability, value and user feedback. The major aim is to rank a web page based on these three crucial factors rather than considering one or two factors taken into account by existing methodologies. Every user has a different and unique background and a particular aim when searching for information on the Web. Web search personalization is mainly aimed at tailoring search results to a specific user based on that user's interests and preferences. Major challenges that effective personalized search is affected with includes accurately identifying the user context and organizing the information in such a way that it matches the particular context. An effective mechanism is employed to personalize the search and also to rank the page based on multiple factors.
{"title":"Efficient ranking based on web page importance and personalized search","authors":"Mercy Paul Selvan, A. Shekar, D. R. Babu, A. Teja","doi":"10.1109/ICCSP.2015.7322671","DOIUrl":"https://doi.org/10.1109/ICCSP.2015.7322671","url":null,"abstract":"This paper is focused on computing importance of a web page in an efficient way. Web page ranking is an essential factor in web search. Many modules and algorithms have been proposed using different resources with different assumptions. The algorithms proposed include Page Rank, Browse Rank, Browse Rank Plus, HITS and many more. Page Rank focuses on ranking a page based on the number of inlinks and outlinks to a page. Whereas Browse Rank focuses on ranking the page based on the value it provides to the user. Several other algorithms have been proposed since, that focuses only on one or two particular factors. This paper proposes ranking a page based on multiple factors that includes reachability, value and user feedback. The major aim is to rank a web page based on these three crucial factors rather than considering one or two factors taken into account by existing methodologies. Every user has a different and unique background and a particular aim when searching for information on the Web. Web search personalization is mainly aimed at tailoring search results to a specific user based on that user's interests and preferences. Major challenges that effective personalized search is affected with includes accurately identifying the user context and organizing the information in such a way that it matches the particular context. An effective mechanism is employed to personalize the search and also to rank the page based on multiple factors.","PeriodicalId":174192,"journal":{"name":"2015 International Conference on Communications and Signal Processing (ICCSP)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114482718","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-04-02DOI: 10.1109/ICCSP.2015.7322617
G. Mahesh, S. Sakthivel
This paper mainly focuses on verifying the important features of advanced extensible interface (AXI). Verifying the memory transactions of AXI includes the verification of all the five channels write address, write data, write response, read address and read data. In this work a Verification Intellectual Property cores (VIP) based methodology is used to carry out the verification Process. In the VIP design the entire test environment is modeled using system verilog and the read, write transactions from the same and different memory locations has been verified with the quantitative values of Busy Count, Valid Count and its Bus Utilization. Verifying the System connectivity during write and read cycles is also one of the fundamental features verified in this paper.
{"title":"Verification of memory transactions in AXI protocol using system verilog approach","authors":"G. Mahesh, S. Sakthivel","doi":"10.1109/ICCSP.2015.7322617","DOIUrl":"https://doi.org/10.1109/ICCSP.2015.7322617","url":null,"abstract":"This paper mainly focuses on verifying the important features of advanced extensible interface (AXI). Verifying the memory transactions of AXI includes the verification of all the five channels write address, write data, write response, read address and read data. In this work a Verification Intellectual Property cores (VIP) based methodology is used to carry out the verification Process. In the VIP design the entire test environment is modeled using system verilog and the read, write transactions from the same and different memory locations has been verified with the quantitative values of Busy Count, Valid Count and its Bus Utilization. Verifying the System connectivity during write and read cycles is also one of the fundamental features verified in this paper.","PeriodicalId":174192,"journal":{"name":"2015 International Conference on Communications and Signal Processing (ICCSP)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116743687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-04-02DOI: 10.1109/ICCSP.2015.7322847
P. Jadhav
Monitoring the health of power transformer is important for the reliability of electrical power supply. Conventional tests carried out on power transformers can only detect damage of permanent nature. Frequency Response Analysis (FRA) is found to be a useful tool for reliable detection of incipient mechanical fault in a transformer. There are various methods of evaluating the frequency spectrum to confirm the presence of an incipient fault. In this paper two different mechanical fault are simulated i.e. axial displacements and radial deformations of winding. The lumped parameter model is used to simulate these mechanical faults and detected using TF. Since the TF method is a comparative method and the measured results should be compared with the reference results. A comparison shows that resonance frequency of TF curve depends upon type of fault and location of fault. Quantitative analysis of TFs is done using statistical method correlation coefficient as a complementary method. Therefore it is believed that this finding could be helpful in fault diagnosis in actual power transformer windings.
{"title":"Transformer winding deformation diagnostics techniques with statistical approach","authors":"P. Jadhav","doi":"10.1109/ICCSP.2015.7322847","DOIUrl":"https://doi.org/10.1109/ICCSP.2015.7322847","url":null,"abstract":"Monitoring the health of power transformer is important for the reliability of electrical power supply. Conventional tests carried out on power transformers can only detect damage of permanent nature. Frequency Response Analysis (FRA) is found to be a useful tool for reliable detection of incipient mechanical fault in a transformer. There are various methods of evaluating the frequency spectrum to confirm the presence of an incipient fault. In this paper two different mechanical fault are simulated i.e. axial displacements and radial deformations of winding. The lumped parameter model is used to simulate these mechanical faults and detected using TF. Since the TF method is a comparative method and the measured results should be compared with the reference results. A comparison shows that resonance frequency of TF curve depends upon type of fault and location of fault. Quantitative analysis of TFs is done using statistical method correlation coefficient as a complementary method. Therefore it is believed that this finding could be helpful in fault diagnosis in actual power transformer windings.","PeriodicalId":174192,"journal":{"name":"2015 International Conference on Communications and Signal Processing (ICCSP)","volume":"90 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116836492","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-04-02DOI: 10.1109/ICCSP.2015.7322869
A. Chauhan, R. Ramesh, Usha Kiran K
A broadband electrical metamaterial is proposed in this paper to improve the performance of microstrip antenna. With the help of metamaterial we can improve bandwidth of microstrip antenna as well as miniaturize it. The properties and applications of metamaterial, three half split ring resonator metamaterial and the performance of a system contributing two patch antennas separated by means of a metamaterial based surface at 9.6 GHz for multiple input and multiple output (MIMO) application is explained in this paper. The functioning of two air spaced patch antennas is studied for comparison with that of metamaterial spaced antennas.
{"title":"Efficient method of increase in isolation between patch antennas using metamaterial","authors":"A. Chauhan, R. Ramesh, Usha Kiran K","doi":"10.1109/ICCSP.2015.7322869","DOIUrl":"https://doi.org/10.1109/ICCSP.2015.7322869","url":null,"abstract":"A broadband electrical metamaterial is proposed in this paper to improve the performance of microstrip antenna. With the help of metamaterial we can improve bandwidth of microstrip antenna as well as miniaturize it. The properties and applications of metamaterial, three half split ring resonator metamaterial and the performance of a system contributing two patch antennas separated by means of a metamaterial based surface at 9.6 GHz for multiple input and multiple output (MIMO) application is explained in this paper. The functioning of two air spaced patch antennas is studied for comparison with that of metamaterial spaced antennas.","PeriodicalId":174192,"journal":{"name":"2015 International Conference on Communications and Signal Processing (ICCSP)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129713073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-04-02DOI: 10.1109/ICCSP.2015.7322542
Amol S. Jumde, S. Sonavane, R. Behera
Face detection has become a fundamental task in computer vision and pattern recognition applications. This paper describes a system for face detection using data mining approach. The proposed face detection method is a two phase process comprising of training and detection phase. In the training phase, training image is transformed into an edge and non-edge image. Maximal Frequent Itemset Algorithm (MAFIA) is used to mine positive and negative feature patterns from edge and non-edge images respectively. Based on the feature patterns mined, a face detector is constructed to prune non-face candidates. In the detection phase, sliding window approach is applied to the test image in different scales. Experimental results on FEI face database show good performance even across different orientations, pose and expression variations to a certain extent.
人脸检测已经成为计算机视觉和模式识别应用中的一项基本任务。本文介绍了一种基于数据挖掘的人脸检测系统。所提出的人脸检测方法分为训练和检测两个阶段。在训练阶段，将训练图像变换为边缘图像和非边缘图像。利用最大频繁项集算法(maximum frequency Itemset Algorithm, MAFIA)分别从边缘和非边缘图像中挖掘正、负特征模式。基于所挖掘的特征模式，构造一个人脸检测器来修剪非人脸候选图像。在检测阶段，对不同尺度的测试图像采用滑动窗口方法。在FEI人脸数据库上的实验结果表明，即使在不同的方向、姿态和表情变化下，也有一定程度的良好性能。
{"title":"Face detection using data mining approach","authors":"Amol S. Jumde, S. Sonavane, R. Behera","doi":"10.1109/ICCSP.2015.7322542","DOIUrl":"https://doi.org/10.1109/ICCSP.2015.7322542","url":null,"abstract":"Face detection has become a fundamental task in computer vision and pattern recognition applications. This paper describes a system for face detection using data mining approach. The proposed face detection method is a two phase process comprising of training and detection phase. In the training phase, training image is transformed into an edge and non-edge image. Maximal Frequent Itemset Algorithm (MAFIA) is used to mine positive and negative feature patterns from edge and non-edge images respectively. Based on the feature patterns mined, a face detector is constructed to prune non-face candidates. In the detection phase, sliding window approach is applied to the test image in different scales. Experimental results on FEI face database show good performance even across different orientations, pose and expression variations to a certain extent.","PeriodicalId":174192,"journal":{"name":"2015 International Conference on Communications and Signal Processing (ICCSP)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129024942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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