Pub Date : 1996-06-23DOI: 10.1109/PESC.1996.548551
E. Gatti
Alessandro Volta was a great scientist in the field of electrostatics and with the invention of the pile opened the way to electrodynamics and electromagnetism. This paper presents a biographical record of his life and achievements in the field of electrical phenomena.
{"title":"Alessandro Volta's profile","authors":"E. Gatti","doi":"10.1109/PESC.1996.548551","DOIUrl":"https://doi.org/10.1109/PESC.1996.548551","url":null,"abstract":"Alessandro Volta was a great scientist in the field of electrostatics and with the invention of the pile opened the way to electrodynamics and electromagnetism. This paper presents a biographical record of his life and achievements in the field of electrical phenomena.","PeriodicalId":19979,"journal":{"name":"PESC Record. 27th Annual IEEE Power Electronics Specialists Conference","volume":"1 1","pages":"3-6 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1996-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79798815","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-06-23DOI: 10.1109/PESC.1996.548625
L. Morán, R. Oyarzun, I. Pastorini, J. Dixon, R. Wallace
A protection scheme for series active power filters is presented and analyzed in this paper. The proposed scheme protects series active power filters when short-circuit faults occur in the power distribution system. The principal protection element is a varistor, which is connected in parallel to the secondary of each current transformer. The current transformers used to connect the active power filter present a low magnetic saturation characteristic increasing current ratio error when high currents circulate through the primary winding, thus generating lower secondary currents. In this way, the power dissipated by the varistors is significantly reduced. After few cycles of short-circuit currents flowing through the varistor the gating signals applied to the active power filter switches are removed and the PWM voltage-source inverter is short circuited through a couple of antiparallel thyristors.
{"title":"A fault protection scheme for series active power filters","authors":"L. Morán, R. Oyarzun, I. Pastorini, J. Dixon, R. Wallace","doi":"10.1109/PESC.1996.548625","DOIUrl":"https://doi.org/10.1109/PESC.1996.548625","url":null,"abstract":"A protection scheme for series active power filters is presented and analyzed in this paper. The proposed scheme protects series active power filters when short-circuit faults occur in the power distribution system. The principal protection element is a varistor, which is connected in parallel to the secondary of each current transformer. The current transformers used to connect the active power filter present a low magnetic saturation characteristic increasing current ratio error when high currents circulate through the primary winding, thus generating lower secondary currents. In this way, the power dissipated by the varistors is significantly reduced. After few cycles of short-circuit currents flowing through the varistor the gating signals applied to the active power filter switches are removed and the PWM voltage-source inverter is short circuited through a couple of antiparallel thyristors.","PeriodicalId":19979,"journal":{"name":"PESC Record. 27th Annual IEEE Power Electronics Specialists Conference","volume":"7 1","pages":"489-493 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1996-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84379631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-06-23DOI: 10.1109/PESC.1996.548852
J. Mahdavi, M. Tabandeh, A. Shahriari
Low frequency harmonics injection into AC power supply and small power factor are the main disadvantages of conventional AC/DC converters. By using current mode control, the converter can be designed such that its input current have a sinusoidal form and in phase with the power supply voltage. By solving the problem of power factor with high frequency switching current mode control, another problem arises; that of high frequency harmonics generated in radiofrequency (RF) range by the power converter. In this paper, an AC/DC power converter with fixed topology (diode bridge+boost converter) is used and various current control methods are applied to it. After simulating the converter behavior and also using the simulation of a standard network; "line impedance stabilization network", (LISN), placed between the AC power supply and the converter, the conducted RF noise is computed. Finally, laboratory experimental results were compared with simulation results.
{"title":"Comparison of conducted RFI emission from different unity power factor AC/DC converters","authors":"J. Mahdavi, M. Tabandeh, A. Shahriari","doi":"10.1109/PESC.1996.548852","DOIUrl":"https://doi.org/10.1109/PESC.1996.548852","url":null,"abstract":"Low frequency harmonics injection into AC power supply and small power factor are the main disadvantages of conventional AC/DC converters. By using current mode control, the converter can be designed such that its input current have a sinusoidal form and in phase with the power supply voltage. By solving the problem of power factor with high frequency switching current mode control, another problem arises; that of high frequency harmonics generated in radiofrequency (RF) range by the power converter. In this paper, an AC/DC power converter with fixed topology (diode bridge+boost converter) is used and various current control methods are applied to it. After simulating the converter behavior and also using the simulation of a standard network; \"line impedance stabilization network\", (LISN), placed between the AC power supply and the converter, the conducted RF noise is computed. Finally, laboratory experimental results were compared with simulation results.","PeriodicalId":19979,"journal":{"name":"PESC Record. 27th Annual IEEE Power Electronics Specialists Conference","volume":"8 1","pages":"1979-1985 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1996-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84703279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-06-23DOI: 10.1109/PESC.1996.548561
L. Barbosa, J. Vieira, L. D. de Freitas, M. Vilela, V. J. Farias
High switching frequency associated to soft commutation techniques is a trend in switching converters. Following this trend a buck PWM converter is presented. The DC voltage conversion ratio of this converter has a quadratic dependence on duty-cycle, providing a large step-down. This new buck quadratic PWM soft-single-switched converter, having only a single active switch, provides high efficient operating condition for wide load range at high switching frequency. In order to illustrate the operating principle of this new converter a detailed study, including theoretical analysis, relevant equations and simulation and experimental results is carried out.
{"title":"A buck quadratic PWM soft-switching converter using a single active switch","authors":"L. Barbosa, J. Vieira, L. D. de Freitas, M. Vilela, V. J. Farias","doi":"10.1109/PESC.1996.548561","DOIUrl":"https://doi.org/10.1109/PESC.1996.548561","url":null,"abstract":"High switching frequency associated to soft commutation techniques is a trend in switching converters. Following this trend a buck PWM converter is presented. The DC voltage conversion ratio of this converter has a quadratic dependence on duty-cycle, providing a large step-down. This new buck quadratic PWM soft-single-switched converter, having only a single active switch, provides high efficient operating condition for wide load range at high switching frequency. In order to illustrate the operating principle of this new converter a detailed study, including theoretical analysis, relevant equations and simulation and experimental results is carried out.","PeriodicalId":19979,"journal":{"name":"PESC Record. 27th Annual IEEE Power Electronics Specialists Conference","volume":"46 1","pages":"69-75 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1996-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84879422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-06-23DOI: 10.1109/PESC.1996.548788
E. Levi, M. Sokola, A. Boglietti, M. Pastorelli
Iron loss, as a source of detuned operation of rotor flux oriented induction machines, has attracted much attention. Appropriate mathematical expressions, that enable evaluation of detuning, have become available and performance deterioration due to iron loss has been evaluated for rated speed operation in the constant flux region. The available studies are based on the measurement of iron loss with sinusoidal supply of rated frequency. This paper at first describes an experimental procedure for determination of iron loss and hence an equivalent iron loss resistance over the frequency range of interest. The procedure is based on no-load tests with PWM inverter supply and it can be executed during commissioning of the drive. The second part of the paper evaluates detuning introduced by iron loss in a rotor flux oriented induction machine, utilising the experimentally determined values of equivalent iron loss resistance. The emphasis is placed on operation in the braking region and on operation in the field weakening region. It is shown that detuning characteristics in the braking region differ from those valid in the motoring region. Detuning in the field-weakening region is found to significantly exceed the one at rated flux, rated speed operation, especially if the machine runs at high speeds with light loads. Finally, a modified rotor flux estimator, that enables compensation of the iron loss, is introduced and verified by simulation.
{"title":"Iron loss identification and detuning evaluation in rotor flux oriented induction machines","authors":"E. Levi, M. Sokola, A. Boglietti, M. Pastorelli","doi":"10.1109/PESC.1996.548788","DOIUrl":"https://doi.org/10.1109/PESC.1996.548788","url":null,"abstract":"Iron loss, as a source of detuned operation of rotor flux oriented induction machines, has attracted much attention. Appropriate mathematical expressions, that enable evaluation of detuning, have become available and performance deterioration due to iron loss has been evaluated for rated speed operation in the constant flux region. The available studies are based on the measurement of iron loss with sinusoidal supply of rated frequency. This paper at first describes an experimental procedure for determination of iron loss and hence an equivalent iron loss resistance over the frequency range of interest. The procedure is based on no-load tests with PWM inverter supply and it can be executed during commissioning of the drive. The second part of the paper evaluates detuning introduced by iron loss in a rotor flux oriented induction machine, utilising the experimentally determined values of equivalent iron loss resistance. The emphasis is placed on operation in the braking region and on operation in the field weakening region. It is shown that detuning characteristics in the braking region differ from those valid in the motoring region. Detuning in the field-weakening region is found to significantly exceed the one at rated flux, rated speed operation, especially if the machine runs at high speeds with light loads. Finally, a modified rotor flux estimator, that enables compensation of the iron loss, is introduced and verified by simulation.","PeriodicalId":19979,"journal":{"name":"PESC Record. 27th Annual IEEE Power Electronics Specialists Conference","volume":"9 1","pages":"1555-1561 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1996-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82512599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-06-23DOI: 10.1109/PESC.1996.548827
R. Krishnan
A new converter topology for switched reluctance motor drives is proposed in this paper. It has the advantages of minimum number of power switching devices, same voltage rating for all of them, variable DC link voltage for application to the motor windings to reduce the switching frequency of the phase switches and hence the switching and core losses but higher and fixed DC link voltage for faster commutation of phase currents. The converter provides a full four quadrant operation with the advantageous and important control features of independent energization and commutation of each phase winding. Further it requires no snubbing for its phase switches and only a minimum set of logic power supplies as all the phase switches have the same common. It has the disadvantages of requiring a chopper section with its attendant passive filter for reducing the DC link voltage for motor winding application. It is found that it is superior to many other (m+1) switch configurations, where m is the number of machine phases, due to the advantages described earlier. The principle of operation, modes of operation, design of the chopper stage, performance constraints and evaluation of the commutation time and rise in the source capacitor voltage for design of the machine side converter, merits and demerits of the proposed converter topology for the switched reluctance motor drives are systematically developed in this paper.
{"title":"A novel converter topology for switched reluctance motor drives","authors":"R. Krishnan","doi":"10.1109/PESC.1996.548827","DOIUrl":"https://doi.org/10.1109/PESC.1996.548827","url":null,"abstract":"A new converter topology for switched reluctance motor drives is proposed in this paper. It has the advantages of minimum number of power switching devices, same voltage rating for all of them, variable DC link voltage for application to the motor windings to reduce the switching frequency of the phase switches and hence the switching and core losses but higher and fixed DC link voltage for faster commutation of phase currents. The converter provides a full four quadrant operation with the advantageous and important control features of independent energization and commutation of each phase winding. Further it requires no snubbing for its phase switches and only a minimum set of logic power supplies as all the phase switches have the same common. It has the disadvantages of requiring a chopper section with its attendant passive filter for reducing the DC link voltage for motor winding application. It is found that it is superior to many other (m+1) switch configurations, where m is the number of machine phases, due to the advantages described earlier. The principle of operation, modes of operation, design of the chopper stage, performance constraints and evaluation of the commutation time and rise in the source capacitor voltage for design of the machine side converter, merits and demerits of the proposed converter topology for the switched reluctance motor drives are systematically developed in this paper.","PeriodicalId":19979,"journal":{"name":"PESC Record. 27th Annual IEEE Power Electronics Specialists Conference","volume":"8 1","pages":"1811-1816 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1996-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80860534","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-06-23DOI: 10.1109/PESC.1996.548646
N. McNeill, S. Finney, B. Williams
This paper addresses the need for negative gate bias with IGBT devices that experience a dv/dt when in the off-state. Factors considered include gate bias voltage, gate impedance, reapplied dv/dt and case temperature. Experimental results for a high-voltage high-current IGBT support the assessment of these factors.
{"title":"Assessment of off-state negative gate voltage requirements for IGBTs","authors":"N. McNeill, S. Finney, B. Williams","doi":"10.1109/PESC.1996.548646","DOIUrl":"https://doi.org/10.1109/PESC.1996.548646","url":null,"abstract":"This paper addresses the need for negative gate bias with IGBT devices that experience a dv/dt when in the off-state. Factors considered include gate bias voltage, gate impedance, reapplied dv/dt and case temperature. Experimental results for a high-voltage high-current IGBT support the assessment of these factors.","PeriodicalId":19979,"journal":{"name":"PESC Record. 27th Annual IEEE Power Electronics Specialists Conference","volume":"166 12 Suppl 1","pages":"627-630 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1996-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83343210","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-06-23DOI: 10.1109/PESC.1996.548601
S. Rehman, D.G. Taylor
Various sources of error inherent to most switched reluctance (SR) motor position estimation schemes are identified, and their effects on estimation accuracy are quantified. Several numerical techniques are explored for their role in reducing the position estimation errors. Design guidelines for various motor design parameters, which can enhance the accuracy of any position estimation algorithm, are also presented.
{"title":"Issues in position estimation of SR motors","authors":"S. Rehman, D.G. Taylor","doi":"10.1109/PESC.1996.548601","DOIUrl":"https://doi.org/10.1109/PESC.1996.548601","url":null,"abstract":"Various sources of error inherent to most switched reluctance (SR) motor position estimation schemes are identified, and their effects on estimation accuracy are quantified. Several numerical techniques are explored for their role in reducing the position estimation errors. Design guidelines for various motor design parameters, which can enhance the accuracy of any position estimation algorithm, are also presented.","PeriodicalId":19979,"journal":{"name":"PESC Record. 27th Annual IEEE Power Electronics Specialists Conference","volume":"1 1","pages":"337-343 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1996-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82788734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-06-23DOI: 10.1109/PESC.1996.548774
M. Albach, T. Durbaum, Philip
This paper presents a practical method for predicting the core losses in magnetic components for an arbitrary shape of the magnetizing current. This theory is based on a weighted time derivative of the magnetic flux density and offers the possibility to use the suppliers data, normally derived from measurements with sinewave currents, also for the real current shapes occurring in switch mode power supplies. By means of a special full-bridge power converter, a test setup is developed that allows the verification of the equations derived in this paper.
{"title":"Calculating core losses in transformers for arbitrary magnetizing currents a comparison of different approaches","authors":"M. Albach, T. Durbaum, Philip","doi":"10.1109/PESC.1996.548774","DOIUrl":"https://doi.org/10.1109/PESC.1996.548774","url":null,"abstract":"This paper presents a practical method for predicting the core losses in magnetic components for an arbitrary shape of the magnetizing current. This theory is based on a weighted time derivative of the magnetic flux density and offers the possibility to use the suppliers data, normally derived from measurements with sinewave currents, also for the real current shapes occurring in switch mode power supplies. By means of a special full-bridge power converter, a test setup is developed that allows the verification of the equations derived in this paper.","PeriodicalId":19979,"journal":{"name":"PESC Record. 27th Annual IEEE Power Electronics Specialists Conference","volume":"11 1","pages":"1463-1468 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1996-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89234956","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1996-06-23DOI: 10.1109/PESC.1996.548745
F. Blaabjerg, J. Pedersen
This paper defines optimized design of power electronic circuits and uses the concept of a complete three-phase inverter. The optimization is done in order to obtain maximum efficiency by changing the gate-drive conditions like gate-resistances and gate-drive supply. Another optimization is done where the thermal behaviour of the diode and the IGBT is taken into account. A loss model of a complete three-phase inverter is developed, and simulation results show that different optimization points can be calculated and used for a design. Based on known data for the IGBTs and the diodes, the inverter circuit, the outputs of the optimizer are two gate-drive resistances, a gate-drive supply, and a load current which give the inverter the highest efficiency. It is concluded the optimization points of the inverter design are different when the optimization criteria change. The highest load current is found for the inverter when the thermal effects are included.
{"title":"Optimized design of a complete three-phase PWM-VS inverter","authors":"F. Blaabjerg, J. Pedersen","doi":"10.1109/PESC.1996.548745","DOIUrl":"https://doi.org/10.1109/PESC.1996.548745","url":null,"abstract":"This paper defines optimized design of power electronic circuits and uses the concept of a complete three-phase inverter. The optimization is done in order to obtain maximum efficiency by changing the gate-drive conditions like gate-resistances and gate-drive supply. Another optimization is done where the thermal behaviour of the diode and the IGBT is taken into account. A loss model of a complete three-phase inverter is developed, and simulation results show that different optimization points can be calculated and used for a design. Based on known data for the IGBTs and the diodes, the inverter circuit, the outputs of the optimizer are two gate-drive resistances, a gate-drive supply, and a load current which give the inverter the highest efficiency. It is concluded the optimization points of the inverter design are different when the optimization criteria change. The highest load current is found for the inverter when the thermal effects are included.","PeriodicalId":19979,"journal":{"name":"PESC Record. 27th Annual IEEE Power Electronics Specialists Conference","volume":"11 1","pages":"1272-1280 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1996-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89897177","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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