Pub Date : 1992-06-23DOI: 10.1109/IWRSP.1992.243908
Yuan-Tsong Chen, M. Tanik
Three axioms for functional complexity of software are proposed. The first axiom asserts that functional complexity is a function and is computable at the specification level. The second axiom argues that an empty specification has zero functional complexity. The third axiom asserts that a harder specification has no less functional complexity than an easier one. With these three axioms and various definitions of the notions of functional complexity, a number of theorems are proved. Code metrics, including statement count, M. Halstead's (1977) programming effort, and T. McCabe's cyclomatic number are reviewed, together with specification metrics including L. Hellerman's (1972) metric, D. Schutt's (1977) metric, N. Coulter's (1987) metric, and A. Albrecht's (1983) functional point. These metrics are evaluated with respect to the three axioms. Results show that code metrics do not satisfy these axioms, while Hellerman, Schutt, and Coulter metrics do.<>
{"title":"An axiomatic approach of software functionality measure","authors":"Yuan-Tsong Chen, M. Tanik","doi":"10.1109/IWRSP.1992.243908","DOIUrl":"https://doi.org/10.1109/IWRSP.1992.243908","url":null,"abstract":"Three axioms for functional complexity of software are proposed. The first axiom asserts that functional complexity is a function and is computable at the specification level. The second axiom argues that an empty specification has zero functional complexity. The third axiom asserts that a harder specification has no less functional complexity than an easier one. With these three axioms and various definitions of the notions of functional complexity, a number of theorems are proved. Code metrics, including statement count, M. Halstead's (1977) programming effort, and T. McCabe's cyclomatic number are reviewed, together with specification metrics including L. Hellerman's (1972) metric, D. Schutt's (1977) metric, N. Coulter's (1987) metric, and A. Albrecht's (1983) functional point. These metrics are evaluated with respect to the three axioms. Results show that code metrics do not satisfy these axioms, while Hellerman, Schutt, and Coulter metrics do.<<ETX>>","PeriodicalId":210681,"journal":{"name":"[1992 Proceedings] The Third International Workshop on Rapid System Prototyping","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124791134","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-06-23DOI: 10.1109/IWRSP.1992.243910
T. Conte, Wen-mei W. Hwu
It is argued that the correct solution to the computer architecture design process is a prototyping approach. In this approach, the initial design is selected using the workload itself. This design is an architectural prototype, specifying the high-level design decisions that are difficult to acquire via detailed simulation. These design decisions include determining the mix of function units in the execution stage of the processor and the dimensions of the caches in the memory subsystem. Architectural prototypes are selected by trading off accuracy in hardware simulation for an increase in usable workload size.<>
{"title":"Systematic prototyping of superscalar computer architectures","authors":"T. Conte, Wen-mei W. Hwu","doi":"10.1109/IWRSP.1992.243910","DOIUrl":"https://doi.org/10.1109/IWRSP.1992.243910","url":null,"abstract":"It is argued that the correct solution to the computer architecture design process is a prototyping approach. In this approach, the initial design is selected using the workload itself. This design is an architectural prototype, specifying the high-level design decisions that are difficult to acquire via detailed simulation. These design decisions include determining the mix of function units in the execution stage of the processor and the dimensions of the caches in the memory subsystem. Architectural prototypes are selected by trading off accuracy in hardware simulation for an increase in usable workload size.<<ETX>>","PeriodicalId":210681,"journal":{"name":"[1992 Proceedings] The Third International Workshop on Rapid System Prototyping","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124188533","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-06-23DOI: 10.1109/IWRSP.1992.243912
B. Fagin, Pichet Chintrakulchai
The prototyping of a functioning DLX microprocessor, based on the 32-b instruction set architecture developed by D. Patterson and J. Hennessy (in Computer Architecture: A Quantitative Approach, 1990), is described. This architecture is an emerging academic standard but has yet to be successfully prototyped. An implementation of DLX as a 12-in*15-in two-layer circuit board, containing 59 chips and running on a 2-MHz clock, is described. The execution of DLX programs and the problems encountered are discussed.<>
{"title":"Prototyping the DLX microprocessor","authors":"B. Fagin, Pichet Chintrakulchai","doi":"10.1109/IWRSP.1992.243912","DOIUrl":"https://doi.org/10.1109/IWRSP.1992.243912","url":null,"abstract":"The prototyping of a functioning DLX microprocessor, based on the 32-b instruction set architecture developed by D. Patterson and J. Hennessy (in Computer Architecture: A Quantitative Approach, 1990), is described. This architecture is an emerging academic standard but has yet to be successfully prototyped. An implementation of DLX as a 12-in*15-in two-layer circuit board, containing 59 chips and running on a 2-MHz clock, is described. The execution of DLX programs and the problems encountered are discussed.<<ETX>>","PeriodicalId":210681,"journal":{"name":"[1992 Proceedings] The Third International Workshop on Rapid System Prototyping","volume":"179 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128907359","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-06-23DOI: 10.1109/IWRSP.1992.243907
A. Khwaja, J. E. Urban
Descartes is an executable specification language that supports the rapid prototyping of partial through complete software specifications. A technique developed to represent Descartes executable specifications visually by adapting the charts of I. Nassi and B. Shneiderman (1973), is described. Symbols are identified for the data structuring methods and the rationale for selecting these symbols is discussed. The benefits gained in moving a graphical technique up to the front end of the software life cycle are discussed. Sample specifications are included to illustrate the effectiveness of the technique.<>
{"title":"Adaptation and modification of Nassi-Shneiderman charts to represent Descartes specifications visually","authors":"A. Khwaja, J. E. Urban","doi":"10.1109/IWRSP.1992.243907","DOIUrl":"https://doi.org/10.1109/IWRSP.1992.243907","url":null,"abstract":"Descartes is an executable specification language that supports the rapid prototyping of partial through complete software specifications. A technique developed to represent Descartes executable specifications visually by adapting the charts of I. Nassi and B. Shneiderman (1973), is described. Symbols are identified for the data structuring methods and the rationale for selecting these symbols is discussed. The benefits gained in moving a graphical technique up to the front end of the software life cycle are discussed. Sample specifications are included to illustrate the effectiveness of the technique.<<ETX>>","PeriodicalId":210681,"journal":{"name":"[1992 Proceedings] The Third International Workshop on Rapid System Prototyping","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132743615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-06-23DOI: 10.1109/IWRSP.1992.243902
S. Srinivasan, Ambar Sarkar, R. Waxman, Barry W. Johnson
There are two important early stages in the design of complex systems: modeling of the system (operational) specification, and modeling of the system performance. A link between operation specification and performance modeling via VHDL (VHSIC hardware description language) is proposed, and it is shown by an example how the models can be made to interact, yielding a synergy leading to design efficiency and accuracy. The usefulness of such a link is justified by an example.<>
{"title":"Integrating operational specification and performance modeling","authors":"S. Srinivasan, Ambar Sarkar, R. Waxman, Barry W. Johnson","doi":"10.1109/IWRSP.1992.243902","DOIUrl":"https://doi.org/10.1109/IWRSP.1992.243902","url":null,"abstract":"There are two important early stages in the design of complex systems: modeling of the system (operational) specification, and modeling of the system performance. A link between operation specification and performance modeling via VHDL (VHSIC hardware description language) is proposed, and it is shown by an example how the models can be made to interact, yielding a synergy leading to design efficiency and accuracy. The usefulness of such a link is justified by an example.<<ETX>>","PeriodicalId":210681,"journal":{"name":"[1992 Proceedings] The Third International Workshop on Rapid System Prototyping","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124097310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-06-23DOI: 10.1109/IWRSP.1992.243901
J. G. Shea, R. Ragade, J. W. Dunn
A simulation testbed architecture which is particularly amenable to rapid-prototyping applications is described. It comprises a three-tier modular hybrid simulator made up of actual system components, conventional numeric functional simulation models, and a set of behavioral knowledge-based representations which model hardware and software functions in terms of functional states, inputs and outputs. The simulation modules are strongly linked and embedded in an object-oriented knowledge-capture and design-representation architecture. The system provides a flexible, reconfigurable model-building and scenario-based simulation environment. The requirements analysis process which led to the development of the concept and the major testbed components are discussed. The object-oriented modeling techniques and frame-based data structure which support the rapid-prototyping capabilities of the testbed and the interactive capabilities of the system are described.<>
{"title":"Rapid prototyping using object-oriented modeling and testbed simulation for complex real-time systems","authors":"J. G. Shea, R. Ragade, J. W. Dunn","doi":"10.1109/IWRSP.1992.243901","DOIUrl":"https://doi.org/10.1109/IWRSP.1992.243901","url":null,"abstract":"A simulation testbed architecture which is particularly amenable to rapid-prototyping applications is described. It comprises a three-tier modular hybrid simulator made up of actual system components, conventional numeric functional simulation models, and a set of behavioral knowledge-based representations which model hardware and software functions in terms of functional states, inputs and outputs. The simulation modules are strongly linked and embedded in an object-oriented knowledge-capture and design-representation architecture. The system provides a flexible, reconfigurable model-building and scenario-based simulation environment. The requirements analysis process which led to the development of the concept and the major testbed components are discussed. The object-oriented modeling techniques and frame-based data structure which support the rapid-prototyping capabilities of the testbed and the interactive capabilities of the system are described.<<ETX>>","PeriodicalId":210681,"journal":{"name":"[1992 Proceedings] The Third International Workshop on Rapid System Prototyping","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121070753","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-06-23DOI: 10.1109/IWRSP.1992.243917
Luqi
The ability of various types of computer-aided prototyping environments to speed up prototyping and help the analysts formulate, understand, and communicate the properties of proposed systems to potential users of those systems, and to integrate smoothly with tools for optimizing and refining the prototype design into a production-quality software product, is examined. Comparisons of software prototyping with system prototyping and of throw-away with evolutionary prototyping are given. The technologies which support prototyping, i.e., prototyping languages, software reuse, designed interfaces, and decision support, are described.<>
{"title":"Computer aided system prototyping","authors":"Luqi","doi":"10.1109/IWRSP.1992.243917","DOIUrl":"https://doi.org/10.1109/IWRSP.1992.243917","url":null,"abstract":"The ability of various types of computer-aided prototyping environments to speed up prototyping and help the analysts formulate, understand, and communicate the properties of proposed systems to potential users of those systems, and to integrate smoothly with tools for optimizing and refining the prototype design into a production-quality software product, is examined. Comparisons of software prototyping with system prototyping and of throw-away with evolutionary prototyping are given. The technologies which support prototyping, i.e., prototyping languages, software reuse, designed interfaces, and decision support, are described.<<ETX>>","PeriodicalId":210681,"journal":{"name":"[1992 Proceedings] The Third International Workshop on Rapid System Prototyping","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114374544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-06-23DOI: 10.1109/IWRSP.1992.243915
Didier Buchs, Jacques Flumet, P. Racloz
The techniques and the tools developed to produce prototypes from CO-OPN (concurrent object-oriented Petri net) specifications are described. CO-OPN is a specification language for the description of concurrent aspects and data-structure aspects of computer programs in an abstract way. The concurrent part of the formalism is described with Petri nets, while the data aspects are described with algebraic abstract data types. In CO-OPN, this association is structured by the object notion. For prototyping such a formalism, a fully operational semantics is required. The semantics is given for the simulation tools that have been developed. An editor and an environment for executing CO-OPN specifications have been developed. The specifications are prototyped using a translation of the specifications into Prolog.<>
{"title":"Producing prototypes from CO-OPN specifications","authors":"Didier Buchs, Jacques Flumet, P. Racloz","doi":"10.1109/IWRSP.1992.243915","DOIUrl":"https://doi.org/10.1109/IWRSP.1992.243915","url":null,"abstract":"The techniques and the tools developed to produce prototypes from CO-OPN (concurrent object-oriented Petri net) specifications are described. CO-OPN is a specification language for the description of concurrent aspects and data-structure aspects of computer programs in an abstract way. The concurrent part of the formalism is described with Petri nets, while the data aspects are described with algebraic abstract data types. In CO-OPN, this association is structured by the object notion. For prototyping such a formalism, a fully operational semantics is required. The semantics is given for the simulation tools that have been developed. An editor and an environment for executing CO-OPN specifications have been developed. The specifications are prototyped using a translation of the specifications into Prolog.<<ETX>>","PeriodicalId":210681,"journal":{"name":"[1992 Proceedings] The Third International Workshop on Rapid System Prototyping","volume":"22 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121001343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-06-23DOI: 10.1109/IWRSP.1992.243918
A. Dollas, Scott L. Crutchfield
The use of the Teamwork computer-aided software engineering (CASE) environment in a hardware application is examined. Teamwork is used to capture and maintain the specifications of a real-time image processing system under development at Duke University. It is demonstrated that when coupled with appropriate methodology, Teamwork can be used in hardware projects. The strengths and weaknesses of this approach are identified. The requirements for similar environments to overcome some of the problems encountered are outlined.<>
{"title":"An evaluation of the Teamwork CASE environment for specifications capture of hardware systems","authors":"A. Dollas, Scott L. Crutchfield","doi":"10.1109/IWRSP.1992.243918","DOIUrl":"https://doi.org/10.1109/IWRSP.1992.243918","url":null,"abstract":"The use of the Teamwork computer-aided software engineering (CASE) environment in a hardware application is examined. Teamwork is used to capture and maintain the specifications of a real-time image processing system under development at Duke University. It is demonstrated that when coupled with appropriate methodology, Teamwork can be used in hardware projects. The strengths and weaknesses of this approach are identified. The requirements for similar environments to overcome some of the problems encountered are outlined.<<ETX>>","PeriodicalId":210681,"journal":{"name":"[1992 Proceedings] The Third International Workshop on Rapid System Prototyping","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116204653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-06-23DOI: 10.1109/IWRSP.1992.243903
E. Doberkat, W. Hasselbring, W. Franke, U. Lammers, Ulrich Gutenbeil, C. Pahl
The prototyping language ProSET (Prototyping with Sets) for experimental and evolutionary prototyping is discussed, with emphasis on algorithm design. Its features include generative communication, flexible exception handling, and the integration of persistence. Issues pertaining to the compiler and the programming environment are discussed.<>
讨论了实验型和进化型原型设计的原型语言ProSET (prototyping with Sets)，重点讨论了算法设计。它的特性包括生成式通信、灵活的异常处理和持久性的集成。讨论了与编译器和编程环境有关的问题
{"title":"ProSet-a language for prototyping with sets","authors":"E. Doberkat, W. Hasselbring, W. Franke, U. Lammers, Ulrich Gutenbeil, C. Pahl","doi":"10.1109/IWRSP.1992.243903","DOIUrl":"https://doi.org/10.1109/IWRSP.1992.243903","url":null,"abstract":"The prototyping language ProSET (Prototyping with Sets) for experimental and evolutionary prototyping is discussed, with emphasis on algorithm design. Its features include generative communication, flexible exception handling, and the integration of persistence. Issues pertaining to the compiler and the programming environment are discussed.<<ETX>>","PeriodicalId":210681,"journal":{"name":"[1992 Proceedings] The Third International Workshop on Rapid System Prototyping","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133617855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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