Pub Date : 2017-11-01DOI: 10.1109/AIEEE.2017.8270544
Marijan Jurgo, R. Navickas
In this paper parameters of time to digital converter (TDC), which is often used as phase detector in all-digital frequency synthesizers, designed in 65 nm and 0.13 μm CMOS integrated circuit technologies, were analyzed. The structure of the designed TDC is a variety of 2D Vernier time to digital converter, based on gated ring oscillators. Performance of these oscillators has biggest impact on resolution of TDC. Therefore, oscillators were simulated using analog approach using Cadence integrated circuit design software. Simulations were carried out in nominal (1.2 V, 40 °C, typical transistor models), worst (1.1 V, 40 °C, slow transistor models) and best (1.3 V, −40 °C, fast transistor models) operation conditions. In the nominal operation conditions, the frequency of gated ring oscillator can be tuned from 0.68 GHz to 3.38 GHz and from 0.33 GHz to 0.71 GHz respectively in 65 nm and 0.13 μm technology. The delay of single stage can be changed from 491 ps to 98 ps and from 1.013 ns to 0.466 ns respectively in 65 nm and 0.13 μm CMOS. At least 3 and 5 sections of oscillator need to be enabled respectively in 65 nm and 0.13 μm CMOS for oscillator to start. Tuning step of oscillator's stage delay, which corresponds to resolution of TDC, in nominal operating conditions can be changed from 3.4 ps to 0.8 ps and from 5.8 ps to 1.1 ps respectively in 65 nm and 0.13 μm CMOS, when number of enabled oscillator's sections is changed from 20 to 48. Total area of silicon occupied by TDC is 123 μm × 148.8 μm in 65 nm CMOS technology and 244.2 μm × 295.8 μm in 0.13 μm CMOS technology.
{"title":"Comparison of TDC parameters in 65 nm and 0.13 μm CMOS","authors":"Marijan Jurgo, R. Navickas","doi":"10.1109/AIEEE.2017.8270544","DOIUrl":"https://doi.org/10.1109/AIEEE.2017.8270544","url":null,"abstract":"In this paper parameters of time to digital converter (TDC), which is often used as phase detector in all-digital frequency synthesizers, designed in 65 nm and 0.13 μm CMOS integrated circuit technologies, were analyzed. The structure of the designed TDC is a variety of 2D Vernier time to digital converter, based on gated ring oscillators. Performance of these oscillators has biggest impact on resolution of TDC. Therefore, oscillators were simulated using analog approach using Cadence integrated circuit design software. Simulations were carried out in nominal (1.2 V, 40 °C, typical transistor models), worst (1.1 V, 40 °C, slow transistor models) and best (1.3 V, −40 °C, fast transistor models) operation conditions. In the nominal operation conditions, the frequency of gated ring oscillator can be tuned from 0.68 GHz to 3.38 GHz and from 0.33 GHz to 0.71 GHz respectively in 65 nm and 0.13 μm technology. The delay of single stage can be changed from 491 ps to 98 ps and from 1.013 ns to 0.466 ns respectively in 65 nm and 0.13 μm CMOS. At least 3 and 5 sections of oscillator need to be enabled respectively in 65 nm and 0.13 μm CMOS for oscillator to start. Tuning step of oscillator's stage delay, which corresponds to resolution of TDC, in nominal operating conditions can be changed from 3.4 ps to 0.8 ps and from 5.8 ps to 1.1 ps respectively in 65 nm and 0.13 μm CMOS, when number of enabled oscillator's sections is changed from 20 to 48. Total area of silicon occupied by TDC is 123 μm × 148.8 μm in 65 nm CMOS technology and 244.2 μm × 295.8 μm in 0.13 μm CMOS technology.","PeriodicalId":224275,"journal":{"name":"2017 5th IEEE Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129214438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-11-01DOI: 10.1109/AIEEE.2017.8270535
J. Glagolevs, Kārlis Freivalds
In this paper we present a study of logo detection in images from a media agency. We compare two most widely used methods — HOG and SIFT on a challenging dataset of images arising from a printed press and news portals. Despite common opinion that SIFT method is superior, our results show that HOG method performs significantly better on our dataset. We augment the HOG method with image resizing and rotation to improve its performance even more. We found out that by using such approach it is possible to obtain good results with increased recall and reasonably decreased precision.
{"title":"Logo detection in images using HOG and SIFT","authors":"J. Glagolevs, Kārlis Freivalds","doi":"10.1109/AIEEE.2017.8270535","DOIUrl":"https://doi.org/10.1109/AIEEE.2017.8270535","url":null,"abstract":"In this paper we present a study of logo detection in images from a media agency. We compare two most widely used methods — HOG and SIFT on a challenging dataset of images arising from a printed press and news portals. Despite common opinion that SIFT method is superior, our results show that HOG method performs significantly better on our dataset. We augment the HOG method with image resizing and rotation to improve its performance even more. We found out that by using such approach it is possible to obtain good results with increased recall and reasonably decreased precision.","PeriodicalId":224275,"journal":{"name":"2017 5th IEEE Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130189662","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-11-01DOI: 10.1109/AIEEE.2017.8270524
Lida Kouhalvandi, Sercan Aygün, Gökhan Güneş Özdemir, Ece Olcay Günes
Nowadays, in all modern electronic devices a low voltage with high speed comparator plays an important role in overall performance of the systems. This paper describes the implementation of a high-speed comparator with high-resolution, 10-bit, in 0.18pM CMOS technology drawn from a 1.8 V supply which is suitable for analog-to-digital converter (ADC) applications and for electronic industry. An offset cancellation technique is done and tested in order to decrease the offset and kickback noise. Regarding the Monte Carlo and corner simulation results for 100 samples and 9 corners respectively, it can be observed that bit error rate is approximately zero and comparator can response fast to the input signals. After accessing acceptable simulation results from designed comparator, the layout of each comparator components such as Op-amps, switches, and latch have been drawn and tested in Cadence Spectre Circuit Simulator.
{"title":"10-bit High-speed CMOS comparator with offset cancellation technique","authors":"Lida Kouhalvandi, Sercan Aygün, Gökhan Güneş Özdemir, Ece Olcay Günes","doi":"10.1109/AIEEE.2017.8270524","DOIUrl":"https://doi.org/10.1109/AIEEE.2017.8270524","url":null,"abstract":"Nowadays, in all modern electronic devices a low voltage with high speed comparator plays an important role in overall performance of the systems. This paper describes the implementation of a high-speed comparator with high-resolution, 10-bit, in 0.18pM CMOS technology drawn from a 1.8 V supply which is suitable for analog-to-digital converter (ADC) applications and for electronic industry. An offset cancellation technique is done and tested in order to decrease the offset and kickback noise. Regarding the Monte Carlo and corner simulation results for 100 samples and 9 corners respectively, it can be observed that bit error rate is approximately zero and comparator can response fast to the input signals. After accessing acceptable simulation results from designed comparator, the layout of each comparator components such as Op-amps, switches, and latch have been drawn and tested in Cadence Spectre Circuit Simulator.","PeriodicalId":224275,"journal":{"name":"2017 5th IEEE Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121994850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-11-01DOI: 10.1109/AIEEE.2017.8270556
Saulius Sakavičius, A. Serackis, D. Plonis
In acoustics, loudness is the subjective perception of sound pressure. Loudness control systems involving loudness control algorithms are used in radio and television broadcasting. In this paper we present a research on the influence of attack and decay parameters on the performance of loudness control algorithms. Attack and decay are temporal parameters of the algorithm, that define the rate at which the algorithm applies the correction to the audio material. For this investigation, a relatively simple real time loudness control algorithm was devised, having only the two parameters: the attack and the decay rate of the algorithm's reaction. The input signal for the algorithm is the weighted sum of the loudness measurements of the source material the in three temporal scales, as per EBU R-128 recommendation. Experiments were conducted with various summing weights of the input signal. The test sound material was acquired from actual commercial TV broadcast. The performance of the algorithm were evaluated by measuring differences of three parameters of the corrected material before and after the correction as a function of the attack and decay values: the loudness range, overflow percentage, and average integrated loudness level.
{"title":"Investigation of the influence of attack and decay parameters on the performance of loudness control algorithm","authors":"Saulius Sakavičius, A. Serackis, D. Plonis","doi":"10.1109/AIEEE.2017.8270556","DOIUrl":"https://doi.org/10.1109/AIEEE.2017.8270556","url":null,"abstract":"In acoustics, loudness is the subjective perception of sound pressure. Loudness control systems involving loudness control algorithms are used in radio and television broadcasting. In this paper we present a research on the influence of attack and decay parameters on the performance of loudness control algorithms. Attack and decay are temporal parameters of the algorithm, that define the rate at which the algorithm applies the correction to the audio material. For this investigation, a relatively simple real time loudness control algorithm was devised, having only the two parameters: the attack and the decay rate of the algorithm's reaction. The input signal for the algorithm is the weighted sum of the loudness measurements of the source material the in three temporal scales, as per EBU R-128 recommendation. Experiments were conducted with various summing weights of the input signal. The test sound material was acquired from actual commercial TV broadcast. The performance of the algorithm were evaluated by measuring differences of three parameters of the corrected material before and after the correction as a function of the attack and decay values: the loudness range, overflow percentage, and average integrated loudness level.","PeriodicalId":224275,"journal":{"name":"2017 5th IEEE Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115863116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-11-01DOI: 10.1109/AIEEE.2017.8270549
V. Macaitis, R. Navickas
In this paper the performance of frequency oscillators is analyzed in different types of oscillators LC-VCO and LC-DCO. CMOS integrated circuit (IC) technology nodes is the same − 65 nm. Both oscillators are based on cross-coupled NMOS topology and are designed with Cadence IC software package. All parameters are obtained by simulating the scheme under nominal conditions (supply voltage 1.8 V, temperature 60 °C, nominal technological process corner).
{"title":"Comparison of LC-VCO and LC-DCO parameters in 65 nm CMOS technology","authors":"V. Macaitis, R. Navickas","doi":"10.1109/AIEEE.2017.8270549","DOIUrl":"https://doi.org/10.1109/AIEEE.2017.8270549","url":null,"abstract":"In this paper the performance of frequency oscillators is analyzed in different types of oscillators LC-VCO and LC-DCO. CMOS integrated circuit (IC) technology nodes is the same − 65 nm. Both oscillators are based on cross-coupled NMOS topology and are designed with Cadence IC software package. All parameters are obtained by simulating the scheme under nominal conditions (supply voltage 1.8 V, temperature 60 °C, nominal technological process corner).","PeriodicalId":224275,"journal":{"name":"2017 5th IEEE Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131058225","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-11-01DOI: 10.1109/AIEEE.2017.8270541
B. Sokolov, A. Gnidenko, A. Shalyto
The present research is devoted to the current problem of train control automation, which represents one of the trends of development of international transport. The proposed approach is aimed to overcome the drawbacks of existing train autodriving systems and provide the model-algorithmic basis for unified train control automation. The corner stone of this approach are the mathematic iterative optimization methods considering restrictions and assuring optimal solution for the multicriteria optimization problem.
{"title":"Models and algorithms of operational planning and control of dynamical objects with application of the Pontryagin's Maximum principle","authors":"B. Sokolov, A. Gnidenko, A. Shalyto","doi":"10.1109/AIEEE.2017.8270541","DOIUrl":"https://doi.org/10.1109/AIEEE.2017.8270541","url":null,"abstract":"The present research is devoted to the current problem of train control automation, which represents one of the trends of development of international transport. The proposed approach is aimed to overcome the drawbacks of existing train autodriving systems and provide the model-algorithmic basis for unified train control automation. The corner stone of this approach are the mathematic iterative optimization methods considering restrictions and assuring optimal solution for the multicriteria optimization problem.","PeriodicalId":224275,"journal":{"name":"2017 5th IEEE Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131555102","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-11-01DOI: 10.1109/AIEEE.2017.8270559
M. Vorobyov, I. Galkin
Motivated by the emerging needs to improve the quality of life for the elderly and disabled individuals who rely on wheelchairs for mobility, and who might have limited or no hand functionality at all, a new concept of wheelchair human-in-the-loop interface is proposed in this report. The beginning of the report provides an analysis of information sources on the presented topic. Then, based on this analysis, a concept of human-in-the-loop system is proposed, applying several hands free control interfaces including electroencephalography, myoelectric interface and gyroscope plus accelerometer interface. In the same time, vibration actuators are proposed as a prospective kind of the wheelchair-to-user feedback.
{"title":"Concept of cost-effective power-assisted wheelchair: Human-in-the-loop subsystem","authors":"M. Vorobyov, I. Galkin","doi":"10.1109/AIEEE.2017.8270559","DOIUrl":"https://doi.org/10.1109/AIEEE.2017.8270559","url":null,"abstract":"Motivated by the emerging needs to improve the quality of life for the elderly and disabled individuals who rely on wheelchairs for mobility, and who might have limited or no hand functionality at all, a new concept of wheelchair human-in-the-loop interface is proposed in this report. The beginning of the report provides an analysis of information sources on the presented topic. Then, based on this analysis, a concept of human-in-the-loop system is proposed, applying several hands free control interfaces including electroencephalography, myoelectric interface and gyroscope plus accelerometer interface. In the same time, vibration actuators are proposed as a prospective kind of the wheelchair-to-user feedback.","PeriodicalId":224275,"journal":{"name":"2017 5th IEEE Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128981022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-11-01DOI: 10.1109/AIEEE.2017.8270555
Julius Skirelis, D. Navakauskas
Edge computing, the subsidiary model of Cloud computing, is aiming to push computational resources closer to the edge of network. Its objectives are to improve network latency and ensure efficiency of performed tasks. However Internet of Things (IoT) devices usually are of limited processing power or/and connecting to network episodically, mostly due to power saving necessity and mobility. Thus in the paper investigation of the performance of edge computing for IoT is presented. Multiple simulations by EdgeNetworkCloudSim of different topologies, their parameters, together with considered IoT device primary limitations, are carried out. Simulation results confirm the specificity of edge computations for IoT and gives some practical insights.
{"title":"Edge computing in IoT: Preliminary results on modeling and performance analysis","authors":"Julius Skirelis, D. Navakauskas","doi":"10.1109/AIEEE.2017.8270555","DOIUrl":"https://doi.org/10.1109/AIEEE.2017.8270555","url":null,"abstract":"Edge computing, the subsidiary model of Cloud computing, is aiming to push computational resources closer to the edge of network. Its objectives are to improve network latency and ensure efficiency of performed tasks. However Internet of Things (IoT) devices usually are of limited processing power or/and connecting to network episodically, mostly due to power saving necessity and mobility. Thus in the paper investigation of the performance of edge computing for IoT is presented. Multiple simulations by EdgeNetworkCloudSim of different topologies, their parameters, together with considered IoT device primary limitations, are carried out. Simulation results confirm the specificity of edge computations for IoT and gives some practical insights.","PeriodicalId":224275,"journal":{"name":"2017 5th IEEE Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115171108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-11-01DOI: 10.1109/AIEEE.2017.8270528
A. Poreva, Y. Karplyuk, V. Vaityshyn
The article considers the basic methods of machine learning for applying them to the task of the lungs sounds classifying. A number of signal parameters were obtained on the basis of the lungs sounds set. The task of the study was to classify sounds using five different machine learning methods. It was also necessary to determine from a number of signal parameters those that give the highest accuracy. Thus the seven most diagnostically valuable parameters of lung sounds were found. The results showed that two methods of machine learning — the method of reference vectors and the decision tree method — have the best accuracy. Thus this classification technique can serve as an auxiliary tool for a pulmonary physician to diagnosis.
{"title":"Machine learning techniques application for lung diseases diagnosis","authors":"A. Poreva, Y. Karplyuk, V. Vaityshyn","doi":"10.1109/AIEEE.2017.8270528","DOIUrl":"https://doi.org/10.1109/AIEEE.2017.8270528","url":null,"abstract":"The article considers the basic methods of machine learning for applying them to the task of the lungs sounds classifying. A number of signal parameters were obtained on the basis of the lungs sounds set. The task of the study was to classify sounds using five different machine learning methods. It was also necessary to determine from a number of signal parameters those that give the highest accuracy. Thus the seven most diagnostically valuable parameters of lung sounds were found. The results showed that two methods of machine learning — the method of reference vectors and the decision tree method — have the best accuracy. Thus this classification technique can serve as an auxiliary tool for a pulmonary physician to diagnosis.","PeriodicalId":224275,"journal":{"name":"2017 5th IEEE Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125596786","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-11-01DOI: 10.1109/AIEEE.2017.8270530
P. Ruberg, Keijo Lass, Elvar Liiv, P. Ellervee
Tools for performance estimation based on instruction set simulators (ISS) are mostly available and show good results. However when the need arises to choose a different platform or to estimate performance without having the ISS the developer needs all the different software suits and devices and also must be able to work with them. In this case we propose an estimation method based on physical measurement for generating performance models. This paper extends our previous work on source-code level performance estimations for microcontrollers. We compare two proposed estimation methods to find the most suitable for estimating embedded software performance for C source-code level on microcontrollers with higher compiler optimisation levels than −O0. As a result we show that both methods could be applied with some exceptions.
{"title":"Embedded software performance estimations at different compiler optimisation levels","authors":"P. Ruberg, Keijo Lass, Elvar Liiv, P. Ellervee","doi":"10.1109/AIEEE.2017.8270530","DOIUrl":"https://doi.org/10.1109/AIEEE.2017.8270530","url":null,"abstract":"Tools for performance estimation based on instruction set simulators (ISS) are mostly available and show good results. However when the need arises to choose a different platform or to estimate performance without having the ISS the developer needs all the different software suits and devices and also must be able to work with them. In this case we propose an estimation method based on physical measurement for generating performance models. This paper extends our previous work on source-code level performance estimations for microcontrollers. We compare two proposed estimation methods to find the most suitable for estimating embedded software performance for C source-code level on microcontrollers with higher compiler optimisation levels than −O0. As a result we show that both methods could be applied with some exceptions.","PeriodicalId":224275,"journal":{"name":"2017 5th IEEE Workshop on Advances in Information, Electronic and Electrical Engineering (AIEEE)","volume":"161 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120933665","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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