The electronics industry is currently evaluating flip chip technology for high performance, miniaturized assembly applications. This is primarily because of the high I/O density, small form factor, and superior electrical performance provided by flip chip on board technology. Flip chip on low cost circuit boards (FCOB) furnishes a reliable interconnection provided underfill materials are used. Underfills overcome the thermomechanical reliability issues associated with the thermal expansion coefficient mismatch between the board and die. The selection of underfill material is critical to achieving the desired performance and reliability. Processing of underfills during assembly can result in large residual stresses within the silicon die. In some instances these stresses can be large enough to cause die fracture. In this work, low cost flip chip on board assemblies are analyzed during the underfill cure process. In situ stress measurements are performed over the active face of the die during processing and relative in-plane stresses are measured. Experimental measurements are made using flip chip test vehicles based on Sandia National Laboratories’ ATC04 Assembly Test Chip. Four different commercial underfill materials have been evaluated and a relative comparison is presented. Significant stress variations are observed between the four underfills studied. Correlation’s between the glass transition temperature (Tg) and storage modulus (G’) are made relative to residual stresses produced during underfill cure.
{"title":"In Process Stress Analysis of Flip Chip Assemblies During Underfill Cure","authors":"Prema Palaniappan, D. Baldwin","doi":"10.1115/imece1997-1221","DOIUrl":"https://doi.org/10.1115/imece1997-1221","url":null,"abstract":"\u0000 The electronics industry is currently evaluating flip chip technology for high performance, miniaturized assembly applications. This is primarily because of the high I/O density, small form factor, and superior electrical performance provided by flip chip on board technology. Flip chip on low cost circuit boards (FCOB) furnishes a reliable interconnection provided underfill materials are used. Underfills overcome the thermomechanical reliability issues associated with the thermal expansion coefficient mismatch between the board and die. The selection of underfill material is critical to achieving the desired performance and reliability. Processing of underfills during assembly can result in large residual stresses within the silicon die. In some instances these stresses can be large enough to cause die fracture.\u0000 In this work, low cost flip chip on board assemblies are analyzed during the underfill cure process. In situ stress measurements are performed over the active face of the die during processing and relative in-plane stresses are measured. Experimental measurements are made using flip chip test vehicles based on Sandia National Laboratories’ ATC04 Assembly Test Chip. Four different commercial underfill materials have been evaluated and a relative comparison is presented. Significant stress variations are observed between the four underfills studied. Correlation’s between the glass transition temperature (Tg) and storage modulus (G’) are made relative to residual stresses produced during underfill cure.","PeriodicalId":230568,"journal":{"name":"Applications of Experimental Mechanics to Electronic Packaging","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115363115","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A model correlating the group velocity of guided plate waves to temperature in anisotropic silicon substrate is presented. The model is developed through numerical solution and manipulation of the dispersion relations while elastic constants are treated as functions of temperature. Results demonstrate that adequate thermal resolution is provided by both the lowest order antisymmetric and symmetric dispersive Lamb wave modes to serve as an effective diagnostic in a non contact thermometry scheme in rapid thermal processing (RTP) of silicon wafers.
{"title":"Analytical Feasibility of Laser Induced Stress Wave Thermometry Applied to Silicon Wafers","authors":"G. A. Rabroker, C. Suh, C. P. Burger, R. Chona","doi":"10.1115/imece1997-1226","DOIUrl":"https://doi.org/10.1115/imece1997-1226","url":null,"abstract":"\u0000 A model correlating the group velocity of guided plate waves to temperature in anisotropic silicon substrate is presented. The model is developed through numerical solution and manipulation of the dispersion relations while elastic constants are treated as functions of temperature. Results demonstrate that adequate thermal resolution is provided by both the lowest order antisymmetric and symmetric dispersive Lamb wave modes to serve as an effective diagnostic in a non contact thermometry scheme in rapid thermal processing (RTP) of silicon wafers.","PeriodicalId":230568,"journal":{"name":"Applications of Experimental Mechanics to Electronic Packaging","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124105832","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The thermo-mechanical testing of Polycarbonate, Kapton, and Nylon films and underfill HYSOL FP4526 is reported, including the details of specimens, test procedures, and the 6-axis mini tester. The constitutive framework proposed for polymer films is, for the first time, applied to model the thermo-mechanical properties of underfill HYSOL FP4526 in this paper.
{"title":"Testing and Constitutive Modeling of Thin Polymer Films and Underfills by a 6-Axis Submicron Tester","authors":"Z. Qian, Minfu Lu, Jianjun Wang, Sheng Liu","doi":"10.1115/imece1997-1234","DOIUrl":"https://doi.org/10.1115/imece1997-1234","url":null,"abstract":"\u0000 The thermo-mechanical testing of Polycarbonate, Kapton, and Nylon films and underfill HYSOL FP4526 is reported, including the details of specimens, test procedures, and the 6-axis mini tester. The constitutive framework proposed for polymer films is, for the first time, applied to model the thermo-mechanical properties of underfill HYSOL FP4526 in this paper.","PeriodicalId":230568,"journal":{"name":"Applications of Experimental Mechanics to Electronic Packaging","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124408254","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Structural reliability of integrated circuit chips in electronic packages continues to be a major concern due to ever increasing die size, circuit densities, power dissipation, and operating temperatures. A powerful method for experimental evaluation of die stress distributions is the use of test chips incorporating integral piezoresistive sensors, and this paper presents a review of the state-of-the-art in silicon piezoresistive stress sensor test chips. Resistive rosettes on (100) silicon can be used to measure as many as four components of the six-component stress state whereas advanced test chips based upon (111) silicon can measure the complete stress state. However, not all of the measurements can be performed in a temperature compensated manner which is required for high accuracy results. Classic resistor rosettes suffer from reduced sensitivity due to high doping levels, and they measure values of the die surface stress averaged over a relatively large area. Advanced stress sensors based upon the piezoresistive response of field-effect transistors are expected to provide improved sensitivity and highly localized measurement of stress sensitivity. Localized high sensitivity measurement can also be provided by new van der Pauw stress sensors.
{"title":"Advances in Stress Test Chips","authors":"R. Jaeger, J. Suhling","doi":"10.1115/imece1997-1220","DOIUrl":"https://doi.org/10.1115/imece1997-1220","url":null,"abstract":"\u0000 Structural reliability of integrated circuit chips in electronic packages continues to be a major concern due to ever increasing die size, circuit densities, power dissipation, and operating temperatures. A powerful method for experimental evaluation of die stress distributions is the use of test chips incorporating integral piezoresistive sensors, and this paper presents a review of the state-of-the-art in silicon piezoresistive stress sensor test chips.\u0000 Resistive rosettes on (100) silicon can be used to measure as many as four components of the six-component stress state whereas advanced test chips based upon (111) silicon can measure the complete stress state. However, not all of the measurements can be performed in a temperature compensated manner which is required for high accuracy results.\u0000 Classic resistor rosettes suffer from reduced sensitivity due to high doping levels, and they measure values of the die surface stress averaged over a relatively large area. Advanced stress sensors based upon the piezoresistive response of field-effect transistors are expected to provide improved sensitivity and highly localized measurement of stress sensitivity. Localized high sensitivity measurement can also be provided by new van der Pauw stress sensors.","PeriodicalId":230568,"journal":{"name":"Applications of Experimental Mechanics to Electronic Packaging","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129505880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Ren, Z. Qian, Minfu Lu, Sheng Liu, D. Shangguan
The thermal-mechanical behaviors of a new lead free solder and eutectic 63Sn37Pb are investigated in this paper. A series of tests including tensile, creep and fatigue, are carried out on a computer controlled 6-axis mini fatigue tester. The thin strip specimen is used in this research, which is specially designed and verified to be suitable for the testing of solder alloys and comparable to the data from the literature. Based on the experimental study it is clear that the new lead free solder alloy is a potential replacement for the currently used Sn-Pb solders for electronics packaging applications.
{"title":"Thermal Mechanical Properties of Two Solder Alloys","authors":"W. Ren, Z. Qian, Minfu Lu, Sheng Liu, D. Shangguan","doi":"10.1115/imece1997-1237","DOIUrl":"https://doi.org/10.1115/imece1997-1237","url":null,"abstract":"\u0000 The thermal-mechanical behaviors of a new lead free solder and eutectic 63Sn37Pb are investigated in this paper. A series of tests including tensile, creep and fatigue, are carried out on a computer controlled 6-axis mini fatigue tester. The thin strip specimen is used in this research, which is specially designed and verified to be suitable for the testing of solder alloys and comparable to the data from the literature. Based on the experimental study it is clear that the new lead free solder alloy is a potential replacement for the currently used Sn-Pb solders for electronics packaging applications.","PeriodicalId":230568,"journal":{"name":"Applications of Experimental Mechanics to Electronic Packaging","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129794613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Kang, A. Mian, J. Suhling, R. Jaeger, K. Liechti, S. Liu
The (111) surface of silicon offers unique advantages for fabrication of piezoresistive stress sensors. Resistive sensor elements fabricated on this particular surface respond to all six components comprising the state of stress. Hence, a multi-element rosette has the capability of measuring the complete stress state at a point in the material. To extract the stress state at points on the die from the resistance changes measured with the sensor rosettes, it is necessary to have accurately calibrated values of six piezoresistive coefficients. Four-point bending and wafer-level calibration methods can measure four out of six piezoresistive coefficients for both p- and n-type resistors. To measure the other two coefficients, a hydrostatic test method has been developed where a high capacity pressure vessel is used to apply triaxial load on a single die. During the test procedure, resistance changes of resistors on the die are monitored. The slopes of the adjusted resistance change versus pressure plots are then used to calculate the desired last two coefficients. A step-by-step hydrostatic test procedure is demonstrated and sample data are presented.
{"title":"Hydrostatic Response of Piezoresistive Stress Sensors","authors":"Y. Kang, A. Mian, J. Suhling, R. Jaeger, K. Liechti, S. Liu","doi":"10.1115/imece1997-1224","DOIUrl":"https://doi.org/10.1115/imece1997-1224","url":null,"abstract":"The (111) surface of silicon offers unique advantages for fabrication of piezoresistive stress sensors. Resistive sensor elements fabricated on this particular surface respond to all six components comprising the state of stress. Hence, a multi-element rosette has the capability of measuring the complete stress state at a point in the material. To extract the stress state at points on the die from the resistance changes measured with the sensor rosettes, it is necessary to have accurately calibrated values of six piezoresistive coefficients. Four-point bending and wafer-level calibration methods can measure four out of six piezoresistive coefficients for both p- and n-type resistors. To measure the other two coefficients, a hydrostatic test method has been developed where a high capacity pressure vessel is used to apply triaxial load on a single die. During the test procedure, resistance changes of resistors on the die are monitored. The slopes of the adjusted resistance change versus pressure plots are then used to calculate the desired last two coefficients. A step-by-step hydrostatic test procedure is demonstrated and sample data are presented.","PeriodicalId":230568,"journal":{"name":"Applications of Experimental Mechanics to Electronic Packaging","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131362584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
B. Michel, D. Vogel, Andreas Schubert, J. Auersperg, H. Reichl
Besides different accelerated testing methods finite element analysis (FEA) of stressed components together with appropriate failure hypothesizes allow to estimate life time characteristics. However, most of structures of interest are rather complex and often all necessary material laws or parameters are not available. For simplified simulations the problem arises, whether the results describe adequately the real component under stress. MicroDAC — an established versatile approach to measurement of displacement and strain fields on thermally or mechanically stressed specimens can help to overcome the problem. The underlying measurement principle is a correlation based computer algorithm. It allows to track a set of local object pattern on optical or scanning electron micrographs for different load conditions. The resultant displacement and strain fields are being compared with finite element analysis (FEA) findings or used as an independent source of data. The measurement method has been applied mainly to solder interconnects at flip chip assemblies and chip scale packages.
{"title":"The MicroDAC Method: A Powerful Means for Microdeformation Analysis in Electronic Packaging","authors":"B. Michel, D. Vogel, Andreas Schubert, J. Auersperg, H. Reichl","doi":"10.1115/imece1997-1236","DOIUrl":"https://doi.org/10.1115/imece1997-1236","url":null,"abstract":"\u0000 Besides different accelerated testing methods finite element analysis (FEA) of stressed components together with appropriate failure hypothesizes allow to estimate life time characteristics. However, most of structures of interest are rather complex and often all necessary material laws or parameters are not available. For simplified simulations the problem arises, whether the results describe adequately the real component under stress. MicroDAC — an established versatile approach to measurement of displacement and strain fields on thermally or mechanically stressed specimens can help to overcome the problem. The underlying measurement principle is a correlation based computer algorithm. It allows to track a set of local object pattern on optical or scanning electron micrographs for different load conditions. The resultant displacement and strain fields are being compared with finite element analysis (FEA) findings or used as an independent source of data. The measurement method has been applied mainly to solder interconnects at flip chip assemblies and chip scale packages.","PeriodicalId":230568,"journal":{"name":"Applications of Experimental Mechanics to Electronic Packaging","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116898247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In chemical sensors, the sensing element is heated to a high temperature (around 450°C) for optimizing sensitivity and selectivity. In order to minimize power dissipation, the power supply for the heating is operated in a pulsed mode. The duration of the high temperature period is set by the required sensor response time for low gas concentrations. In qualification of chemical sensors, it is important to test the reliability of the membrane structures under realistic conditions of pulsed-mode operation. From these data, it is possible to link time-to-failure with changes in material or layout design. Under the operation condition, the cyclic power input generates local heat and thermal gradient in the membrane as well as physical deformation and local stress. The regular reliability test — thermal cycles with isothermal temperature distribution — cannot simulate the membrane stress or induce the failure processes that occur in the membrane, heater or sensor films under real operational conditions. This paper describes a unique testing technique which is suited for reliability tests and field life prediction in a pulsed sensor. The methods of determining the acceleration factor and the procedures to execute the life test are discussed. Using this testing method, the fatigue life of the sensor configurations can be evaluated within a much shortened testing time.
{"title":"Accelerated Reliability Testing Method for Sensors With a Pulsing Membrane Structure","authors":"Yifan Guo, V. Sarihan, Tom Lee","doi":"10.1115/imece1997-1223","DOIUrl":"https://doi.org/10.1115/imece1997-1223","url":null,"abstract":"\u0000 In chemical sensors, the sensing element is heated to a high temperature (around 450°C) for optimizing sensitivity and selectivity. In order to minimize power dissipation, the power supply for the heating is operated in a pulsed mode. The duration of the high temperature period is set by the required sensor response time for low gas concentrations. In qualification of chemical sensors, it is important to test the reliability of the membrane structures under realistic conditions of pulsed-mode operation. From these data, it is possible to link time-to-failure with changes in material or layout design. Under the operation condition, the cyclic power input generates local heat and thermal gradient in the membrane as well as physical deformation and local stress. The regular reliability test — thermal cycles with isothermal temperature distribution — cannot simulate the membrane stress or induce the failure processes that occur in the membrane, heater or sensor films under real operational conditions. This paper describes a unique testing technique which is suited for reliability tests and field life prediction in a pulsed sensor. The methods of determining the acceleration factor and the procedures to execute the life test are discussed. Using this testing method, the fatigue life of the sensor configurations can be evaluated within a much shortened testing time.","PeriodicalId":230568,"journal":{"name":"Applications of Experimental Mechanics to Electronic Packaging","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130138670","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Zou, J. Suhling, R. Jaeger, S. T. Lin, L. Nguyen, S. Gee
In this work, special (100) test chips containing optimized four element dual polarity rosettes have been applied within several plastic encapsulated electronic packaging configurations. The utilized test chips are capable of evaluating four stress components, and both the in-plane normal stress difference and the in-plane shear stress can be measured in a temperature compensated manner. In this paper, results are reported for test chips encapsulated in 44 pin PLCC packages. The pre and post packaging room temperature resistances of the sensors were recorded. Using the measured resistance changes and the appropriate theoretical equations, the stresses on the surface of the die were then calculated. Also, three-dimensional nonlinear finite element simulations of the plastic encapsulated packages were performed. The experimental results are in reasonable agreement with the finite element predictions, given the limitations of the constitutive models used in the numerical calculations.
{"title":"Characterization of Plastic Packages Using (100) Silicon Stress Test Chips","authors":"Y. Zou, J. Suhling, R. Jaeger, S. T. Lin, L. Nguyen, S. Gee","doi":"10.1115/imece1997-1222","DOIUrl":"https://doi.org/10.1115/imece1997-1222","url":null,"abstract":"\u0000 In this work, special (100) test chips containing optimized four element dual polarity rosettes have been applied within several plastic encapsulated electronic packaging configurations. The utilized test chips are capable of evaluating four stress components, and both the in-plane normal stress difference and the in-plane shear stress can be measured in a temperature compensated manner. In this paper, results are reported for test chips encapsulated in 44 pin PLCC packages. The pre and post packaging room temperature resistances of the sensors were recorded. Using the measured resistance changes and the appropriate theoretical equations, the stresses on the surface of the die were then calculated. Also, three-dimensional nonlinear finite element simulations of the plastic encapsulated packages were performed. The experimental results are in reasonable agreement with the finite element predictions, given the limitations of the constitutive models used in the numerical calculations.","PeriodicalId":230568,"journal":{"name":"Applications of Experimental Mechanics to Electronic Packaging","volume":"263 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123103046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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