Multilevel inverters are a popular solution for photovoltaic power plants, wind farms and other renewable energy generation. This paper presents a floating capacitor self-balancing three-phase five-level boost (5L-Boost) inverter. A notable feature of the inverter is that its maximum voltage gain is twice as that of traditional three-phase inverters such as neutral point clamp (NPC), floating capacitor (FC), cascaded H-bridge (CHB) and active NPC (ANPC). More importantly, the inverter can realize self-starting and self-balancing of FC, and self-balancing of DC capacitors, so complex FC voltage balancing strategies and DC capacitor voltage control methods are no longer required. Taking one phase as an example, the effectiveness of the topology is verified through simulation and experiment.
{"title":"A Three-Phase Five-Level Boost Inverter","authors":"Xiaonan Zhu, Hongliang Wang, Wenyuan Zhang, Hanzhe Wang, Xiaojun Deng, X. Yue","doi":"10.1109/peas53589.2021.9628645","DOIUrl":"https://doi.org/10.1109/peas53589.2021.9628645","url":null,"abstract":"Multilevel inverters are a popular solution for photovoltaic power plants, wind farms and other renewable energy generation. This paper presents a floating capacitor self-balancing three-phase five-level boost (5L-Boost) inverter. A notable feature of the inverter is that its maximum voltage gain is twice as that of traditional three-phase inverters such as neutral point clamp (NPC), floating capacitor (FC), cascaded H-bridge (CHB) and active NPC (ANPC). More importantly, the inverter can realize self-starting and self-balancing of FC, and self-balancing of DC capacitors, so complex FC voltage balancing strategies and DC capacitor voltage control methods are no longer required. Taking one phase as an example, the effectiveness of the topology is verified through simulation and experiment.","PeriodicalId":268264,"journal":{"name":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116490750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Planar spiral coil is widely used in the field of WPT because of their simple structure. Based on high frequency eddy current loss mechanism, the influence of the Proximity effect on the AC resistance of winding is analyzed. It reveals the total loss of coil can be reduced by layering the coil to reduce proximity effect when the ratio of loss due to proximity effect is large and based on which layered staggered winding structure and double laminated winding structure are proposed. This method can reduce the AC resistance and improve the quality factor Q at high frequency. Through simulation, the AC loss of coils based on layered staggered winding structure and double laminated winding structure can be greatly reduced comparing to the traditional coil structure, which verifies the theory analysis to be correct and flexible.
{"title":"Winding Layout Analysis of Planar Spiral Coils and Its Optimization in WPT System","authors":"Qingbin Chen, Jinshuai Wang, Xu Zhang, Feng Fan, Wei Chen","doi":"10.1109/peas53589.2021.9628653","DOIUrl":"https://doi.org/10.1109/peas53589.2021.9628653","url":null,"abstract":"Planar spiral coil is widely used in the field of WPT because of their simple structure. Based on high frequency eddy current loss mechanism, the influence of the Proximity effect on the AC resistance of winding is analyzed. It reveals the total loss of coil can be reduced by layering the coil to reduce proximity effect when the ratio of loss due to proximity effect is large and based on which layered staggered winding structure and double laminated winding structure are proposed. This method can reduce the AC resistance and improve the quality factor Q at high frequency. Through simulation, the AC loss of coils based on layered staggered winding structure and double laminated winding structure can be greatly reduced comparing to the traditional coil structure, which verifies the theory analysis to be correct and flexible.","PeriodicalId":268264,"journal":{"name":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123445967","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The unipolar modulation is widely applied to the single-phase full bridge inverter for its superior performance in the output harmonic characteristics. However, it will bring serious common-mode interference so that a common-mode filter is required. Due to the nonideal factors of the practical operation condition, the actual performance of the designed common-mode filter is often inferior to that of the ideal case, which further brings EMI problems. To improve the performance of the common-mode filter, the parameters should be redesigned, and tested in an iterative way until it adapts to the practical operation condition, which is time-consuming and also increase the cost since the hardware should be changed to modify the parameters. To address this problem, a novel weighted hybrid modulation is proposed to improve the performance of the common-mode filter without replacing the hardware of the common-mode filter. The proposed weighted hybrid modulation strategy blends the bipolar into unipolar modulation and compromises the merits of both. By improving the common-mode noise, the EMI can be easily reduced to the standard level. The double Fourier analysis method is conducted to analyze the characteristics of the proposed modulation strategy. Both simulation and experimental results are presented to prove the effectiveness of the proposed method.
{"title":"A Weighted Hybrid Modulation Strategy of Single-Phase Full Bridge Inverter for Reducing Common-Mode Interference","authors":"Hanchao Lu, Siyu Tong, Gui He, Shanshan Zhao, Yu Chen","doi":"10.1109/peas53589.2021.9628820","DOIUrl":"https://doi.org/10.1109/peas53589.2021.9628820","url":null,"abstract":"The unipolar modulation is widely applied to the single-phase full bridge inverter for its superior performance in the output harmonic characteristics. However, it will bring serious common-mode interference so that a common-mode filter is required. Due to the nonideal factors of the practical operation condition, the actual performance of the designed common-mode filter is often inferior to that of the ideal case, which further brings EMI problems. To improve the performance of the common-mode filter, the parameters should be redesigned, and tested in an iterative way until it adapts to the practical operation condition, which is time-consuming and also increase the cost since the hardware should be changed to modify the parameters. To address this problem, a novel weighted hybrid modulation is proposed to improve the performance of the common-mode filter without replacing the hardware of the common-mode filter. The proposed weighted hybrid modulation strategy blends the bipolar into unipolar modulation and compromises the merits of both. By improving the common-mode noise, the EMI can be easily reduced to the standard level. The double Fourier analysis method is conducted to analyze the characteristics of the proposed modulation strategy. Both simulation and experimental results are presented to prove the effectiveness of the proposed method.","PeriodicalId":268264,"journal":{"name":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","volume":"121 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122062619","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-11-13DOI: 10.1109/peas53589.2021.9628790
Haolin Tong, W. Yao, Wuhua Li
Medium voltage converter has high requirements for the realization of modulation due to its complex topology. When the same control system is applied to different topologies and modulation methods, the traditional modulation scheme needs cumbersome and error-prone operations because a large number of control bits need to be configured. In this paper, a universal modulation scheme is proposed based on the idea of event-driven. The data transmission between processor and logic cells is abstracted as an event and the configuration of control bits is omitted. The processor adds an event calculation process that is easy to modify as an event collector. The circuit in the logic cells is simplified to a single unified carrier, which greatly saves the hardware resources and increases the universality. Compared with the traditional scheme, it can be found that the proposed scheme has the following advantages: it is more convenient and flexible to switch in different applications; it reduces the complexity of logic cells and the consumption of hardware resources. The proposed scheme is analyzed and the feasibility of the scheme is verified by experiments on a self-developed medium voltage controller taking the five-level nested neutral point piloted topology as an example.
{"title":"A Universal Modulation Scheme Based on Event-driven in Medium Voltage Converter","authors":"Haolin Tong, W. Yao, Wuhua Li","doi":"10.1109/peas53589.2021.9628790","DOIUrl":"https://doi.org/10.1109/peas53589.2021.9628790","url":null,"abstract":"Medium voltage converter has high requirements for the realization of modulation due to its complex topology. When the same control system is applied to different topologies and modulation methods, the traditional modulation scheme needs cumbersome and error-prone operations because a large number of control bits need to be configured. In this paper, a universal modulation scheme is proposed based on the idea of event-driven. The data transmission between processor and logic cells is abstracted as an event and the configuration of control bits is omitted. The processor adds an event calculation process that is easy to modify as an event collector. The circuit in the logic cells is simplified to a single unified carrier, which greatly saves the hardware resources and increases the universality. Compared with the traditional scheme, it can be found that the proposed scheme has the following advantages: it is more convenient and flexible to switch in different applications; it reduces the complexity of logic cells and the consumption of hardware resources. The proposed scheme is analyzed and the feasibility of the scheme is verified by experiments on a self-developed medium voltage controller taking the five-level nested neutral point piloted topology as an example.","PeriodicalId":268264,"journal":{"name":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117084391","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-11-13DOI: 10.1109/peas53589.2021.9628399
Yufan Liu, M. Mao, Liuchen Chang, Zhuang He
The high-voltage DC grid based on modular multilevel converters (MMC-HVDC-Grid) is an important direction for the development of power grid in the future. However, it faces great challenges resulting from the serious overcurrent after DC short circuit faults. The pole-to-pole short-circuit fault (PTPSCF) is the most serious fault type of DC fault, its fault current calculation is of great significance to fault judgment, parameter optimization and protection equipment selection. According to the connection modes of converter stations, the topologies of MMC-HVDC-Grid with single voltage level are divided into four groups: ring topology, meshed topology, star topology and hybrid topology. In order to calculate the PTPSCF current under different topologies, the coupling characteristics between converter stations under different topologies after PTPSCF are analyzed, and different splitting methods for different topologies are proposed. Aiming at the situation that a converter station discharges rapidly to both sides of the fault point at the same time in meshed MMC-HVDC-Grid, this paper presents a decoupling method based on electrical distance. Finally, by comparing with the electromagnetic transient simulation results, the efficiency and accuracy of the calculation method in this paper are verified.
{"title":"Analytical Calculation of Pole-to-Pole Short Circuit Fault Current in MMC-HVDC-Grid","authors":"Yufan Liu, M. Mao, Liuchen Chang, Zhuang He","doi":"10.1109/peas53589.2021.9628399","DOIUrl":"https://doi.org/10.1109/peas53589.2021.9628399","url":null,"abstract":"The high-voltage DC grid based on modular multilevel converters (MMC-HVDC-Grid) is an important direction for the development of power grid in the future. However, it faces great challenges resulting from the serious overcurrent after DC short circuit faults. The pole-to-pole short-circuit fault (PTPSCF) is the most serious fault type of DC fault, its fault current calculation is of great significance to fault judgment, parameter optimization and protection equipment selection. According to the connection modes of converter stations, the topologies of MMC-HVDC-Grid with single voltage level are divided into four groups: ring topology, meshed topology, star topology and hybrid topology. In order to calculate the PTPSCF current under different topologies, the coupling characteristics between converter stations under different topologies after PTPSCF are analyzed, and different splitting methods for different topologies are proposed. Aiming at the situation that a converter station discharges rapidly to both sides of the fault point at the same time in meshed MMC-HVDC-Grid, this paper presents a decoupling method based on electrical distance. Finally, by comparing with the electromagnetic transient simulation results, the efficiency and accuracy of the calculation method in this paper are verified.","PeriodicalId":268264,"journal":{"name":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124063591","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper proposes a voltage balancing method for series-connected devices in a bidirectional CLLC resonant converter. Series connection of power devices can allow the CLLC resonant converter working in high or medium voltage applications. The key problem of series-connected power devices is the voltage imbalance between devices caused by device parameter spread and gate drive delays. An active clamping module (ACM) is in parallel with each of the series-connected power device. Each ACM consists of a clamping capacitor and an auxiliary switch with an anti-parallel diode. During the switching period, the power device voltage will be clamped at the voltage of ACM capacitor. By balancing the voltages of ACM capacitors, we can balance the voltages of series-connected power devices as well. The charging and discharging of ACM capacitor are introduced. The design process of discharge time is given. A balancing control method for ACM capacitors is proposed. Experimental results from a CLLC prototype with 4 power Schottky silicon carbide diode series-connected are provided to verify the effectiveness and feasibility of the proposed method. The imbalance degree of these series-connected devices is less than 3% under different voltage and load conditions. The peak efficiency reaches 97.7%.
{"title":"Series-Connected Power Devices in a CLLC Resonant Converter for DC Transformer Applications","authors":"Yineng Shi, Shuai Shao, Xin Wang, Wentao Cui, Junming Zhang","doi":"10.1109/peas53589.2021.9628875","DOIUrl":"https://doi.org/10.1109/peas53589.2021.9628875","url":null,"abstract":"This paper proposes a voltage balancing method for series-connected devices in a bidirectional CLLC resonant converter. Series connection of power devices can allow the CLLC resonant converter working in high or medium voltage applications. The key problem of series-connected power devices is the voltage imbalance between devices caused by device parameter spread and gate drive delays. An active clamping module (ACM) is in parallel with each of the series-connected power device. Each ACM consists of a clamping capacitor and an auxiliary switch with an anti-parallel diode. During the switching period, the power device voltage will be clamped at the voltage of ACM capacitor. By balancing the voltages of ACM capacitors, we can balance the voltages of series-connected power devices as well. The charging and discharging of ACM capacitor are introduced. The design process of discharge time is given. A balancing control method for ACM capacitors is proposed. Experimental results from a CLLC prototype with 4 power Schottky silicon carbide diode series-connected are provided to verify the effectiveness and feasibility of the proposed method. The imbalance degree of these series-connected devices is less than 3% under different voltage and load conditions. The peak efficiency reaches 97.7%.","PeriodicalId":268264,"journal":{"name":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129364496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Class E inverter is the most widely used single ended switching inverter in the high frequency field. However, due to the existence of resonant network, the inverter can only work under a fixed duty cycle and the output voltage is not adjustable. To solve this problem, this paper proposes a duty ratio independent Class E inverter. By solving the circuit equation, the parameters of the resonant element can be derived. Under the determined component value, the output voltage gain corresponding to different duty ratios can be obtained. Finally, a 24V input 20MHz prototype is built to verify the feasibility of proposed method. Simulation and experimental results show that with the proposed method, the inverter can maintain soft switching under different duty ratios, and the output voltage of the inverter can be dynamically adjusted.
{"title":"Design of High Frequency Class E Inverter With Adjustable Output Voltage","authors":"Chang Liu, Yueshi Guan, Yuhui Wang, Yijie Wang, Dianguo Xu","doi":"10.1109/peas53589.2021.9628584","DOIUrl":"https://doi.org/10.1109/peas53589.2021.9628584","url":null,"abstract":"Class E inverter is the most widely used single ended switching inverter in the high frequency field. However, due to the existence of resonant network, the inverter can only work under a fixed duty cycle and the output voltage is not adjustable. To solve this problem, this paper proposes a duty ratio independent Class E inverter. By solving the circuit equation, the parameters of the resonant element can be derived. Under the determined component value, the output voltage gain corresponding to different duty ratios can be obtained. Finally, a 24V input 20MHz prototype is built to verify the feasibility of proposed method. Simulation and experimental results show that with the proposed method, the inverter can maintain soft switching under different duty ratios, and the output voltage of the inverter can be dynamically adjusted.","PeriodicalId":268264,"journal":{"name":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130005397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-11-13DOI: 10.1109/peas53589.2021.9628509
K. Cui, Liang Ai, Jian Shi, Biao Zhao, Hong Qi, Haibo Li, Xiaoting Ma, Yuchi Ren, F. Cai
Application of power electronic and DC distribution are the development trend of medium voltage distribution network in the future. The compactness and miniaturization of power electronic equipment are the technical difficulties that must be overcome in the application process of medium voltage DC distribution. This paper analyzes the quantitative relationship between the number of MMC sub-modules, the capacitor voltage ripple, and the total capacitance consumption, purposing to reduce the capacitance consumption of the whole MMC to achieve a compact design. Meanwhile, in order to ensure the overall modulation performance of the MMC in which number of modules is reduced and the sub-module voltage ripple is increased, a carrier phase-shifting indirect modulation method based on the energy prediction of the bridge arm is proposed, this modulation method is effective to improve the utilization ratio of the sub-module capacitor voltage. Simulation results show that the MMC using the high-ripple compact design performs as well as the MMC using conventional design under various power levels, while the high-ripple compact design has a 30% reduction of total capacitance consumption.
{"title":"High-ripple Compact Design of MMC for Medium Voltage Distribution","authors":"K. Cui, Liang Ai, Jian Shi, Biao Zhao, Hong Qi, Haibo Li, Xiaoting Ma, Yuchi Ren, F. Cai","doi":"10.1109/peas53589.2021.9628509","DOIUrl":"https://doi.org/10.1109/peas53589.2021.9628509","url":null,"abstract":"Application of power electronic and DC distribution are the development trend of medium voltage distribution network in the future. The compactness and miniaturization of power electronic equipment are the technical difficulties that must be overcome in the application process of medium voltage DC distribution. This paper analyzes the quantitative relationship between the number of MMC sub-modules, the capacitor voltage ripple, and the total capacitance consumption, purposing to reduce the capacitance consumption of the whole MMC to achieve a compact design. Meanwhile, in order to ensure the overall modulation performance of the MMC in which number of modules is reduced and the sub-module voltage ripple is increased, a carrier phase-shifting indirect modulation method based on the energy prediction of the bridge arm is proposed, this modulation method is effective to improve the utilization ratio of the sub-module capacitor voltage. Simulation results show that the MMC using the high-ripple compact design performs as well as the MMC using conventional design under various power levels, while the high-ripple compact design has a 30% reduction of total capacitance consumption.","PeriodicalId":268264,"journal":{"name":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125669112","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-11-13DOI: 10.1109/peas53589.2021.9628628
Zhijie Zhang, Kefan Liu, Sen Yang, Yu Yao, Fei Li
This paper proposed a new control strategy applied to a new input series output parallel (ISOP) DC/DC converter system. In the new ISOP system, an improved phase shifted full bridge soft switching topology is utilized. In the topology, clamping diodes and resonant inductors are used to realize soft switching of the main power switch and reduce the voltage spike of the secondary rectifier diodes. In order to achieve input voltage sharing (IVS), hysteresis compensation IVS control strategy is proposed based on common duty cycle control method. The new control strategy can achieve the stable working for the system, improve IVS balancing accuracy, and simplify the design process of control system. This paper analyzes the working principle of the main circuit and control circuit. The small signal model of ISOP system is established and the controller design process is given. A 500W prototype is designed to verify the effectiveness of the proposed converter and the control system.
{"title":"Hysteresis Compensation Input Voltage Sharing Control Strategy Applicated to Improved Phase Shifted Full Bridge ISOP Converter","authors":"Zhijie Zhang, Kefan Liu, Sen Yang, Yu Yao, Fei Li","doi":"10.1109/peas53589.2021.9628628","DOIUrl":"https://doi.org/10.1109/peas53589.2021.9628628","url":null,"abstract":"This paper proposed a new control strategy applied to a new input series output parallel (ISOP) DC/DC converter system. In the new ISOP system, an improved phase shifted full bridge soft switching topology is utilized. In the topology, clamping diodes and resonant inductors are used to realize soft switching of the main power switch and reduce the voltage spike of the secondary rectifier diodes. In order to achieve input voltage sharing (IVS), hysteresis compensation IVS control strategy is proposed based on common duty cycle control method. The new control strategy can achieve the stable working for the system, improve IVS balancing accuracy, and simplify the design process of control system. This paper analyzes the working principle of the main circuit and control circuit. The small signal model of ISOP system is established and the controller design process is given. A 500W prototype is designed to verify the effectiveness of the proposed converter and the control system.","PeriodicalId":268264,"journal":{"name":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132438950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-11-13DOI: 10.1109/peas53589.2021.9628421
Ye Tian, Han Wu, Ye Yan, Chushan Li, Xiangning He, Wuhua Li
This paper presents a high-performance test bench for Mega Watt (MW) level high-speed machine and MW level 10 kV rectifier with 333 Hz fundamental frequency. It is based on AC pump back topology under the limit of 400 kW grid power capacity. In this paper, the overall structure of the test bench is introduced. Key features those enabling high-speed high-power loop test are analyzed in details. First of all, the mechanism of circuit breaker arc reignition and cable derating caused by high frequency are quantitatively analyzed and a guideline for the design and installment practice for these components is formed, which is different from the guideline at low frequency. Next, based on the multi-level real-time control system which realizes the monitoring and control of the large scale test bench, a multi-time scale protection system is designed for complex faults and failure modes. According to a step-by-step decoupling verification strategy, the DUT and the pump back test bench are both successfully built and experimentally validated at their rated operation points.
{"title":"Design of Mega-Watt Level Test bench for 10 kV 333 Hz Machine Drive","authors":"Ye Tian, Han Wu, Ye Yan, Chushan Li, Xiangning He, Wuhua Li","doi":"10.1109/peas53589.2021.9628421","DOIUrl":"https://doi.org/10.1109/peas53589.2021.9628421","url":null,"abstract":"This paper presents a high-performance test bench for Mega Watt (MW) level high-speed machine and MW level 10 kV rectifier with 333 Hz fundamental frequency. It is based on AC pump back topology under the limit of 400 kW grid power capacity. In this paper, the overall structure of the test bench is introduced. Key features those enabling high-speed high-power loop test are analyzed in details. First of all, the mechanism of circuit breaker arc reignition and cable derating caused by high frequency are quantitatively analyzed and a guideline for the design and installment practice for these components is formed, which is different from the guideline at low frequency. Next, based on the multi-level real-time control system which realizes the monitoring and control of the large scale test bench, a multi-time scale protection system is designed for complex faults and failure modes. According to a step-by-step decoupling verification strategy, the DUT and the pump back test bench are both successfully built and experimentally validated at their rated operation points.","PeriodicalId":268264,"journal":{"name":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","volume":"131 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130940100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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