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Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception最新文献

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Fast retrieval on compressed images for internet applications 快速检索压缩图像的互联网应用程序
M. Albanesi, Alessandro Giancane
In this paper we present a method to incorporate a content-based retrieval algorithm on compressed images with a digital image transform scheme to achieve a low cost and fast indexing method. The target application is the access and interaction with huge amount of visual data on Internet. The approach exploits a modified Wavelet multiresolution decomposition and reconstruction scheme and a multiresolution algorithm for feature extraction and index generation. The efficacy of the method has been proved by extensive tests on YUV compressed JPEG images and the performance have been compared with other approaches on uncompressed, original images, even with the addition of noise. The results suggest a great opportunity to embed in a unique paradigm a fast retrieval technique and a good compression algorithm of low computational complexity, very suitable for Internet imaging applications.
本文提出了一种将基于内容的压缩图像检索算法与数字图像变换方案相结合的方法,以实现一种低成本、快速的索引方法。其目标应用是对互联网上海量可视化数据的访问和交互。该方法利用改进的小波多分辨率分解和重构方案以及多分辨率特征提取和索引生成算法。在YUV压缩后的JPEG图像上进行了大量的测试,证明了该方法的有效性,并在未压缩的原始图像上与其他方法进行了性能比较,即使添加了噪声。结果表明,在一个独特的范例中嵌入快速检索技术和低计算复杂度的良好压缩算法是一个很好的机会,非常适合互联网成像应用。
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引用次数: 1
Space variant vision and pipelined architecture for time to impact computation 空间变视和流水线结构,时间影响计算
F. Pardo, I. Llorens, F. Micó, J. Boluda
Image analysis is one of the most interesting ways for a mobile vehicle to understand its environment. One of the tasks of an autonomous vehicle is to get accurate information of what it has in front, to avoid collision or find a way to a target. This task requires real-time restrictions depending on the vehicle speed and external object movement. The use of normal cameras, with homogeneous (squared) pixel distribution, for real-time image processing, usually requires high performance computing and high image rates. A different approach makes use of a CMOS space-variant camera that yields a high frame rate with low data bandwidth. The camera also performs the log-polar transform, simplifying some image processing algorithms. One of this simplified algorithms is the time to impact computation. The calculation of the time to impact uses a differential algorithm. A pipelined architecture specially suited for differential image processing algorithms has been also developed using programmable FPGAs.
图像分析是移动车辆了解其环境的最有趣的方法之一。自动驾驶汽车的任务之一是获取前方的准确信息,以避免碰撞或找到通往目标的道路。这项任务需要根据车辆速度和外部物体运动进行实时限制。使用具有均匀(平方)像素分布的普通摄像机进行实时图像处理,通常需要高性能计算和高图像速率。另一种方法是利用CMOS空间变型相机,以低数据带宽产生高帧率。该相机还进行了对数极坐标变换,简化了一些图像处理算法。其中一个简化的算法是影响计算的时间。撞击时间的计算使用微分算法。一种特别适用于差分图像处理算法的流水线结构也利用可编程fpga被开发出来。
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引用次数: 8
Anet: a programming environment for parallel image analysis 并行图像分析的编程环境
B. Ducourthial, A. Mérigot, Nicolas Sicard
In this paper we present the programming environment Anet for image analysis, that aims to bridge the gap between programmability requirements and parallel efficiency. It is based on the graph based associative nets computing model, and allows irregular data manipulation. As it is intrinsically a parallel model, parallel execution can be quite naturally considered, and as the number of primitives is small, effective parallelization requires an initial limited effort and can be reused by a large set of programs.
在本文中,我们提出了用于图像分析的编程环境Anet,旨在弥合可编程性要求与并行效率之间的差距。它基于基于图的关联网络计算模型,允许不规则的数据操作。由于它本质上是一个并行模型,因此可以很自然地考虑并行执行,并且由于原语的数量很少,因此有效的并行化需要有限的初始努力,并且可以被大量程序重用。
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引用次数: 4
2-D object recognition by structured neural networks in a pyramidal architecture 基于金字塔结构的结构化神经网络的二维目标识别
V. Cantoni, A. Petrosino
In the paper we propose an approach to the realization of models inspired to biological solutions for pattern recognition. The approach is based on a hierarchical modular structure capable to learn by examples and recognize objects in digital images. The adopted techniques are based on multiresolution image correlation and neural networks. Performance on two different data sets and experimental timings on a SIMD machine are also reported.
在本文中,我们提出了一种方法来实现模式识别的生物解决方案的模型。该方法基于分层模块化结构,能够通过实例学习和识别数字图像中的物体。所采用的技术是基于多分辨率图像相关和神经网络。还报告了在两个不同数据集上的性能和SIMD机器上的实验时间。
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引用次数: 5
On quantum and classical computing with arrays of superconducting persistent current qubits 超导恒流量子比特阵列的量子与经典计算
P. Jonker, Jie Han
A superconducting qubit (or quantum bit), which consists of a micrometer-sized loop with three or four Josephson junctions, has two persistent currents of opposite direction as its two states. The states of the qubits, manipulated with magnetic fields and measured with a SQUID, can be brought into quantum coherence to perform quantum computing. Classical bits can also be obtained from these superconducting loops by increasing its critical current, making it possible to base a processor array architecture on these cubits (quantum bits used in a classical way). Such a classical computer might also serve as pre and post processor for the quantum computing performed in the heart of the array. Because classical and quantum computing based on the same device can be studied now simultaneously, architecture of arrays of qubits and cubits seems a good vehicle for studying the quantum computer paradigm, independently from the question whether superconducting loops will be the ultimate implementation vehicle. Other (e.g. spin-based) devices may be more successful. In this paper, the architectural issues of a heterogeneous quantum/classical computer for an implementation of Shor's factoring algorithm based on arrays of qubits and cubits, are presented.
超导量子比特(或量子比特)由一个微米大小的环和三个或四个约瑟夫森结组成,作为它的两个状态,有两个方向相反的持续电流。利用磁场操纵和SQUID测量的量子比特的状态,可以引入量子相干来进行量子计算。通过增加临界电流,也可以从这些超导环路中获得经典比特,从而可以在这些腕尺(以经典方式使用的量子比特)上建立处理器阵列架构。这样的经典计算机也可以作为在阵列中心执行的量子计算的前处理器和后处理器。由于现在可以同时研究基于同一设备的经典计算和量子计算,量子比特和腕尺阵列的架构似乎是研究量子计算机范式的良好载体,而不是超导环路是否会成为最终实现载体的问题。其他(例如基于旋转的)设备可能更成功。本文提出了实现基于量子位和腕尺阵列的Shor因子分解算法的异构量子/经典计算机的体系结构问题。
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引用次数: 7
Hardware supported technique for detecting multi-corners in digital contours 数字轮廓中多角检测的硬件支持技术
A. Sluzek
The paper reports development of a simple and reliable multi-corner detection technique that combines local computational schemes and an inexpensive model-based matching approach. The input data are digital contour images extracted from camera-captured scenes by using any edge detector. Although most of the results have been obtained by using the software implementation, the algorithm's structure has been optimised for hardware implementation. A preliminary hardware design has been proposed, and some of the modules have been already implemented in FPGA. Eventually, it should be possible to detect on-line all multi-corners (and to determine their geometry) within images incoming at standard (e.g. TV) rates. The algorithm has been developed within a joint research project of Robotics Research Centre (NTU) and British Gas Asia Pacific on development of an autonomous underwater vehicle for specialised applications.
本文报道了一种简单可靠的多角点检测技术的发展,该技术结合了局部计算方案和廉价的基于模型的匹配方法。输入数据是使用任意边缘检测器从相机捕获的场景中提取的数字轮廓图像。虽然大多数结果都是通过软件实现的,但算法的结构已经优化到硬件实现。提出了初步的硬件设计方案,部分模块已在FPGA上实现。最终,它应该可以在线检测所有的多角(并确定其几何形状)在图像传入的标准(如电视)速率。该算法是在机器人研究中心(NTU)和英国天然气亚太公司的一个联合研究项目中开发的,该项目旨在开发用于专业应用的自主水下航行器。
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引用次数: 3
High speed target tracking vision chip 高速目标跟踪视觉芯片
T. Komuro, I. Ishii, M. Ishikawa, A. Yoshida
This paper describes a new vision chip architecture for high speed target tracking. The system speed and pixel size improved by hardware implementation of a special algorithm which utilizes a property of high speed vision. Using an asynchronous and bit-serial propagation method, global moments of the image are calculated at high speed and with small circuits. Based on the new architecture a 64/spl times/64 pixel prototype chip has been developed.
本文介绍了一种用于高速目标跟踪的新型视觉芯片结构。利用高速视觉特性的特殊算法在硬件上实现,提高了系统速度和像素大小。采用异步和位串行的传播方法,以高速和小电路计算图像的全局矩。在此基础上开发了64/spl倍/64像素的原型芯片。
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引用次数: 15
Multi-media extensions in super-pipelined micro-architectures. A new case for SIMD processing? 超流水线微体系结构中的多媒体扩展。SIMD处理的新情况?
M. Ferretti
General purpose microprocessors have long been considered a computing platform unsuited to image processing and vision tasks. The so-called Von-Neumann paradigm and the associated memory bottleneck have motivated the research into various forms of parallel processing and of special processors for vision. The SIMD approach, adopted in massively parallel processors, has been introduced in a minimal format in the multimedia extensions to instruction set architectures of standard microprocessors. This paper examines the characteristics of SIMD processing that have been mapped into these extensions.
通用微处理器一直被认为是不适合图像处理和视觉任务的计算平台。所谓的冯-诺伊曼范式和相关的记忆瓶颈推动了对各种形式的并行处理和视觉专用处理器的研究。在大规模并行处理器中采用的SIMD方法已经以最小的格式在标准微处理器的指令集体系结构的多媒体扩展中引入。本文研究了映射到这些扩展中的SIMD处理的特征。
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引用次数: 10
Homography based parallel volume intersection: toward real-time volume reconstruction using active cameras 基于单应性的平行体相交:利用活动摄像机实现实时体重建
T. Wada, Xiaojun Wu, Shogo Tokai, T. Matsuyama
Silhouette volume intersection is one of the most popular ideas for reconstructing the 3D volume of an object from multi-viewpoint silhouette images. This paper presents a novel parallel volume intersection method based on plane-to-plane homography for real-time 3D volume reconstruction using active cameras. This paper mainly focuses on the acceleration of back-projection from silhouette images to 3D space without using any sophisticated software technique, such as octree volume representation, or look-up table based projection acceleration. Also this paper presents a parallel intersection method of projected silhouette images. From the preliminary experimental results we estimate near frame-rate volume reconstruction for a life-sized mannequin can be achieved at 3 cm spatial resolution on our PC cluster system.
轮廓体相交是从多视点轮廓图像重建物体三维体积的最流行的思想之一。提出了一种基于平面间单应性的并行体交方法,用于有源相机实时三维体重建。本文主要关注从轮廓图像到三维空间的反向投影加速,而不使用任何复杂的软件技术,如八叉树体表示或基于查找表的投影加速。本文还提出了一种投影轮廓图像的平行相交方法。根据初步的实验结果,我们估计在我们的PC集群系统上,在3厘米的空间分辨率下,可以实现真人大小的人体模型的近帧率体积重建。
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引用次数: 64
How to use high speed reconfigurable FPGA for real time image processing? 如何使用高速可重构FPGA进行实时图像处理?
D. Demigny, L. Kessal, R. Bourguiba, N. Boudouani
In France, ten research teams study and build a hardware architecture (ARDOISE) which is dedicated to real time image processing. This architecture uses fast or dynamic reconfiguration allowed by new FPGA circuits. During a video frame duration, several algorithms are computed sequentially on the same hardware. This paper highlights the architectural concepts used to build ARDOISE. Then an analytical model is defined in order to complete the limits and the performances expected in the use of the dynamic reconfiguration scheme. An example in image segmentation is developed to show a possible partitioning methodology.
在法国,十个研究团队研究并构建了一个致力于实时图像处理的硬件架构(ARDOISE)。该架构使用新的FPGA电路允许的快速或动态重新配置。在视频帧期间,在同一硬件上依次计算几种算法。本文重点介绍了用于构建ARDOISE的体系结构概念。然后定义了一个解析模型,以完成动态重构方案使用的限制和预期性能。以图像分割为例,说明了一种可行的分割方法。
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引用次数: 24
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Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception
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