Pub Date : 1994-01-31DOI: 10.1109/MASCOT.1994.284449
E. Markatos, C. Chronaki
The exploitation of locality of reference in shared memory multiprocessors is one of the most important problems in parallel processing today. Locality can be managed in several levels: hardware, operating system, runtime environment of the compiler, and user level. In this paper we investigate the problem of exploiting locality at the operating system level and its interactions with the compiler and the architecture. Our main conclusion, based on trace-driven simulations of real applications, is that exploitation of locality is effective only if all three levels cooperate.<>
{"title":"Trace-driven simulation of data alignment and other factors affecting update and invalidate based coherent memory","authors":"E. Markatos, C. Chronaki","doi":"10.1109/MASCOT.1994.284449","DOIUrl":"https://doi.org/10.1109/MASCOT.1994.284449","url":null,"abstract":"The exploitation of locality of reference in shared memory multiprocessors is one of the most important problems in parallel processing today. Locality can be managed in several levels: hardware, operating system, runtime environment of the compiler, and user level. In this paper we investigate the problem of exploiting locality at the operating system level and its interactions with the compiler and the architecture. Our main conclusion, based on trace-driven simulations of real applications, is that exploitation of locality is effective only if all three levels cooperate.<<ETX>>","PeriodicalId":288344,"journal":{"name":"Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114856486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-01-31DOI: 10.1109/MASCOT.1994.284441
T. Atmaca, H. Perros, Y. Dallery
We study a multi-class queueing network which consists of a finite capacity node (node 0) linked to M parallel finite capacity nodes (nodes 1 to M). M classes of customers are assumed. All customers first join node 0. A class i customer after completion of its service at node 0 always joins the ith node. All service times and inter-arrival times are assumed to be exponentially distributed. The service priority at node 0 is head-of-line with preemption. When node i (i=1, 2, ..., M) is full, node 0 cannot process class i customers. In addition to the service priority at node 0, push-out is employed. That is, a customer that arrives at node 0 when the node is full, takes the space of a customer which has the lowest priority among the customers already in the node. If all customers in the node have a higher or equal priority, then the arriving customer is lost. This queueing network is analyzed approximately by decomposing it into individual nodes, and then analyzing each node separately. Node 0 is analyzed using a class by class decomposition. The approximation algorithm has been validated using simulation, and the approximate results have a good error.<>
{"title":"Approximate analysis of a multi-class open queueing network with class blocking and push-out","authors":"T. Atmaca, H. Perros, Y. Dallery","doi":"10.1109/MASCOT.1994.284441","DOIUrl":"https://doi.org/10.1109/MASCOT.1994.284441","url":null,"abstract":"We study a multi-class queueing network which consists of a finite capacity node (node 0) linked to M parallel finite capacity nodes (nodes 1 to M). M classes of customers are assumed. All customers first join node 0. A class i customer after completion of its service at node 0 always joins the ith node. All service times and inter-arrival times are assumed to be exponentially distributed. The service priority at node 0 is head-of-line with preemption. When node i (i=1, 2, ..., M) is full, node 0 cannot process class i customers. In addition to the service priority at node 0, push-out is employed. That is, a customer that arrives at node 0 when the node is full, takes the space of a customer which has the lowest priority among the customers already in the node. If all customers in the node have a higher or equal priority, then the arriving customer is lost. This queueing network is analyzed approximately by decomposing it into individual nodes, and then analyzing each node separately. Node 0 is analyzed using a class by class decomposition. The approximation algorithm has been validated using simulation, and the approximate results have a good error.<<ETX>>","PeriodicalId":288344,"journal":{"name":"Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114232708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-01-31DOI: 10.1109/MASCOT.1994.284410
S. Hung, K. Lam, K. Lam
The validity of many analytic studies of the performance of database systems are often hampered by the many approximations made. This is especially true of the way the block queue delays and deadlocks have been handled. An efficient approach to the derivation of the blocking delays of transactions under the static and dynamic two phase locking protocols is given. The problem of deadlocks which has either been neglected or assumed to be of cycle-length two (involving two transactions only) has also been tackled with some degree of success. The analysis is based on simple combinatorial arguments and probability theory. MVA techniques are then applied to the two models. Several conclusions can be drawn regarding the behaviour of the database systems. The analytic results show remarkable good agreement with simulation results.<>
{"title":"Efficient technique for performance analysis of locking protocols","authors":"S. Hung, K. Lam, K. Lam","doi":"10.1109/MASCOT.1994.284410","DOIUrl":"https://doi.org/10.1109/MASCOT.1994.284410","url":null,"abstract":"The validity of many analytic studies of the performance of database systems are often hampered by the many approximations made. This is especially true of the way the block queue delays and deadlocks have been handled. An efficient approach to the derivation of the blocking delays of transactions under the static and dynamic two phase locking protocols is given. The problem of deadlocks which has either been neglected or assumed to be of cycle-length two (involving two transactions only) has also been tackled with some degree of success. The analysis is based on simple combinatorial arguments and probability theory. MVA techniques are then applied to the two models. Several conclusions can be drawn regarding the behaviour of the database systems. The analytic results show remarkable good agreement with simulation results.<<ETX>>","PeriodicalId":288344,"journal":{"name":"Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114406918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-01-31DOI: 10.1109/MASCOT.1994.284438
Jenlong Wang, R. Quong
We investigate the feasibility of using instruction compression at some level in a multi-level memory hierarchy to increase memory system performance. Compression effectively increases the memory size and the line size reducing the miss rate at the expense of increased access latency due to decompression delays. We analytically evaluate the impact of compression on the average memory access time for various memory systems and compression approaches. Our results show the benefit of using compression is sensitive to the miss rates and miss penalties at the point of compression and to a lesser extent the amount of compression possible. For high performance workstations of today, compression already shows promise; as miss penalties increase in future, compression will only become more feasible.<>
{"title":"The feasibility of using compression to increase memory system performance","authors":"Jenlong Wang, R. Quong","doi":"10.1109/MASCOT.1994.284438","DOIUrl":"https://doi.org/10.1109/MASCOT.1994.284438","url":null,"abstract":"We investigate the feasibility of using instruction compression at some level in a multi-level memory hierarchy to increase memory system performance. Compression effectively increases the memory size and the line size reducing the miss rate at the expense of increased access latency due to decompression delays. We analytically evaluate the impact of compression on the average memory access time for various memory systems and compression approaches. Our results show the benefit of using compression is sensitive to the miss rates and miss penalties at the point of compression and to a lesser extent the amount of compression possible. For high performance workstations of today, compression already shows promise; as miss penalties increase in future, compression will only become more feasible.<<ETX>>","PeriodicalId":288344,"journal":{"name":"Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116021929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-01-31DOI: 10.1109/MASCOT.1994.284397
S. Schaffer, W. LaRue
The Block Oriented Network Simulator (BONeS) DESIGNER provides a graphical environment for modeling and discrete-event simulation of computer and communication networks, distributed computer systems, and computer architectures. DESIGNER uses a hierarchical data flow block diagram modeling paradigm which provides for definition of data structures that flow between blocks. This modeling paradigm provides sufficient flexibility to model and simulate a broad range discrete-event systems, including computer network and distributed processing systems.<>
{"title":"BONeS DESIGNER: a graphical environment for discrete-event modeling and simulation","authors":"S. Schaffer, W. LaRue","doi":"10.1109/MASCOT.1994.284397","DOIUrl":"https://doi.org/10.1109/MASCOT.1994.284397","url":null,"abstract":"The Block Oriented Network Simulator (BONeS) DESIGNER provides a graphical environment for modeling and discrete-event simulation of computer and communication networks, distributed computer systems, and computer architectures. DESIGNER uses a hierarchical data flow block diagram modeling paradigm which provides for definition of data structures that flow between blocks. This modeling paradigm provides sufficient flexibility to model and simulate a broad range discrete-event systems, including computer network and distributed processing systems.<<ETX>>","PeriodicalId":288344,"journal":{"name":"Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131830297","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-01-31DOI: 10.1109/MASCOT.1994.284432
M. Dikaiakos, Anne Rogers, K. Steiglitz
We extend the practical range of simulations of parallel executions by "functional algorithm simulation," that is, simulation without actually performing most of the numerical computations involved. We achieve this by introducing a new approach for generating and collecting communication and computation characteristics for a class of parallel scientific algorithms. We describe FAST (Fast Algorithm Simulation Testbed), a prototype system that we developed to implement and test our approach. FAST overcomes some of the difficulties imposed by the very high complexity of interesting scientific algorithms, collects profile information representative of the algorithms rather than the underlying mapping strategies and hardware design choices, and allows a performance assessment of parallel machines with various sites and different interconnection schemes.<>
{"title":"FAST: a functional algorithm simulation testbed","authors":"M. Dikaiakos, Anne Rogers, K. Steiglitz","doi":"10.1109/MASCOT.1994.284432","DOIUrl":"https://doi.org/10.1109/MASCOT.1994.284432","url":null,"abstract":"We extend the practical range of simulations of parallel executions by \"functional algorithm simulation,\" that is, simulation without actually performing most of the numerical computations involved. We achieve this by introducing a new approach for generating and collecting communication and computation characteristics for a class of parallel scientific algorithms. We describe FAST (Fast Algorithm Simulation Testbed), a prototype system that we developed to implement and test our approach. FAST overcomes some of the difficulties imposed by the very high complexity of interesting scientific algorithms, collects profile information representative of the algorithms rather than the underlying mapping strategies and hardware design choices, and allows a performance assessment of parallel machines with various sites and different interconnection schemes.<<ETX>>","PeriodicalId":288344,"journal":{"name":"Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"222 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121230392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-01-31DOI: 10.1109/MASCOT.1994.284386
S. Shankaranarayanan, W. Cyre
An English language description of a system is typically composed of many English sentences. Consider that each English language sentence is parsed and stored in the form of a conceptual graph that represents the semantics of the sentence. Since each of these conceptual graphs carries information only about the sentence it represents, the set of conceptual graphs must be "joined" logically in order to develop a single conceptual graph that represents the entire system. The process of identifying concept nodes in the conceptual graphs at which joins should be performed is referred to as coreference detection. The authors present a technique to perform coreference detection of object concepts (devices and values).<>
{"title":"Coreference detection in automatic analysis of specifications","authors":"S. Shankaranarayanan, W. Cyre","doi":"10.1109/MASCOT.1994.284386","DOIUrl":"https://doi.org/10.1109/MASCOT.1994.284386","url":null,"abstract":"An English language description of a system is typically composed of many English sentences. Consider that each English language sentence is parsed and stored in the form of a conceptual graph that represents the semantics of the sentence. Since each of these conceptual graphs carries information only about the sentence it represents, the set of conceptual graphs must be \"joined\" logically in order to develop a single conceptual graph that represents the entire system. The process of identifying concept nodes in the conceptual graphs at which joins should be performed is referred to as coreference detection. The authors present a technique to perform coreference detection of object concepts (devices and values).<<ETX>>","PeriodicalId":288344,"journal":{"name":"Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124177378","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-01-31DOI: 10.1109/MASCOT.1994.284423
Yi-Bing Lin, Dan Daly
We identify three goals for the graphical user interface (GUI) of a network simulation environment: user friendliness, model re-usability, and application extensibility. We address the user friendliness issue by proposing a simple yet efficient approach to setup parameters for the simulation models. We address the application extensibility issue by a two-layer GUI architecture. The two layers are loosely-coupled, and the first layer can be easily replaced (without affecting the other components of the simulation environment). We address the model re-usability issue by subnetworks. Unlike most existing simulation packages where subnetwork is simply a method to group the nodes, the subnetwork construct in our approach is an integral part of the simulation environment (i.e., all operations for a basic node also apply to a subnetwork). The port concept is used to explicitly define the I/O relationship between a subnetwork and the outside world. Parameter dialog boxes are used to set up the parameters for a subnetwork conveniently. Finally, a simple stack mechanism is proposed to measure subnetwork-wide output statistics.<>
{"title":"A flexible graphical user interface for performance modeling","authors":"Yi-Bing Lin, Dan Daly","doi":"10.1109/MASCOT.1994.284423","DOIUrl":"https://doi.org/10.1109/MASCOT.1994.284423","url":null,"abstract":"We identify three goals for the graphical user interface (GUI) of a network simulation environment: user friendliness, model re-usability, and application extensibility. We address the user friendliness issue by proposing a simple yet efficient approach to setup parameters for the simulation models. We address the application extensibility issue by a two-layer GUI architecture. The two layers are loosely-coupled, and the first layer can be easily replaced (without affecting the other components of the simulation environment). We address the model re-usability issue by subnetworks. Unlike most existing simulation packages where subnetwork is simply a method to group the nodes, the subnetwork construct in our approach is an integral part of the simulation environment (i.e., all operations for a basic node also apply to a subnetwork). The port concept is used to explicitly define the I/O relationship between a subnetwork and the outside world. Parameter dialog boxes are used to set up the parameters for a subnetwork conveniently. Finally, a simple stack mechanism is proposed to measure subnetwork-wide output statistics.<<ETX>>","PeriodicalId":288344,"journal":{"name":"Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116637132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1993-07-12DOI: 10.1109/MASCOT.1994.284444
K. Reid, R. Bunt
High-speed packet switched networks such as B-ISDN require algorithms to manage the flow of traffic into and through the network. End-to-end congestion control algorithms will do much to ensure that overload periods are minimized, but intelligent buffering decisions at internal nodes may aid in managing congestion by shifting cell loss to lower priority traffic. The authors describe a simulation study of three space priority queueing algorithms under realistic traffic models, and show that the performance of these algorithms depends on the shape and type of the traffic. The results of this research suggest that space priority algorithms, when combined with other congestion control algorithms, can aid in supporting acceptable quality of service for the users of the network.<>
{"title":"An analysis of space priority queueing in ATM switches","authors":"K. Reid, R. Bunt","doi":"10.1109/MASCOT.1994.284444","DOIUrl":"https://doi.org/10.1109/MASCOT.1994.284444","url":null,"abstract":"High-speed packet switched networks such as B-ISDN require algorithms to manage the flow of traffic into and through the network. End-to-end congestion control algorithms will do much to ensure that overload periods are minimized, but intelligent buffering decisions at internal nodes may aid in managing congestion by shifting cell loss to lower priority traffic. The authors describe a simulation study of three space priority queueing algorithms under realistic traffic models, and show that the performance of these algorithms depends on the shape and type of the traffic. The results of this research suggest that space priority algorithms, when combined with other congestion control algorithms, can aid in supporting acceptable quality of service for the users of the network.<<ETX>>","PeriodicalId":288344,"journal":{"name":"Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-07-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127578400","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/MASCOT.1994.284384
C. Vu Duy
An open queueing network system of N nodes with Geo(A/sub i/) input and Geo(S/sub i/) service at every node is studied. Geo(A/sub i/) and Geo(S/sub i/) mean compound geometric. First the author is interested in the cases of eventual independent departure from every node as the isolated queueing system Geo(A/sub i/)/Geo(S/sub i/)/1. Then the author looks for a configuration of the network which is product form solution compatible. Lastly, the necessary and sufficient condition for an open Markovian queueing network of N nodes to have a solution of product form is proved. A certain number of open Markovian queueing networks which have a solution of product form are found.<>
{"title":"Discrete time open queueing networks with feedback, bulk arrivals and services","authors":"C. Vu Duy","doi":"10.1109/MASCOT.1994.284384","DOIUrl":"https://doi.org/10.1109/MASCOT.1994.284384","url":null,"abstract":"An open queueing network system of N nodes with Geo(A/sub i/) input and Geo(S/sub i/) service at every node is studied. Geo(A/sub i/) and Geo(S/sub i/) mean compound geometric. First the author is interested in the cases of eventual independent departure from every node as the isolated queueing system Geo(A/sub i/)/Geo(S/sub i/)/1. Then the author looks for a configuration of the network which is product form solution compatible. Lastly, the necessary and sufficient condition for an open Markovian queueing network of N nodes to have a solution of product form is proved. A certain number of open Markovian queueing networks which have a solution of product form are found.<<ETX>>","PeriodicalId":288344,"journal":{"name":"Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114855242","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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