Pub Date : 2016-07-25DOI: 10.5220/0006008001160121
B. Antal
In this paper, an automatic approach to predict 3D coordinates from stereo laparoscopic images is presented. The approach maps a vector of pixel intensities to 3D coordinates through training a six layer deep neural network. The architectural aspects of the approach is presented and in detail and the method is evaluated on a publicly available dataset with promising results.
{"title":"Automatic 3D Point Set Reconstruction from Stereo Laparoscopic Images using Deep Neural Networks","authors":"B. Antal","doi":"10.5220/0006008001160121","DOIUrl":"https://doi.org/10.5220/0006008001160121","url":null,"abstract":"In this paper, an automatic approach to predict 3D coordinates from stereo laparoscopic images is presented. The approach maps a vector of pixel intensities to 3D coordinates through training a six layer deep neural network. The architectural aspects of the approach is presented and in detail and the method is evaluated on a publicly available dataset with promising results.","PeriodicalId":298357,"journal":{"name":"International Conference on Pervasive and Embedded Computing and Communication Systems","volume":"39 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116537807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-07-25DOI: 10.5220/0005944600890096
A. Ahrens, S. Lochmann
Within the last years the multiple-input multiple-output (MIMO) technology has revolutionized the optical fibre community. Theoretically, the concept of MIMO is well understood and shows some similarities to wireless MIMO systems. However, practical implementations of optical components are in the focus of interest of substantial research. Optical couplers have long been used as passive optical components also being able to combine or split SISO (single-input single-output) data transmission. They have been proven to be well suited for the optical MIMO (multiple-input multiple-output) transmission despite their insertion losses and asymmetries. Nowadays, next to optical couplers, Photonic Lanterns (PLs) have attracted a lot of attention in the research community as they offer the benefit of a low loss transition from the input fibers to the modes supported by the waveguide at its output. Therefore they seem to be highly beneficial for optical MIMO communication. In this contribution mode coupling and splitting devices such as PLs and fusion couplers have been analysed in a testbed with regard to their respective MIMO suitability. Based on the obtained results, a simplified time-domain MIMO simulation model including PLs for mode-combining at the transmitter side as well as mode-splitting at the receiver side is elaborated. Our results obtained by the simulated bit-error rate (BER) performance show that PLs are well suited for the optical MIMO transmission.
{"title":"Mode Combining and -Splitting in Optical MIMO Transmission using Photonic Lanterns","authors":"A. Ahrens, S. Lochmann","doi":"10.5220/0005944600890096","DOIUrl":"https://doi.org/10.5220/0005944600890096","url":null,"abstract":"Within the last years the multiple-input multiple-output (MIMO) technology has revolutionized the optical \u0000 \u0000fibre community. Theoretically, the concept of MIMO is well understood and shows some similarities to wireless \u0000 \u0000MIMO systems. However, practical implementations of optical components are in the focus of interest \u0000 \u0000of substantial research. Optical couplers have long been used as passive optical components also being able \u0000 \u0000to combine or split SISO (single-input single-output) data transmission. They have been proven to be well \u0000 \u0000suited for the optical MIMO (multiple-input multiple-output) transmission despite their insertion losses and \u0000 \u0000asymmetries. Nowadays, next to optical couplers, Photonic Lanterns (PLs) have attracted a lot of attention in \u0000 \u0000the research community as they offer the benefit of a low loss transition from the input fibers to the modes \u0000 \u0000supported by the waveguide at its output. Therefore they seem to be highly beneficial for optical MIMO communication. \u0000 \u0000In this contribution mode coupling and splitting devices such as PLs and fusion couplers have \u0000 \u0000been analysed in a testbed with regard to their respective MIMO suitability. Based on the obtained results, a \u0000 \u0000simplified time-domain MIMO simulation model including PLs for mode-combining at the transmitter side as \u0000 \u0000well as mode-splitting at the receiver side is elaborated. Our results obtained by the simulated bit-error rate \u0000 \u0000(BER) performance show that PLs are well suited for the optical MIMO transmission.","PeriodicalId":298357,"journal":{"name":"International Conference on Pervasive and Embedded Computing and Communication Systems","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117173097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-07-25DOI: 10.5220/0005944001050109
Myounghwan Choi, J. Ahn, Dae-jin Park, Yujin Jeong, Sangyeol Lee, Sanghyub Lee, D. Cho, Y. Goo, K. Koo
Electrical stimulation on retinal ganglion cells (RGCs) induce the short-latency (directly-evoked) and long-latency (indirectly-evoked) responses of RGCs. The artifact suppression and isolation of direct RGC spike is required for proper analysis of visual information. Adaptive forward-reverse filter (FR filter) using interpolation method is proposed and evaluated. On selected over 1.6 ms waves, which is suspected as artifact, 2 new data points are linearly interpolated between the recorded data points. After that, the interpolated data are filtered by frequency-based FR filter (500 Hz). The proposed algorithm shows the best true positive rate (0.7629) comparing with the SALPA and the simple FR filter without the interpolation method. In point of view of the false positive rate, the proposed algorithm demonstrates the second-best performance (0.0047), not better than the SALPA (0.0006).
{"title":"Adaptive Forward-Reverse Filter using Interpolation Methods for Artifact Suppression in Retinal Prostheses","authors":"Myounghwan Choi, J. Ahn, Dae-jin Park, Yujin Jeong, Sangyeol Lee, Sanghyub Lee, D. Cho, Y. Goo, K. Koo","doi":"10.5220/0005944001050109","DOIUrl":"https://doi.org/10.5220/0005944001050109","url":null,"abstract":"Electrical stimulation on retinal ganglion cells (RGCs) induce the short-latency (directly-evoked) and long-latency (indirectly-evoked) responses of RGCs. The artifact suppression and isolation of direct RGC spike is required for proper analysis of visual information. Adaptive forward-reverse filter (FR filter) using interpolation method is proposed and evaluated. On selected over 1.6 ms waves, which is suspected as artifact, 2 new data points are linearly interpolated between the recorded data points. After that, the interpolated data are filtered by frequency-based FR filter (500 Hz). The proposed algorithm shows the best true positive rate (0.7629) comparing with the SALPA and the simple FR filter without the interpolation method. In point of view of the false positive rate, the proposed algorithm demonstrates the second-best performance (0.0047), not better than the SALPA (0.0006).","PeriodicalId":298357,"journal":{"name":"International Conference on Pervasive and Embedded Computing and Communication Systems","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133526272","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-01-10DOI: 10.5220/0004707500050013
Jorge C. S. Cardoso
Jorge Cardoso has been supported by “Fundacao para a Ciencia e Tecnologia” (FCT) and “Programa Operacional Ciencia e Inovacao 2010”, co-funded by the Portuguese Government and European Union by FEDER Program and by FCT training grant SFRH/BD/47354/2008.
{"title":"Dynamic Graphical User Interface Generation for Web-based Public Display Applications","authors":"Jorge C. S. Cardoso","doi":"10.5220/0004707500050013","DOIUrl":"https://doi.org/10.5220/0004707500050013","url":null,"abstract":"Jorge Cardoso has been supported by “Fundacao para a Ciencia e Tecnologia” (FCT) and “Programa Operacional Ciencia e Inovacao 2010”, co-funded by the Portuguese Government and European Union by FEDER Program and by FCT training grant SFRH/BD/47354/2008.","PeriodicalId":298357,"journal":{"name":"International Conference on Pervasive and Embedded Computing and Communication Systems","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123381005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article deals with the fixed-point computation of the sum-of-products, necessary for the implementation of several algorithms, including linear filters. Fixed-point arithmetic implies output errors to be controlled. So, a new method is proposed to perform accurate computation of the filter and minimize the word-lengths of the operations. This is done by removing bits from operands that don't impact the final result under a given limit. Then, the final output of linear filter is guaranteed to be a faithful rounding of the real output.
{"title":"Formatting Bits to Better Implement Signal Processing Algorithms","authors":"Benoit Lopez, Thibault Hilaire, Laurent-Stéphane Didier","doi":"10.5220/0004711201040111","DOIUrl":"https://doi.org/10.5220/0004711201040111","url":null,"abstract":"This article deals with the fixed-point computation of the sum-of-products, necessary for the implementation of several algorithms, including linear filters. Fixed-point arithmetic implies output errors to be controlled. So, a new method is proposed to perform accurate computation of the filter and minimize the word-lengths of the operations. This is done by removing bits from operands that don't impact the final result under a given limit. Then, the final output of linear filter is guaranteed to be a faithful rounding of the real output.","PeriodicalId":298357,"journal":{"name":"International Conference on Pervasive and Embedded Computing and Communication Systems","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-01-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134208454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-01-07DOI: 10.5220/0004884802040214
M. Martel, Amine Najahi, G. Revy
In digital signal processing, many primitives boil down to a matrix multiplication. In order to enable savings in time, energy consumption, and on-chip area, these primitives are often implemented in fixed-point arithmetic. Various conflicting goals undermine the process of writing fixed-point codes, such as numerical accuracy, run-time latency, and size of the codes. In this article, we introduce a new methodology to automate the synthesis of small and accurate codes for matrix multiplication in fixed-point arithmetic. Our approach relies on a heuristic to merge matrix rows or columns in order to reduce the synthesized code size, while guaranteeing a target accuracy. We suggest a merging strategy based on finding closest pairs of vectors, which makes it possible to address in a few seconds problems such as the synthesis of small and accurate codes for size-64 and more matrix multiplication. Finally, we illustrate its efficiency on a set of benchmarks, and we show that it allows to reduce the synthesized code size by more than 50% while maintaining good numerical properties.
{"title":"Code Size and Accuracy-aware Synthesis of Fixed-point Programs for Matrix Multiplication","authors":"M. Martel, Amine Najahi, G. Revy","doi":"10.5220/0004884802040214","DOIUrl":"https://doi.org/10.5220/0004884802040214","url":null,"abstract":"In digital signal processing, many primitives boil down to a matrix multiplication. In order to enable savings in time, energy consumption, and on-chip area, these primitives are often implemented in fixed-point arithmetic. Various conflicting goals undermine the process of writing fixed-point codes, such as numerical accuracy, run-time latency, and size of the codes. In this article, we introduce a new methodology to automate the synthesis of small and accurate codes for matrix multiplication in fixed-point arithmetic. Our approach relies on a heuristic to merge matrix rows or columns in order to reduce the synthesized code size, while guaranteeing a target accuracy. We suggest a merging strategy based on finding closest pairs of vectors, which makes it possible to address in a few seconds problems such as the synthesis of small and accurate codes for size-64 and more matrix multiplication. Finally, we illustrate its efficiency on a set of benchmarks, and we show that it allows to reduce the synthesized code size by more than 50% while maintaining good numerical properties.","PeriodicalId":298357,"journal":{"name":"International Conference on Pervasive and Embedded Computing and Communication Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-01-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127362903","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-01-07DOI: 10.5220/0004756301680173
Albert Royo Manjon, E. Simon, Sébastien Jean
Advancing towards the Internet of Things, a need for bigger connectivity between every time smaller embedded devices is foreseen. In the near future, heterogeneous resource-restricted devices will probably have a set of services with a strong need for connection. Two needs are envisioned as mandatory: flexibility and security. There is firstly a need for some degree of isolation between services but there is also a need for services to be able to have their runtime altered without having to stop the whole platform. This generates a clash of interests and needs, since achieving both flexibility and security balanced is apparently incompatible. The purpose of this article is to explain the needs and requirements that such systems will most surely have, as well as inspiring technologies and related works, in order to advance towards a platform with flexible and secure services that will add bigger capabilities to the devices.
{"title":"Towards a Flexible and Secure Runtime for Embedded Devices","authors":"Albert Royo Manjon, E. Simon, Sébastien Jean","doi":"10.5220/0004756301680173","DOIUrl":"https://doi.org/10.5220/0004756301680173","url":null,"abstract":"Advancing towards the Internet of Things, a need for bigger connectivity between every time smaller embedded devices is foreseen. In the near future, heterogeneous resource-restricted devices will probably have a set of services with a strong need for connection. Two needs are envisioned as mandatory: flexibility and security. There is firstly a need for some degree of isolation between services but there is also a need for services to be able to have their runtime altered without having to stop the whole platform. This generates a clash of interests and needs, since achieving both flexibility and security balanced is apparently incompatible. The purpose of this article is to explain the needs and requirements that such systems will most surely have, as well as inspiring technologies and related works, in order to advance towards a platform with flexible and secure services that will add bigger capabilities to the devices.","PeriodicalId":298357,"journal":{"name":"International Conference on Pervasive and Embedded Computing and Communication Systems","volume":"62 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-01-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127391980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A nonzero residual intersymbol interference (ISI) causes the symbol error rate (SER) to increase where the achievable SER may not answer any more on the system’s requirements. In the literature, we may find for the single-input-single-output (SISO) case a closed-form approximated expression for the SER that takes into account the achievable performance of the chosen blind adaptive equalizer from the residual ISI point of view and a closed-form approximated expression for the residual ISI valid for the single-input-multiple-output (SIMO) case. Both expressions were obtained by assuming that the input noise is a white Gaussian process where the Hurst exponent (H) is equal to 0.5. In this paper, we derive a closed-form approximated expression for the residual ISI obtained by blind adaptive equalizers for the SIMO case, valid for fractional Gaussian noise (fGn) input where the Hurst exponent is in the region of . Based on this new expression for the residual ISI, a closed-form approximated expression is obtained for the SER valid for the SIMO and fGn case. In this paper, we show via simulation results that the SER might get improved for increasing values of H.
{"title":"Symbol Error Rate as a Function of the Residual ISI Obtained by Blind Adaptive Equalizers","authors":"M. Pinchas","doi":"10.1155/2013/860389","DOIUrl":"https://doi.org/10.1155/2013/860389","url":null,"abstract":"A nonzero residual intersymbol interference (ISI) causes the symbol error rate (SER) to increase where the achievable SER may not answer any more on the system’s requirements. In the literature, we may find for the single-input-single-output (SISO) case a closed-form approximated expression for the SER that takes into account the achievable performance of the chosen blind adaptive equalizer from the residual ISI point of view and a closed-form approximated expression for the residual ISI valid for the single-input-multiple-output (SIMO) case. Both expressions were obtained by assuming that the input noise is a white Gaussian process where the Hurst exponent (H) is equal to 0.5. In this paper, we derive a closed-form approximated expression for the residual ISI obtained by blind adaptive equalizers for the SIMO case, valid for fractional Gaussian noise (fGn) input where the Hurst exponent is in the region of . Based on this new expression for the residual ISI, a closed-form approximated expression is obtained for the SER valid for the SIMO and fGn case. In this paper, we show via simulation results that the SER might get improved for increasing values of H.","PeriodicalId":298357,"journal":{"name":"International Conference on Pervasive and Embedded Computing and Communication Systems","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126869778","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-02-19DOI: 10.5220/0004311700160025
J. Diguet, N. Bergmann, Jean-Christophe Morgère
With upcoming see-through displays new kinds of applications of Augmented Reality are emerging. However this also raises questions about the design of associated embedded systems that must be lightweight and handle object positioning, heterogeneous sensors, wireless communications as well as graphic computation. This paper studies the specific case of a promising Mobile AR processor, which is different from usual graphics applications. A complete architecture is described, designed and prototyped on FPGA. It includes hardware/software partitioning based on the analysis of application requirements. The specification of an original and flexible coprocessor is detailed. Choices as well as optimizations of algorithms are also described. Implementation results and performance evaluation show the relevancy of the proposed approach and demonstrate a new kind of architecture focused on object processing and optimized for the AR domain.
{"title":"Embedded System Architecture for Mobile Augmented Reality - Sailor Assistance Case Study","authors":"J. Diguet, N. Bergmann, Jean-Christophe Morgère","doi":"10.5220/0004311700160025","DOIUrl":"https://doi.org/10.5220/0004311700160025","url":null,"abstract":"With upcoming see-through displays new kinds of applications of Augmented Reality are emerging. However this also raises questions about the design of associated embedded systems that must be lightweight and handle object positioning, heterogeneous sensors, wireless communications as well as graphic computation. This paper studies the specific case of a promising Mobile AR processor, which is different from usual graphics applications. A complete architecture is described, designed and prototyped on FPGA. It includes hardware/software partitioning based on the analysis of application requirements. The specification of an original and flexible coprocessor is detailed. Choices as well as optimizations of algorithms are also described. Implementation results and performance evaluation show the relevancy of the proposed approach and demonstrate a new kind of architecture focused on object processing and optimized for the AR domain.","PeriodicalId":298357,"journal":{"name":"International Conference on Pervasive and Embedded Computing and Communication Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-02-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114143661","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-02-19DOI: 10.5220/0004389702520261
L. Guang, Syed M. A. H. Jafri, Bo Yang, J. Plosila, H. Tenhunen
Hierarchical supporting structures for dynamic organization in many-core computing systems are presented. With profound hardware variations and unpredictable errors, dependability becomes a challenging issue in the emerging many-core systems. To provide fault-tolerance against processor failures or performance degradation, dynamic organization is proposed which allows clusters to be created and updated at the run-time. Hierarchical supporting structures are designed for each level of monitoring agents, to enable the tracing, storing and updating of component and system status. These supporting structures need to follow software/hardware co-design to provide small and scalable overhead, while accommodating the functions of agents on the corresponding level. This paper presents the architectural design, functional simulation and implementation analysis. The study demonstrates that the proposed structures facilitate the dynamic organization in case of processor failures and incur small area overhead on many-core systems.
{"title":"Hierarchical Supporting Structure for Dynamic Organization in Many-core Computing Systems","authors":"L. Guang, Syed M. A. H. Jafri, Bo Yang, J. Plosila, H. Tenhunen","doi":"10.5220/0004389702520261","DOIUrl":"https://doi.org/10.5220/0004389702520261","url":null,"abstract":"Hierarchical supporting structures for dynamic organization in many-core computing systems are presented. With profound hardware variations and unpredictable errors, dependability becomes a challenging issue in the emerging many-core systems. To provide fault-tolerance against processor failures or performance degradation, dynamic organization is proposed which allows clusters to be created and updated at the run-time. Hierarchical supporting structures are designed for each level of monitoring agents, to enable the tracing, storing and updating of component and system status. These supporting structures need to follow software/hardware co-design to provide small and scalable overhead, while accommodating the functions of agents on the corresponding level. This paper presents the architectural design, functional simulation and implementation analysis. The study demonstrates that the proposed structures facilitate the dynamic organization in case of processor failures and incur small area overhead on many-core systems.","PeriodicalId":298357,"journal":{"name":"International Conference on Pervasive and Embedded Computing and Communication Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-02-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131498730","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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