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2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)最新文献

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A MM-wave monolithic Gilbert-cell mixer 毫米波单片吉尔伯特单元混频器
A. Dearn, L. Devlin
This paper describes the application of the well-known Gilbert-cell mixer technique at MM-wave frequencies. A pseudomorphic HEMT monolithic design is described, in conjunction with a bondwire compensation technique, to produce low conversion loss (<4 dB) with low LO power at frequencies beyond 40 GHz.
本文介绍了著名的吉尔伯特单元混频器技术在毫米波频率上的应用。描述了一种伪晶HEMT单片设计,结合键合线补偿技术,在超过40 GHz的频率下产生低转换损耗(<4 dB)和低LO功率。
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引用次数: 2
Ka-band RF MEMS phase shifters for phased array applications 用于相控阵应用的ka波段射频MEMS移相器
B. Pillans, S. Eshelman, A. Malczewski, J. Ehmke, C. Goldsmith
RF MEMS switches provide a cheap and effective way to substantially reduce loss in RF and microwave MMICs. In this paper, progress in building low loss Ka-band phase shifters using RF MEMS capacitive switches is demonstrated. Using a switched transmission line 4-bit resonant phase shifter, an average insertion loss of 2.25 dB was obtained with better than 15 dB return loss. A similar 3-bit phase shifter produced an average insertion loss of 1.7 dB with better than 13 dB return loss. A simple, low loss way to package these devices is also presented.
射频MEMS开关提供了一种廉价而有效的方法来大幅降低射频和微波微控制器的损耗。本文介绍了利用射频MEMS电容开关构建低损耗ka波段移相器的研究进展。采用开关传输线4位谐振移相器,平均插入损耗为2.25 dB,回波损耗优于15 dB。类似的3位移相器产生的平均插入损耗为1.7 dB,回波损耗优于13 dB。提出了一种简单、低损耗的封装方法。
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引用次数: 20
Ultra low power GaAs MMIC low noise amplifier for smart antenna combining at 5.2 GHz 用于5.2 GHz智能天线组合的超低功耗GaAs MMIC低噪声放大器
F. Ellinger, U. Lott, W. Bachtold
A switchable GaAs MMIC cascode low noise amplifier for smart antenna combining at 5.2 GHz (HIPERLAN) is presented using a standard 0.6 /spl mu/m MESFET process. A gain of 12.3 dB and a noise figure of 2.4 dB are measured, drawing only 1.2 mA from a 1 V supply. A gain/P/sub dc/ figure of merit of 10 dB/mW is achieved, which to our knowledge is the highest ever reported at C-band.
提出了一种用于5.2 GHz (HIPERLAN)智能天线组合的可切换GaAs MMIC级联低噪声放大器,采用标准的0.6 /spl mu/m MESFET工艺。测量到的增益为12.3 dB,噪声系数为2.4 dB,从1v电源仅汲取1.2 mA。实现了10 dB/mW的增益/P/子dc/优值,据我们所知,这是c波段有史以来报道的最高值。
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引用次数: 18
A 3.2 V, 45% efficient, novel Class AB+C CDMA MMIC power amplifier using quasi enhancement mode PHEMTs 一种采用准增强模式PHEMTs的3.2 V, 45%效率的新型AB+C类CDMA MMIC功率放大器
J. Cao, X.W. Wang, C. Quek, R. Singh, H. Nakamura
This paper presents a novel power amplifier (PA) configuration (Class AB+C) which allows low quiescent current and thereby high PAE at low output power levels to be achieved without compromising high power linearity. The designed 800 MHz CDMA PA using quasi enhancement PHEMT process attained over 45% PAE, 0.8-watt output power and 33 dB gain at -43 dBc adjacent channel power rejection (ACPR), at a supply voltage of 3.2 V. The total quiescent current consumed is only 52 mA. In contrast, the conventional Class AB configuration required 82 mA to achieve similar performance.
本文提出了一种新的功率放大器(PA)配置(AB+C类),它允许低静态电流,从而在低输出功率水平下实现高PAE,而不影响高功率线性度。设计的800 MHz CDMA PA采用准增强PHEMT工艺,在-43 dBc的相邻通道功率抑制(ACPR)下,在3.2 V的电源电压下获得了超过45%的PAE, 0.8 w的输出功率和33 dB的增益。总的静态电流消耗仅为52毫安。相比之下,传统的AB类配置需要82 mA才能达到类似的性能。
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引用次数: 7
Monolithic GaAs-InGaP HBT balanced vector modulators for millimeter-wave wireless systems 用于毫米波无线系统的单片GaAs-InGaP HBT平衡矢量调制器
A. E. Ashtiani, T. Gokdemir, A. Vilches, Z. Hu, I. Robertson, S. Marsh
This paper describes the design and performance of millimeter-wave balanced vector modulators employing the Marconi HBT MMIC technology. Two versions have been fabricated for operation at 38 GHz; the first employs normal Lange couplers whilst the second employs miniaturised microstrip couplers, which reduce the MMIC chip area by more than 40%. With a simple bias calibration technique the circuits achieve near-perfect constellations with negligible amplitude and phase errors over a wide bandwidth.
本文介绍了采用马可尼HBT MMIC技术的毫米波平衡矢量调制器的设计和性能。已经制造了两个版本用于38ghz的工作;第一种采用普通的兰格耦合器,而第二种采用小型化微带耦合器,这将MMIC芯片面积减少了40%以上。通过简单的偏置校准技术,电路实现了近乎完美的星座,在宽带宽范围内的幅度和相位误差可以忽略不计。
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引用次数: 11
A low-IF polyphase receiver for GSM using log-domain signal processing 采用对数域信号处理的GSM低中频多相接收机
B. Minnis, P. Moore, A. Payne, A. C. Caswell, M. Barnard
The design of a polyphase receiver for GSM is presented. Compared with a superhet solution, it offers similar performance but is very much easier to integrate on silicon without the need for off-chip channel filters. Compared with a zero-IF solution, a substantial improvement in performance is achieved by virtue of eliminating the problems with DC offsets and IP/sub 2/ generation. The use of log-domain signal processing leads to simplifications in the digital baseband and eliminates the need for AGC.
介绍了一种GSM多相接收机的设计。与超高温解决方案相比,它提供类似的性能,但更容易集成在硅片上,而不需要片外通道滤波器。与零中频解决方案相比,由于消除了直流偏移和IP/sub 2/生成问题,性能得到了实质性的提高。对数域信号处理的使用简化了数字基带,消除了对AGC的需求。
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引用次数: 15
A new design approach for variable-gain low noise amplifiers 一种变增益低噪声放大器的新设计方法
S. Pennisi, S. Scaccianoce, G. Palmisano
A new approach to the design of variable-gain low noise amplifiers is presented in which input and output signals can be switched among circuit branches with different features. It can be arranged for high linearity performance and/or different frequency shapes. Moreover, it allows matching conditions for multi-band applications to be met. As a design example, a 900 MHz three-gain level low noise amplifier was designed in a 20 GHz bipolar technology. The circuit exhibits a maximum gain and a noise figure of 26 dB and 2.1 dB, respectively and provides accurate input and output matching.
提出了一种可变增益低噪声放大器的设计方法,该方法的输入和输出信号可以在具有不同特征的电路支路之间切换。它可以安排为高线性性能和/或不同的频率形状。此外,它还可以满足多频段应用的匹配条件。作为设计实例,设计了一个采用20 GHz双极技术的900 MHz三增益低噪声放大器。该电路的最大增益和噪声系数分别为26 dB和2.1 dB,并提供精确的输入和输出匹配。
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引用次数: 15
A direct conversion transceiver for multi-band GSM application 用于多频段GSM应用的直接转换收发器
J. Strange, S. Atkinson
The use of direct conversion receiver topologies has been marked by many technical problems, particularly when used in a TDMA environment. This paper describes a receiver architecture that overcomes many of the traditional problems associated with direct conversion. This architecture has been applied in the design of a GSM multi-band transceiver that also features a development of the offset PLL transmitter together with a fast locking fractional-N synthesizer.
直接转换接收器拓扑的使用存在许多技术问题,特别是在TDMA环境中使用时。本文描述了一种克服了许多与直接转换相关的传统问题的接收机架构。该架构已应用于GSM多波段收发器的设计,该收发器还具有开发偏移锁相环发射器以及快速锁定分数n合成器的功能。
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引用次数: 44
An 18-21 GHz InP DHBT linear microwave Doherty amplifier 一种18-21 GHz InP DHBT线性微波多尔蒂放大器
K. Kobayashi, A. Oki, A. Gutierrez-Aitken, P. Chin, Li Yang, E. Kaneshiro, P. Grossman, K. Sato, T. Block, H. Yen, D. Streit
This work describes the first demonstration of an InP DHBT MMIC Doherty amplifier at K-band. When combined with InP DHBTs, the Doherty amplifier achieves a record linear PAE of 20% under a strict C/IM3 linearity ratio of 30 dBc while producing a Pout of 20.1 dBm. This benchmarks 3 dB greater Pout and 4% higher linear PAE than achieved with a PHEMT MMIC Doherty amplifier at Ku-band for the same C/IM3 linearity. Compared to its own linear "class A" bias performance, the Doherty amplifier achieves an 11 dB improvement in C/IM3 for the same Pout and slightly greater efficiency. The superior linearity of the InP DHBT Doherty amplifier approach is attractive for satellite and MM-wave communication systems.
这项工作描述了在k波段的InP DHBT MMIC多尔蒂放大器的首次演示。当与InP dhbt结合使用时,Doherty放大器在严格的C/IM3线性比为30 dBc的情况下实现了20%的线性PAE,同时产生20.1 dBm的输出。在相同的C/IM3线性度下,与ku波段的PHEMT MMIC Doherty放大器相比,该基准输出提高了3 dB,线性PAE提高了4%。与其自身的线性“A类”偏置性能相比,Doherty放大器在相同的输出端和略高的效率下实现了C/IM3的11 dB改进。InP DHBT Doherty放大器的优越线性度对卫星和毫米波通信系统具有吸引力。
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引用次数: 27
A monolithic 2.8 V, 3.2 W silicon bipolar power amplifier with 54% PAE at 900 MHz 单片式 2.8 V、3.2 W 硅双极功率放大器,900 MHz 时 PAE 为 54
A. Heinz, W. Simburger, H. Wohlmuth, P. Weger, W. Wilhelm, R. Gabl, K. Aufinger
This work presents a balanced two-stage monolithic power amplifier in Si bipolar technology for 0.8-1 GHz. On-chip transformers are used as input-baluns as well as for interstage matching. A closed-loop bias circuit is introduced to diminish break-down effects and increase the maximum usable supply voltage. The chip is operating from 2.8 V to 4.5 V. At 2.8 V the output power is 3.2 W with a power-added efficiency of 54%. The maximum output power of 7.7 W with an efficiency of 57% is achieved at 4.5 V supply voltage. The small-signal gain is 38 dB.
这项研究采用硅双极技术,提出了一种 0.8-1 千兆赫的平衡两级单片功率放大器。片上变压器用作输入平衡器和级间匹配。芯片采用了闭环偏置电路,以减少击穿效应并提高最大可用电源电压。芯片的工作电压为 2.8 V 至 4.5 V。在 2.8 V 时,输出功率为 3.2 W,功率附加效率为 54%。在 4.5 V 电源电压下,最大输出功率为 7.7 W,效率为 57%。小信号增益为 38 dB。
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引用次数: 1
期刊
2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)
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