Pub Date : 2000-06-11DOI: 10.1109/MWSYM.2000.860876
A. Fujihara, E. Mizuki, H. Miyamoto, Y. Makino, K. Yamanoguchi, N. Samoto
We describe a 60-GHz coplanar MMIC low-noise amplifier (LNA) using 0.1 /spl mu/m-gate-length InP heterojunction FETs (HJFETs). An optimum gate width of 80 /spl mu/m was determined for the first stage FET by using a small signal model including accurate scaling of the gate resistance. On-wafer noise measurements demonstrated a noise figure of 2.2 dB and a gain of 22.8 dB at 60 GHz.
{"title":"High performance 60-GHz coplanar MMIC LNA using InP heterojunction FETs with AlAs/InAs superlattice layer","authors":"A. Fujihara, E. Mizuki, H. Miyamoto, Y. Makino, K. Yamanoguchi, N. Samoto","doi":"10.1109/MWSYM.2000.860876","DOIUrl":"https://doi.org/10.1109/MWSYM.2000.860876","url":null,"abstract":"We describe a 60-GHz coplanar MMIC low-noise amplifier (LNA) using 0.1 /spl mu/m-gate-length InP heterojunction FETs (HJFETs). An optimum gate width of 80 /spl mu/m was determined for the first stage FET by using a small signal model including accurate scaling of the gate resistance. On-wafer noise measurements demonstrated a noise figure of 2.2 dB and a gain of 22.8 dB at 60 GHz.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"124 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123181940","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-06-11DOI: 10.1109/RFIC.2000.854465
J. Tissier, W. Mouzannar, L. Billonnet, B. Jarry, P. Guillon
Two bandpass active filters using novel alternative design methods based upon combined and simultaneous amplification matching and filtering approaches have been successfully implemented. The originality of these two methods resides in their flexibility compared to the classical input and output matching lumped elements networks design method. With the first methodology based upon the combination of amplification/matching and of filtering approaches, a 5% measured relative bandwidth at 32.825 GHz has been achieved. The second approach, based upon the combination of two-step matching/filtering and of amplification is demonstrated with the design of a filter with 11% measured relative bandwidth at 14.04 GHz.
{"title":"Novel alternative design methods based upon combined amplification, matching and filtering approaches in MMIC technology","authors":"J. Tissier, W. Mouzannar, L. Billonnet, B. Jarry, P. Guillon","doi":"10.1109/RFIC.2000.854465","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854465","url":null,"abstract":"Two bandpass active filters using novel alternative design methods based upon combined and simultaneous amplification matching and filtering approaches have been successfully implemented. The originality of these two methods resides in their flexibility compared to the classical input and output matching lumped elements networks design method. With the first methodology based upon the combination of amplification/matching and of filtering approaches, a 5% measured relative bandwidth at 32.825 GHz has been achieved. The second approach, based upon the combination of two-step matching/filtering and of amplification is demonstrated with the design of a filter with 11% measured relative bandwidth at 14.04 GHz.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114503545","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-06-10DOI: 10.1109/RFIC.2000.854430
A. Giry, J.-M. Fourniert, M. Pons
This paper describes the design methodology and measured performances of a monolithic two-stage RF power amplifier realized in a 0.35 /spl mu/m CMOS technology. Under 2.5 V supply, good linearity is achieved and an output power of 23.5 dBm with an associated PAE of 35% is obtained at 19 GHz. The obtained performances give an insight into CMOS potentialities for medium power RF amplification.
本文介绍了一种以0.35 /spl μ l /m CMOS技术实现的单片两级射频功率放大器的设计方法和实测性能。在2.5 V电源下，实现了良好的线性度，在19 GHz下获得了23.5 dBm的输出功率，相关PAE为35%。所获得的性能为CMOS在中功率射频放大方面的潜力提供了深入的见解。
{"title":"A 1.9 GHz low voltage CMOS power amplifier for medium power RF applications","authors":"A. Giry, J.-M. Fourniert, M. Pons","doi":"10.1109/RFIC.2000.854430","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854430","url":null,"abstract":"This paper describes the design methodology and measured performances of a monolithic two-stage RF power amplifier realized in a 0.35 /spl mu/m CMOS technology. Under 2.5 V supply, good linearity is achieved and an output power of 23.5 dBm with an associated PAE of 35% is obtained at 19 GHz. The obtained performances give an insight into CMOS potentialities for medium power RF amplification.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124803295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-06-10DOI: 10.1109/RFIC.2000.854420
J. Young
The Gemini/Pisces chip set is a highly integrated GPS receiver with Pisces being one of the most highly integrated mixed signal CMOS ASICs available today in the wireless market. This single package receiver requires only an antenna for its input and houses all of the functional blocks needed to digitize the signal for the following DSP device.
{"title":"A highly integrated commercial GPS receiver","authors":"J. Young","doi":"10.1109/RFIC.2000.854420","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854420","url":null,"abstract":"The Gemini/Pisces chip set is a highly integrated GPS receiver with Pisces being one of the most highly integrated mixed signal CMOS ASICs available today in the wireless market. This single package receiver requires only an antenna for its input and houses all of the functional blocks needed to digitize the signal for the following DSP device.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126990708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-06-10DOI: 10.1109/RFIC.2000.854408
J. Young, M. M. Mulbrook
Sigma delta techniques have had a significant impact on the integration and performance of A/D and D/A technology. Likewise this technique is expected to have a significant effect on synthesizers as well. This paper describes a sigma delta single loop PLL synthesizer that demonstrates enhanced performance by using this technique. The device is called "Symphony" and is the first low cost and highly integrated sigma delta synthesizer.
{"title":"Symphony-a sigma delta synthesizer [PLLs]","authors":"J. Young, M. M. Mulbrook","doi":"10.1109/RFIC.2000.854408","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854408","url":null,"abstract":"Sigma delta techniques have had a significant impact on the integration and performance of A/D and D/A technology. Likewise this technique is expected to have a significant effect on synthesizers as well. This paper describes a sigma delta single loop PLL synthesizer that demonstrates enhanced performance by using this technique. The device is called \"Symphony\" and is the first low cost and highly integrated sigma delta synthesizer.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133756487","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-06-10DOI: 10.1109/RFIC.2000.854444
W. Philibert, R. Verbiest
We have developed a direct linear vector modulator MMIC for Ka band satellite communication. The modulator is of the parallel I/Q type and includes on-chip phase tuning for correcting the quadrature phase error. Using the tuning possibilities, excellent modulation results are obtained. This is illustrated for QPSK operation where quasi-perfect modulation is obtained in a 20% wide RF bandwidth, completely covering the FSS (Fixed-Satellite Service) Ka band downlink frequencies as allocated by the ITU.
{"title":"A subharmonically pumped I/Q vector modulator MMIC for Ka band satellite communication","authors":"W. Philibert, R. Verbiest","doi":"10.1109/RFIC.2000.854444","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854444","url":null,"abstract":"We have developed a direct linear vector modulator MMIC for Ka band satellite communication. The modulator is of the parallel I/Q type and includes on-chip phase tuning for correcting the quadrature phase error. Using the tuning possibilities, excellent modulation results are obtained. This is illustrated for QPSK operation where quasi-perfect modulation is obtained in a 20% wide RF bandwidth, completely covering the FSS (Fixed-Satellite Service) Ka band downlink frequencies as allocated by the ITU.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129824662","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-06-10DOI: 10.1109/RFIC.2000.854412
H. Wang, L. Samoska, T. Gaier, A. Peralta, H. Liao, Y.C. Chen, M. Nishimoto, R. Lai
A number of monolithic W-band power amplifiers (PAs) have been developed for local oscillators of the Far Infrared and Submillimeter Telescope (FIRST). These PA chips include three driver and three power amplifiers covering most of the W-band, i.e., the frequency ranges of 72-81, 90-101, and 100-113 GHz. Each driver amplifier and power amplifier provides at least 20 and 22 dBm (160 mW), respectively in the frequency range it covers. The 100-113 GHz power amplifier has a peak power of greater than 250 mW (25 dBm) at 105 GHz, which is the best output power performance for a monolithic amplifier above 100 GHz to date. These monolithic chips are fabricated using 0.1-/spl mu/m AlGaAs-InGaAs-GaAs pseudomorphic T-gate power HEMTs on a 2-mil GaAs substrate.
在远红外和亚毫米波望远镜(FIRST)的本振中，研制了许多单片w波段功率放大器(pa)。这些PA芯片包括三个驱动器和三个功率放大器，覆盖了大部分w频段，即72- 81,90 -101和100-113 GHz的频率范围。每个驱动放大器和功率放大器在其覆盖的频率范围内分别提供至少20和22 dBm (160 mW)。100-113 GHz功率放大器在105 GHz时的峰值功率大于250 mW (25 dBm)，这是迄今为止100 GHz以上单片放大器的最佳输出功率性能。这些单片芯片是在2 mil GaAs衬底上使用0.1-/spl μ m AlGaAs-InGaAs-GaAs伪晶t栅功率hemt制造的。
{"title":"Monolithic power amplifiers covering 70-113 GHz","authors":"H. Wang, L. Samoska, T. Gaier, A. Peralta, H. Liao, Y.C. Chen, M. Nishimoto, R. Lai","doi":"10.1109/RFIC.2000.854412","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854412","url":null,"abstract":"A number of monolithic W-band power amplifiers (PAs) have been developed for local oscillators of the Far Infrared and Submillimeter Telescope (FIRST). These PA chips include three driver and three power amplifiers covering most of the W-band, i.e., the frequency ranges of 72-81, 90-101, and 100-113 GHz. Each driver amplifier and power amplifier provides at least 20 and 22 dBm (160 mW), respectively in the frequency range it covers. The 100-113 GHz power amplifier has a peak power of greater than 250 mW (25 dBm) at 105 GHz, which is the best output power performance for a monolithic amplifier above 100 GHz to date. These monolithic chips are fabricated using 0.1-/spl mu/m AlGaAs-InGaAs-GaAs pseudomorphic T-gate power HEMTs on a 2-mil GaAs substrate.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130829915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-06-10DOI: 10.1109/RFIC.2000.854439
K. Fujimoto, K. Kawashima, M. Nishitsuji, K. Nobori, H. Nagata, O. Ishikawa
0.4-8 GHz broadband MMICs in the novel RF chip size package (RF-CSP) have been developed for the optical video distribution system. By using anisotropic conductive film (ACF) for the flip-chip bonding, fabrication process of RF-CSP becomes very simple and cost effective. This RF-CSP is one of the smallest packages ever reported.
{"title":"0.4-8 GHz broadband MMICs in novel RF chip size package for optical video distribution system","authors":"K. Fujimoto, K. Kawashima, M. Nishitsuji, K. Nobori, H. Nagata, O. Ishikawa","doi":"10.1109/RFIC.2000.854439","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854439","url":null,"abstract":"0.4-8 GHz broadband MMICs in the novel RF chip size package (RF-CSP) have been developed for the optical video distribution system. By using anisotropic conductive film (ACF) for the flip-chip bonding, fabrication process of RF-CSP becomes very simple and cost effective. This RF-CSP is one of the smallest packages ever reported.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133476949","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-06-10DOI: 10.1109/RFIC.2000.854418
J.-M. Mourant, J. Imbornone, T. Tewksbury
A fully integrated, low phase noise, dual-band voltage controlled oscillator (VCO) utilizing a novel tuning scheme is reported. Coarse digital tuning is achieved using MOSFETs and fine analog tuning utilizes PN varactors. The measured phase noise is -95 dBc/Hz max at 3 GHz+25 kHz over the whole tuning bandwidth (/spl plusmn/12.5%), and the power dissipated is 22.5 mW. To our knowledge, these are the best results published so far.
{"title":"A low phase noise monolithic VCO in SiGe BiCMOS","authors":"J.-M. Mourant, J. Imbornone, T. Tewksbury","doi":"10.1109/RFIC.2000.854418","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854418","url":null,"abstract":"A fully integrated, low phase noise, dual-band voltage controlled oscillator (VCO) utilizing a novel tuning scheme is reported. Coarse digital tuning is achieved using MOSFETs and fine analog tuning utilizes PN varactors. The measured phase noise is -95 dBc/Hz max at 3 GHz+25 kHz over the whole tuning bandwidth (/spl plusmn/12.5%), and the power dissipated is 22.5 mW. To our knowledge, these are the best results published so far.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117192396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-06-10DOI: 10.1109/RFIC.2000.854459
T. Robinson, S. Lloyd, P. Piriyapoksombut, K. Rampmeier, M. Reddy, D. Yates
In this paper, a two device chip-set integrating the RF transceiver front-end function for the dual-band, dual-mode CDMA/AMPS cellular telephone standard TIA/EIA-98 is described. Fabricated in a double-polysilicon, 25 GHz f/sub T/, silicon bipolar process, the transceiver achieves a total power dissipation of less than 480 mW at 3 V with 9 dBm transmitter power.
{"title":"A highly integrated dual-band tri-mode transceiver chipset for CDMA TIA/EIA-95 and AMPS applications","authors":"T. Robinson, S. Lloyd, P. Piriyapoksombut, K. Rampmeier, M. Reddy, D. Yates","doi":"10.1109/RFIC.2000.854459","DOIUrl":"https://doi.org/10.1109/RFIC.2000.854459","url":null,"abstract":"In this paper, a two device chip-set integrating the RF transceiver front-end function for the dual-band, dual-mode CDMA/AMPS cellular telephone standard TIA/EIA-98 is described. Fabricated in a double-polysilicon, 25 GHz f/sub T/, silicon bipolar process, the transceiver achieves a total power dissipation of less than 480 mW at 3 V with 9 dBm transmitter power.","PeriodicalId":305585,"journal":{"name":"2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129673251","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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