Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408488
Willibald Krenn, F. Wotawa
We present a methodology for intelligent control of an autonomous and resource constrained embedded system. Geared towards mastering permanent and transient faults by dynamic reconfiguration, our approach uses rules for describing device functionality, valid environmental interactions, and goals the system has to reach. Besides rules, we use functions that characterize a goal's target activity profile. The target activity profile controls the frequency our system uses to reach the corresponding goal. In the paper we discuss a first implementation of the given methodology, and introduce useful extensions. In order to underline the feasibility and effectiveness of the presented control system, we present a case study that has been carried out on a prototype system.
{"title":"Intelligent, Fault Tolerant Control for Autonomous Systems","authors":"Willibald Krenn, F. Wotawa","doi":"10.1109/WISES.2007.4408488","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408488","url":null,"abstract":"We present a methodology for intelligent control of an autonomous and resource constrained embedded system. Geared towards mastering permanent and transient faults by dynamic reconfiguration, our approach uses rules for describing device functionality, valid environmental interactions, and goals the system has to reach. Besides rules, we use functions that characterize a goal's target activity profile. The target activity profile controls the frequency our system uses to reach the corresponding goal. In the paper we discuss a first implementation of the given methodology, and introduce useful extensions. In order to underline the feasibility and effectiveness of the presented control system, we present a case study that has been carried out on a prototype system.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123267058","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408500
Bernhard M. Turban, M. Kucera, A. Tsakpinis, Christian Wolff
Requirement traceability ensures that (SW-)products meet their requirements and additionally makes the estimation of the consequences of requirement changes possible. It is especially difficult to establish at the transition from requirements specification to its provision in the design, because design processes represent creative and complex transfers of mostly unique problem constellations into a sustainable solution (so-called Wicked Problems). At first, this article searches for symptoms of the problem in analyzing the process model of ISO 12207, the foundation of SPICE or CMMi. This analysis mainly serves the derivation of a concept for the integrated extension of today's traceability models with the aspect of documented design decisions. In the context of current approaches in Rationale Management, our concept proofs as sustainable solution that supports - heavyweight" prescriptive approaches as well as - lightweight" pragmatic approaches and -moreover -shows interdependencies between both kinds.
{"title":"An Integrated Decision Model For Efficient Requirement Traceability In SPICE Compliant Development","authors":"Bernhard M. Turban, M. Kucera, A. Tsakpinis, Christian Wolff","doi":"10.1109/WISES.2007.4408500","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408500","url":null,"abstract":"Requirement traceability ensures that (SW-)products meet their requirements and additionally makes the estimation of the consequences of requirement changes possible. It is especially difficult to establish at the transition from requirements specification to its provision in the design, because design processes represent creative and complex transfers of mostly unique problem constellations into a sustainable solution (so-called Wicked Problems). At first, this article searches for symptoms of the problem in analyzing the process model of ISO 12207, the foundation of SPICE or CMMi. This analysis mainly serves the derivation of a concept for the integrated extension of today's traceability models with the aspect of documented design decisions. In the context of current approaches in Rationale Management, our concept proofs as sustainable solution that supports - heavyweight\" prescriptive approaches as well as - lightweight\" pragmatic approaches and -moreover -shows interdependencies between both kinds.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131349047","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408504
M. Ringwald, K. Römer
Deployment of sensor networks is concerned with setting up an operational wireless sensor network in a real-world setting. Unfortunately, deployment is a labor-intensive and cumbersome task as environmental influences often degrade performance or trigger bugs in the sensor network that could not be observed during lab tests. In this paper, we, firstly, study existing sensor networks to identify and classify typical problems that have been encountered during deployment. Secondly, we investigate whether and how the existence of these problems can be detected by means of passive inspection, where messages exchanged in the sensor network are overheard and analyzed such that modification of the sensor network is not required. We, thirdly, show how passive inspection can be implemented in a practical tool.
{"title":"Deployment of Sensor Networks: Problems and Passive Inspection","authors":"M. Ringwald, K. Römer","doi":"10.1109/WISES.2007.4408504","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408504","url":null,"abstract":"Deployment of sensor networks is concerned with setting up an operational wireless sensor network in a real-world setting. Unfortunately, deployment is a labor-intensive and cumbersome task as environmental influences often degrade performance or trigger bugs in the sensor network that could not be observed during lab tests. In this paper, we, firstly, study existing sensor networks to identify and classify typical problems that have been encountered during deployment. Secondly, we investigate whether and how the existence of these problems can be detected by means of passive inspection, where messages exchanged in the sensor network are overheard and analyzed such that modification of the sensor network is not required. We, thirdly, show how passive inspection can be implemented in a practical tool.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117131805","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408493
Francesco Gambini, M. Conti, S. Orcioni, F. Ripa, M. Caldari
Physical models are widely used for sound synthesis and transformation. This paper presents a general methodology for the integration of physical modelling of sounds in a system level design environment using SystemC. The methodology has been applied in particular for physical modelling of electric guitar effects. The model developed has been used for a real time synthesis of a tunable electric guitar effects generator on a PC useful for the optimization of the algorithm for a future hardware implementation and integration in a DSP architecture for sound synthesis.
{"title":"Physical modelling in SystemC-WMS and real time synthesis of electric guitar effects","authors":"Francesco Gambini, M. Conti, S. Orcioni, F. Ripa, M. Caldari","doi":"10.1109/WISES.2007.4408493","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408493","url":null,"abstract":"Physical models are widely used for sound synthesis and transformation. This paper presents a general methodology for the integration of physical modelling of sounds in a system level design environment using SystemC. The methodology has been applied in particular for physical modelling of electric guitar effects. The model developed has been used for a real time synthesis of a tunable electric guitar effects generator on a PC useful for the optimization of the algorithm for a future hardware implementation and integration in a DSP architecture for sound synthesis.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121429917","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408498
K. Marquet, G. Grimaud
Small devices have a specific hardware configuration. In particular, they usually include several types of memories (typically internal and external RAM, EEPROM, Flash), different in quantities and properties. For instance, their access times can be very different. This is an issue for object-oriented solutions such as Java virtual machines which have to perform automatic data reclamation. In this paper, we firstly present results showing that the memory manager (especially the garbage collector) must be adapted to the type of memory it is in charge of. Then, we propose a flexible memory management solution that addresses this issue by assigning a different memory manager to each memory. Each manager can use the allocation and garbage collection schemes adapted to the physical properties of the memory it is in charge of. In order to minimize interactions between memory managers during allocations and garbage collections, we use a special component in charge of placing objects into the different memories. Thereby, our solution brings the benefits of automatic data reclamation to devices with heterogeneous memory spaces.
{"title":"An object memory management solution for small devices with heterogeneous memories","authors":"K. Marquet, G. Grimaud","doi":"10.1109/WISES.2007.4408498","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408498","url":null,"abstract":"Small devices have a specific hardware configuration. In particular, they usually include several types of memories (typically internal and external RAM, EEPROM, Flash), different in quantities and properties. For instance, their access times can be very different. This is an issue for object-oriented solutions such as Java virtual machines which have to perform automatic data reclamation. In this paper, we firstly present results showing that the memory manager (especially the garbage collector) must be adapted to the type of memory it is in charge of. Then, we propose a flexible memory management solution that addresses this issue by assigning a different memory manager to each memory. Each manager can use the allocation and garbage collection schemes adapted to the physical properties of the memory it is in charge of. In order to minimize interactions between memory managers during allocations and garbage collections, we use a special component in charge of placing objects into the different memories. Thereby, our solution brings the benefits of automatic data reclamation to devices with heterogeneous memory spaces.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129833051","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408491
Björn Andersson, Nuno Pereira, E. Tovar
Consider a wireless sensor network (WSN) where a broadcast from a sensor node does not reach all sensor nodes in the network; such networks are often called multihop networks. Sensor nodes take sensor readings but individual sensor readings are not very important. It is important however to compute aggregated quantities of these sensor readings. The minimum and maximum of all sensor readings at an instant are often interesting because they indicate abnormal behavior, for example if the maximum temperature is very high then it may be that a fire has broken out. We propose an algorithm for computing the min or max of sensor reading in a multihop network. This algorithm has the particularly interesting property of having a time complexity that does not depend on the number of sensor nodes; only the network diameter and the range of the value domain of sensor readings matter.
{"title":"Exploiting a Prioritized MAC Protocol to Efficiently Compute Min and Max in Multihop Networks","authors":"Björn Andersson, Nuno Pereira, E. Tovar","doi":"10.1109/WISES.2007.4408491","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408491","url":null,"abstract":"Consider a wireless sensor network (WSN) where a broadcast from a sensor node does not reach all sensor nodes in the network; such networks are often called multihop networks. Sensor nodes take sensor readings but individual sensor readings are not very important. It is important however to compute aggregated quantities of these sensor readings. The minimum and maximum of all sensor readings at an instant are often interesting because they indicate abnormal behavior, for example if the maximum temperature is very high then it may be that a fire has broken out. We propose an algorithm for computing the min or max of sensor reading in a multihop network. This algorithm has the particularly interesting property of having a time complexity that does not depend on the number of sensor nodes; only the network diameter and the range of the value domain of sensor readings matter.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"222 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123974565","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408490
E. Heras, E. Villar
Due to the increasing complexity of embedded systems, new design methodologies have to be adopted, since traditional techniques are no longer efficient. Model-based engineering enables the designer to confront these concerns using the architecture description of the system as the main axis during the design cycle. Defining the architecture of the system before its implementation, enables the analysis of the constraints imposed on the system from the beginning of the design cycle until the final implementation. AADL has been proposed to design and analyze software and hardware architectures for real time, mission-critical, embedded systems. In this paper, the specification for modelling AADL by means of SystemC is provided. The SystemC model will enable the refinement of the AADL specification until the final implementation is developed. The information about the system obtained during the refinement process will feedback the AADL model allowing the verification of high-level constraints during the complete design process.
{"title":"Specification for SystemC-AADL interoperability","authors":"E. Heras, E. Villar","doi":"10.1109/WISES.2007.4408490","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408490","url":null,"abstract":"Due to the increasing complexity of embedded systems, new design methodologies have to be adopted, since traditional techniques are no longer efficient. Model-based engineering enables the designer to confront these concerns using the architecture description of the system as the main axis during the design cycle. Defining the architecture of the system before its implementation, enables the analysis of the constraints imposed on the system from the beginning of the design cycle until the final implementation. AADL has been proposed to design and analyze software and hardware architectures for real time, mission-critical, embedded systems. In this paper, the specification for modelling AADL by means of SystemC is provided. The SystemC model will enable the refinement of the AADL specification until the final implementation is developed. The information about the system obtained during the refinement process will feedback the AADL model allowing the verification of high-level constraints during the complete design process.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"87 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131843830","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408505
F. Wotawa, Willibald Krenn
In this paper we present first ideas for extracting knowledge from C source code of control programs. The extracted knowledge is intended to be used in our smart control engine which takes a rule set and decides which rules to use based on the internal and environmental conditions. The extraction of rules is based on the control-flow graph of the supplied C program: Basically, our method extracts rules that correspond to paths to given high-level function calls. The advantage of this method is to get a first knowledge-base from available source code which makes using a smart control engine more applicable for industry. We use an industrial control program as example within the paper in order to justify the usefulness of our approach.
{"title":"Knowledge Extraction from C-Code","authors":"F. Wotawa, Willibald Krenn","doi":"10.1109/WISES.2007.4408505","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408505","url":null,"abstract":"In this paper we present first ideas for extracting knowledge from C source code of control programs. The extracted knowledge is intended to be used in our smart control engine which takes a rule set and decides which rules to use based on the internal and environmental conditions. The extraction of rules is based on the control-flow graph of the supplied C program: Basically, our method extracts rules that correspond to paths to given high-level function calls. The advantage of this method is to get a first knowledge-base from available source code which makes using a smart control engine more applicable for industry. We use an industrial control program as example within the paper in order to justify the usefulness of our approach.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"35 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124255323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408501
Fernando Rincón Calle, Jesús Barba, F. Moya, F. Villanueva, D. Villa, J. Dondo, J. C. López
Heterogeneous system architectures are currently the main platform on which an ever increasing number of innovative applications (i.e. smart home or ambient intelligence applications) rely. When designing these complex systems, one of the most time-consuming tasks is the definition of the communication interfaces between the different components through a number of scattered heterogeneous processing nodes. That is not only a complex task, but also very specific for a particular implementation, which may limit the flexibility of the system, and makes the solutions difficult to reuse. In this paper, we describe how to provide a unified abstraction for both hardware and software components that have to cooperate with each other, independently of their implementation and their location. Based on this abstraction, we define a low-overhead system-wide communication architecture that offers total communication transparency between any kind of components. Since the architecture is highly compatible with standard object-oriented distributed software systems, it also enables seamless interaction with any other kind of external network.
{"title":"System-Level Middleware for Embedded Hardware and Software Communication","authors":"Fernando Rincón Calle, Jesús Barba, F. Moya, F. Villanueva, D. Villa, J. Dondo, J. C. López","doi":"10.1109/WISES.2007.4408501","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408501","url":null,"abstract":"Heterogeneous system architectures are currently the main platform on which an ever increasing number of innovative applications (i.e. smart home or ambient intelligence applications) rely. When designing these complex systems, one of the most time-consuming tasks is the definition of the communication interfaces between the different components through a number of scattered heterogeneous processing nodes. That is not only a complex task, but also very specific for a particular implementation, which may limit the flexibility of the system, and makes the solutions difficult to reuse. In this paper, we describe how to provide a unified abstraction for both hardware and software components that have to cooperate with each other, independently of their implementation and their location. Based on this abstraction, we define a low-overhead system-wide communication architecture that offers total communication transparency between any kind of components. Since the architecture is highly compatible with standard object-oriented distributed software systems, it also enables seamless interaction with any other kind of external network.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117319134","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408497
M. Kucera, M. Vetter
This paper describes the security implications of FPGAs to the trusted computing base of embedded systems. It gives an overview of different FPGA architectures and discusses the security measures and shortcoming of modern FPGAs. Furthermore it shows how an attacker can exploit this shortcoming and integrate rootkit-like code inside the FPGA. After a discussion on possible countermeasures, description on the different ways a root kit can be deployed into the FPGA is given.
{"title":"FPGA-Rootkits Hiding Malicious Code inside the Hardware","authors":"M. Kucera, M. Vetter","doi":"10.1109/WISES.2007.4408497","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408497","url":null,"abstract":"This paper describes the security implications of FPGAs to the trusted computing base of embedded systems. It gives an overview of different FPGA architectures and discusses the security measures and shortcoming of modern FPGAs. Furthermore it shows how an attacker can exploit this shortcoming and integrate rootkit-like code inside the FPGA. After a discussion on possible countermeasures, description on the different ways a root kit can be deployed into the FPGA is given.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"361 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132312078","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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