Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408502
B. Huber, R. Obermaisser
The DECOS architecture provides a framework for integrating multiple application systems within a single distributed computer system. Since the DECOS architecture aims at applications in the automotive, avionic, and industrial control domain, including applications up to the highest criticality level, the design and development process of DECOS-based integrated computer systems is of utmost importance. Within the DECOS project a model-based development process is devised which aims at enabling a reduced time-to-market in spite of increasing the system's functionality, the reuse of application software on different instantiations of the DECOS platform, and performing validation activities earlier in the development phase of integrated computer systems. In this paper we outline the overall model-based development process of integrated computer systems based on the DECOS architecture with a strong focus on the modeling of the DECOS execution platform. Additionally, we present a novel graphical model editor based on GME for capturing the execution platform in the model-based development process.
{"title":"Model-Based Development of Integrated Computer Systems: Modeling the Execution Platform","authors":"B. Huber, R. Obermaisser","doi":"10.1109/WISES.2007.4408502","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408502","url":null,"abstract":"The DECOS architecture provides a framework for integrating multiple application systems within a single distributed computer system. Since the DECOS architecture aims at applications in the automotive, avionic, and industrial control domain, including applications up to the highest criticality level, the design and development process of DECOS-based integrated computer systems is of utmost importance. Within the DECOS project a model-based development process is devised which aims at enabling a reduced time-to-market in spite of increasing the system's functionality, the reuse of application software on different instantiations of the DECOS platform, and performing validation activities earlier in the development phase of integrated computer systems. In this paper we outline the overall model-based development process of integrated computer systems based on the DECOS architecture with a strong focus on the modeling of the DECOS execution platform. Additionally, we present a novel graphical model editor based on GME for capturing the execution platform in the model-based development process.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130597932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408489
A. Tengg, A. Klausner, B. Rinner
In our I-SENSE project we demonstrate the combination the scientific research areas multi-sensor data fusion and pervasive embedded computing. The main idea is to provide a generic architecture which supports a distributed data fusion on an embedded system. Due to the high onboard processing and communication power of the used hardware, our proposed architecture is designed to perform sophisticated data fusion tasks. Another goal of I-SENSE research project addresses the reconfiguration of a distributed system at runtime, thus, to be able to react to changes in the system's environment dynamically. This paper though gives an overlook of our developed middleware which eases the development of distributed fusion applications on embedded systems and which includes reconfiguration facilities. We further present some experimental results obtained using our middleware and give an outlook of our ongoing research.
{"title":"I-SENSE: A Light-Weight Middleware for Embedded Multi-Sensor Data-Fusion","authors":"A. Tengg, A. Klausner, B. Rinner","doi":"10.1109/WISES.2007.4408489","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408489","url":null,"abstract":"In our I-SENSE project we demonstrate the combination the scientific research areas multi-sensor data fusion and pervasive embedded computing. The main idea is to provide a generic architecture which supports a distributed data fusion on an embedded system. Due to the high onboard processing and communication power of the used hardware, our proposed architecture is designed to perform sophisticated data fusion tasks. Another goal of I-SENSE research project addresses the reconfiguration of a distributed system at runtime, thus, to be able to react to changes in the system's environment dynamically. This paper though gives an overlook of our developed middleware which eases the development of distributed fusion applications on embedded systems and which includes reconfiguration facilities. We further present some experimental results obtained using our middleware and give an outlook of our ongoing research.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123824527","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408507
Carlos Daniel Luján-Martínez, A. Linares-Barranco, Manuel Rivas Pérez, A. Jiménez-Fernandez, G. Jiménez-Moreno, A. C. Balcells
There is an emerging philosophy, called Neuro-informatics, contained in the Artificial Intelligence field, that aims to emulate how living beings do tasks such as taking a decision based on the interpretation of an image by emulating spiking neurons into VLSI designs and, therefore, trying to re-create the human brain at its highest level. address-event-representation (AER) is a communication protocol that has embedded part of the processing. It is intended to transfer spikes between bioinspired chips. An AER based system may consist of a hierarchical structure with several chips that transmit spikes among them in real-time, while performing some processing. There are several AER tools to help to develop and test AER based systems. These tools require the use of a computer to allow the higher level processing of the event information, reaching very high bandwidth at the AER communication level. We propose the use of an embedded platform based on a multi-task operating system to allow both, the AER communication and processing without the requirement of either a laptop or a computer. In this paper, we present and study the performance of a new philosophy of a frame-grabber AER tool based on a multi-task environment. This embedded platform is based on the Intel XScale processor which is governed by an embedded GNU/Linux system. We have connected and programmed it for processing Address-Event information from a spiking generato
{"title":"Spike Processing on an Embedded Multi-task Computer: Image Reconstruction","authors":"Carlos Daniel Luján-Martínez, A. Linares-Barranco, Manuel Rivas Pérez, A. Jiménez-Fernandez, G. Jiménez-Moreno, A. C. Balcells","doi":"10.1109/WISES.2007.4408507","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408507","url":null,"abstract":"There is an emerging philosophy, called Neuro-informatics, contained in the Artificial Intelligence field, that aims to emulate how living beings do tasks such as taking a decision based on the interpretation of an image by emulating spiking neurons into VLSI designs and, therefore, trying to re-create the human brain at its highest level. address-event-representation (AER) is a communication protocol that has embedded part of the processing. It is intended to transfer spikes between bioinspired chips. An AER based system may consist of a hierarchical structure with several chips that transmit spikes among them in real-time, while performing some processing. There are several AER tools to help to develop and test AER based systems. These tools require the use of a computer to allow the higher level processing of the event information, reaching very high bandwidth at the AER communication level. We propose the use of an embedded platform based on a multi-task operating system to allow both, the AER communication and processing without the requirement of either a laptop or a computer. In this paper, we present and study the performance of a new philosophy of a frame-grabber AER tool based on a multi-task environment. This embedded platform is based on the Intel XScale processor which is governed by an embedded GNU/Linux system. We have connected and programmed it for processing Address-Event information from a spiking generato","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121693824","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408495
Milan Jovanovic, B. Rinner
Networks of embedded smart cameras are an emerging technology for a broad range of pervasive computing applications including smart rooms, intelligent infrastructures and security. Smart cameras combine video sensing, processing and communication within a single embedded device and provide sufficient onboard infrastructure to perform high-level video analysis tasks. This paper deals with middleware services required for the efficient deployment and operation of distributed smart cameras. We focus here on services for autonomous and dynamic reconfiguration. Dynamic reconfiguration refers to the exchange of software tasks as well as the alteration of QoS-levels these tasks provide during runtime. Dynamic reconfiguration provides several advantages over statically configured networks including (i) modification of functionality after deployment and during runtime, (ii) adaptation of the network to changes in its internal and external state, and (Hi) better exploitation of the available resources. We have developed the services for dynamic reconfiguration using policies. Policies help to specify rules for the reconfiguration process. By evaluation the policy the new task-level configuration of the network is computed. The reconfiguration is implemented using mobile agents in order to achieve a flexible and scalable middleware service. Our policy-based middleware is demonstrated by a surveillance application.
{"title":"Middleware for Dynamic Reconfiguration in Distributed Camera Systems","authors":"Milan Jovanovic, B. Rinner","doi":"10.1109/WISES.2007.4408495","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408495","url":null,"abstract":"Networks of embedded smart cameras are an emerging technology for a broad range of pervasive computing applications including smart rooms, intelligent infrastructures and security. Smart cameras combine video sensing, processing and communication within a single embedded device and provide sufficient onboard infrastructure to perform high-level video analysis tasks. This paper deals with middleware services required for the efficient deployment and operation of distributed smart cameras. We focus here on services for autonomous and dynamic reconfiguration. Dynamic reconfiguration refers to the exchange of software tasks as well as the alteration of QoS-levels these tasks provide during runtime. Dynamic reconfiguration provides several advantages over statically configured networks including (i) modification of functionality after deployment and during runtime, (ii) adaptation of the network to changes in its internal and external state, and (Hi) better exploitation of the available resources. We have developed the services for dynamic reconfiguration using policies. Policies help to specify rules for the reconfiguration process. By evaluation the policy the new task-level configuration of the network is computed. The reconfiguration is implemented using mobile agents in order to achieve a flexible and scalable middleware service. Our policy-based middleware is demonstrated by a surveillance application.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"140 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115357318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408499
Sang-Young Cho, Yoojin Chung, Jeongbae Lee
On-time delivering of an embedded system solution to market is very crucial because the market is highly competitive and the demands of consumers rapidly change. Virtual development environment increases efficiency of the embedded system development because it enables developers to develop, execute, and verify an embedded system without real hardware. This paper deals with an implementation of a virtual development environment for ARM core-based embedded systems. The environment is developed based on ARMs ARMulator that is an instruction set simulation environment. The developed environment is extended to use SystemC hardware IP's by attaching a SystemC simulation engine to the modeled ASB bus. Therefore, the environment can use both ARMulator-based hardware models and SystemC-based hardware models. By adding hardware IP modules such as Memory controller, LCD controller, Interrupt controller, 1-ch DMA, UART, 2-ch Timer, Watchdog Timer, GPIO Ports and graphical user interface applications, the ARMulator environment is expanded to a virtual development environment for hand-held devices and general applications. In addition, a real-time operating system muC/OS-II is ported to the simulation environment so that the environment can be used to develop muC/OS-II-based application software. A three-task test program verifies the functionality of the hardware IP modules and muC/OS-II operations. Compared to other environments, its construction cost is very low and the environment can be easily modified according to a engineer's needs.
{"title":"A Flexible Virtual Development Environment for Embedded Systems","authors":"Sang-Young Cho, Yoojin Chung, Jeongbae Lee","doi":"10.1109/WISES.2007.4408499","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408499","url":null,"abstract":"On-time delivering of an embedded system solution to market is very crucial because the market is highly competitive and the demands of consumers rapidly change. Virtual development environment increases efficiency of the embedded system development because it enables developers to develop, execute, and verify an embedded system without real hardware. This paper deals with an implementation of a virtual development environment for ARM core-based embedded systems. The environment is developed based on ARMs ARMulator that is an instruction set simulation environment. The developed environment is extended to use SystemC hardware IP's by attaching a SystemC simulation engine to the modeled ASB bus. Therefore, the environment can use both ARMulator-based hardware models and SystemC-based hardware models. By adding hardware IP modules such as Memory controller, LCD controller, Interrupt controller, 1-ch DMA, UART, 2-ch Timer, Watchdog Timer, GPIO Ports and graphical user interface applications, the ARMulator environment is expanded to a virtual development environment for hand-held devices and general applications. In addition, a real-time operating system muC/OS-II is ported to the simulation environment so that the environment can be used to develop muC/OS-II-based application software. A three-task test program verifies the functionality of the hardware IP modules and muC/OS-II operations. Compared to other environments, its construction cost is very low and the environment can be easily modified according to a engineer's needs.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130310561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408510
J. Fernández, N. M. Madrid, R. Seepold
There is continuously increasing number of devices available which support multimedia management and enable capabilities of interconnection beyond the borders of a Residential Gateway. This paper focuses on devices providing multimedia content (Media Server) and devices reproducing the contents (Media Renders). The objective is to discover, manage and use remote devices like local resources. The setup and configuration should be easy to manage for service providers and transparent for the end users that access to remote services. The paper presents a solution supporting devices implementing UPnP A V that are integrated into an OSGi platform implemented in a heterogeneous scenario with multiple devices and services.
{"title":"OSGi Platform for UPnP Audiovisual Service Delivery","authors":"J. Fernández, N. M. Madrid, R. Seepold","doi":"10.1109/WISES.2007.4408510","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408510","url":null,"abstract":"There is continuously increasing number of devices available which support multimedia management and enable capabilities of interconnection beyond the borders of a Residential Gateway. This paper focuses on devices providing multimedia content (Media Server) and devices reproducing the contents (Media Renders). The objective is to discover, manage and use remote devices like local resources. The setup and configuration should be easy to manage for service providers and transparent for the end users that access to remote services. The paper presents a solution supporting devices implementing UPnP A V that are integrated into an OSGi platform implemented in a heterogeneous scenario with multiple devices and services.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115961903","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408492
W. Elmenreich, Maximilian Rosenblattl, Andreas Wolf
The ISO/IEC Standard DTR 18037 defines the syntax and semantics for fixed point operations for programming embedded hardware in C. However, there are currently only few compilers available that support this standard. Therefore, we have implemented a stand-alone library according to the standard that can be compiled with standard C compilers. The library is available as open source and written in plain C, thus can be used in various target architectures as long as a C compiler is available. This paper presents a brief description of the ISO/IEC standard and the library implementation followed by an evaluation of code size and performance of the fixed point operations on the Atmel AVR architecture. A comparison with the standard floating point library (which is machine code-optimized to the target architecture) shows that simple fixed point functions such as addition, subtraction and multiplication are more efficient, while more complicate functions can only compete in the worst case behavior. The fixed point approach provides a smaller memory foot print, for typical applications where only a small subset of functions is used. This is especially of interest for the big market of embedded microcontrollers with only a few Kbytes of program memory.
{"title":"Fixed Point Library Based on ISO/IEC Standard DTR 18037 for Atmel AVR Microcontrollers","authors":"W. Elmenreich, Maximilian Rosenblattl, Andreas Wolf","doi":"10.1109/WISES.2007.4408492","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408492","url":null,"abstract":"The ISO/IEC Standard DTR 18037 defines the syntax and semantics for fixed point operations for programming embedded hardware in C. However, there are currently only few compilers available that support this standard. Therefore, we have implemented a stand-alone library according to the standard that can be compiled with standard C compilers. The library is available as open source and written in plain C, thus can be used in various target architectures as long as a C compiler is available. This paper presents a brief description of the ISO/IEC standard and the library implementation followed by an evaluation of code size and performance of the fixed point operations on the Atmel AVR architecture. A comparison with the standard floating point library (which is machine code-optimized to the target architecture) shows that simple fixed point functions such as addition, subtraction and multiplication are more efficient, while more complicate functions can only compete in the worst case behavior. The fixed point approach provides a smaller memory foot print, for typical applications where only a small subset of functions is used. This is especially of interest for the big market of embedded microcontrollers with only a few Kbytes of program memory.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"260 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116048349","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408508
Gerald Steinbauer, F. Wotawa
Quantitative and qualitative models and reasoning methods for diagnosis are able to cover a wide range of divers properties of a system. Both groups of methods have advantages and drawbacks in respect to fault diagnosis. In this paper we propose a framework which combines methods of both group to a combined diagnosis engine in order to improve the overall quality of diagnosis. Moreover, we present the different methods based on a running example of an autonomous mobile robots. Furthermore, we discuss the problems and research topics which arise from such a fusion of diverse methods. Finally, we explain how actively gathered observation are able to further improve the quality of diagnosis of complex systems.
{"title":"Combining Quantitative and Qualitative Models with Active Observations for better Diagnoses of Autonomous Mobile Robots","authors":"Gerald Steinbauer, F. Wotawa","doi":"10.1109/WISES.2007.4408508","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408508","url":null,"abstract":"Quantitative and qualitative models and reasoning methods for diagnosis are able to cover a wide range of divers properties of a system. Both groups of methods have advantages and drawbacks in respect to fault diagnosis. In this paper we propose a framework which combines methods of both group to a combined diagnosis engine in order to improve the overall quality of diagnosis. Moreover, we present the different methods based on a running example of an autonomous mobile robots. Furthermore, we discuss the problems and research topics which arise from such a fusion of diverse methods. Finally, we explain how actively gathered observation are able to further improve the quality of diagnosis of complex systems.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"05 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127192735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408496
M. Barrenechea, J. Altuna, M. S. Miguel
The development of a fingerprint verification system on a low-cost embedded platform is an open issue in nowadays biometrics. Our paper describes a low-cost fingerprint minutiae extraction and matching system based on a Spartan3 family FPGA with an embedded Leon2 open core processor. The proposed system architecture incorporates a floating point unit and a discrete Fourier transform coprocessor to accelerate the minutiae extraction process. The whole verification algorithm is based on the NFIS version 2 open source software developed by the national institute of standards and technology (NIST). The results on execution time reduction and FPGA occupation for different system configurations show that the proposed architecture improves substantially the performance of the baseline system architecture.
{"title":"A Low-Cost FPGA-based Embedded Fingerprint Verification and Matching System","authors":"M. Barrenechea, J. Altuna, M. S. Miguel","doi":"10.1109/WISES.2007.4408496","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408496","url":null,"abstract":"The development of a fingerprint verification system on a low-cost embedded platform is an open issue in nowadays biometrics. Our paper describes a low-cost fingerprint minutiae extraction and matching system based on a Spartan3 family FPGA with an embedded Leon2 open core processor. The proposed system architecture incorporates a floating point unit and a discrete Fourier transform coprocessor to accelerate the minutiae extraction process. The whole verification algorithm is based on the NFIS version 2 open source software developed by the national institute of standards and technology (NIST). The results on execution time reduction and FPGA occupation for different system configurations show that the proposed architecture improves substantially the performance of the baseline system architecture.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133208358","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-21DOI: 10.1109/WISES.2007.4408494
Daniele Petraccini, M. Conti, V. Cascio, F. Nocera, L. Morbidelli
Piezoelectric materials are widely used as sensors and actuators in many applications. They allow efficient digital control of mechanical systems, but suffer from nonlinearity and hysteresis. This paper presents a new digital open-loop control of piezoelectric bender for real-time applications in domestic appliances, for which strong specifications are good accuracy and low cost. The control algorithm, implemented in a microcontroller, solves the problems of nonlinearity and hysteresis. The paper presents experimental results of the prototype that has been realized in the Indesit Company laboratories for future applications on domestic appliances.
{"title":"Digital control of low-cost piezoelectric actuators for household appliances","authors":"Daniele Petraccini, M. Conti, V. Cascio, F. Nocera, L. Morbidelli","doi":"10.1109/WISES.2007.4408494","DOIUrl":"https://doi.org/10.1109/WISES.2007.4408494","url":null,"abstract":"Piezoelectric materials are widely used as sensors and actuators in many applications. They allow efficient digital control of mechanical systems, but suffer from nonlinearity and hysteresis. This paper presents a new digital open-loop control of piezoelectric bender for real-time applications in domestic appliances, for which strong specifications are good accuracy and low cost. The control algorithm, implemented in a microcontroller, solves the problems of nonlinearity and hysteresis. The paper presents experimental results of the prototype that has been realized in the Indesit Company laboratories for future applications on domestic appliances.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128126293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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