Pub Date : 1998-05-27DOI: 10.1109/ISMVL.1998.679515
F. Börner, L. Haddad
We briefly survey some known results on generating sets for clones, and then present results for partial clones established in Borner and Haddad, (1997). Namely, we give a criterion for recognizing not finitely generated strong partial clones on a finite set A and apply this criterion to a family of maximal partial clones over A.
{"title":"Generating sets for clones and partial clones","authors":"F. Börner, L. Haddad","doi":"10.1109/ISMVL.1998.679515","DOIUrl":"https://doi.org/10.1109/ISMVL.1998.679515","url":null,"abstract":"We briefly survey some known results on generating sets for clones, and then present results for partial clones established in Borner and Haddad, (1997). Namely, we give a criterion for recognizing not finitely generated strong partial clones on a finite set A and apply this criterion to a family of maximal partial clones over A.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129019301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-27DOI: 10.1109/ISMVL.1998.679271
I. Takanami
We propose arrays with less cells and shorter path lengths for realizing any multiple-valued logic functions using the Akers' cells. To do so, first we define the operations for constructing arrays. Using those operations, we construct the arrays which have already been given by Kamiura et al. We will call those arrays vertical type arrays. Then we prove formally that they realize any multiple-valued logic functions. Next, we propose a building type array which consists of a pedestal array and vertical type arrays. Then we show that it realizes any multiple-valued logic functions. We compare the number of cells to be used and the path lengths of our arrays with those of arrays proposed by Kamiura et al. (1994) which have been so far considered to use the minimum number of cells.
{"title":"A note on realizing multiple-valued logic functions using Akers' cells-cell sizes and path lengths","authors":"I. Takanami","doi":"10.1109/ISMVL.1998.679271","DOIUrl":"https://doi.org/10.1109/ISMVL.1998.679271","url":null,"abstract":"We propose arrays with less cells and shorter path lengths for realizing any multiple-valued logic functions using the Akers' cells. To do so, first we define the operations for constructing arrays. Using those operations, we construct the arrays which have already been given by Kamiura et al. We will call those arrays vertical type arrays. Then we prove formally that they realize any multiple-valued logic functions. Next, we propose a building type array which consists of a pedestal array and vertical type arrays. Then we show that it realizes any multiple-valued logic functions. We compare the number of cells to be used and the path lengths of our arrays with those of arrays proposed by Kamiura et al. (1994) which have been so far considered to use the minimum number of cells.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132560251","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-27DOI: 10.1109/ISMVL.1998.679472
Tomoyuki Araki, H. Tatsumi, M. Mukaidono, F. Yamamoto
Regular ternary logic functions are one of the most useful special class of Kleenean functions, and many works have been done on them. However, there have been few works on incompletely specified regular ternary logic functions. This paper describes on the following points: (1) Minimization of incompletely specified regular ternary logic functions. (2) A new definition of incompletely specified fuzzy switching functions and their minimization. (Concretely speaking, minimal disjunctive forms of incompletely specified fuzzy switching functions are represented in formulas of regular ternary logic functions.) (3) An application to fuzzy logic circuits such as a fuzzy PLA of AND-OR type.
{"title":"Minimization of incompletely specified regular ternary logic functions and its application to fuzzy switching functions","authors":"Tomoyuki Araki, H. Tatsumi, M. Mukaidono, F. Yamamoto","doi":"10.1109/ISMVL.1998.679472","DOIUrl":"https://doi.org/10.1109/ISMVL.1998.679472","url":null,"abstract":"Regular ternary logic functions are one of the most useful special class of Kleenean functions, and many works have been done on them. However, there have been few works on incompletely specified regular ternary logic functions. This paper describes on the following points: (1) Minimization of incompletely specified regular ternary logic functions. (2) A new definition of incompletely specified fuzzy switching functions and their minimization. (Concretely speaking, minimal disjunctive forms of incompletely specified fuzzy switching functions are represented in formulas of regular ternary logic functions.) (3) An application to fuzzy logic circuits such as a fuzzy PLA of AND-OR type.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129608331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-27DOI: 10.1109/ISMVL.1998.679475
Yukari Yamauchi, M. Mukaidono
Statements in fuzzy logic and probability theory both take values in the unit interval of [0, 1]. The difference between the treatments of uncertainties in fuzzy logic and probability theory give effects to the truth functionalities in their operations. In this paper, the difference between operations in fuzzy logic and probability theory is discussed and the interval and paired probabilities are introduced. Operations for these models are defined truth-functionally and generalized so that the domains of the probabilities are closed in interval or paired interval values under these operations.
{"title":"A study on operations in interval and paired probabilities","authors":"Yukari Yamauchi, M. Mukaidono","doi":"10.1109/ISMVL.1998.679475","DOIUrl":"https://doi.org/10.1109/ISMVL.1998.679475","url":null,"abstract":"Statements in fuzzy logic and probability theory both take values in the unit interval of [0, 1]. The difference between the treatments of uncertainties in fuzzy logic and probability theory give effects to the truth functionalities in their operations. In this paper, the difference between operations in fuzzy logic and probability theory is discussed and the interval and paired probabilities are introduced. Operations for these models are defined truth-functionally and generalized so that the domains of the probabilities are closed in interval or paired interval values under these operations.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117169572","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-27DOI: 10.1109/ISMVL.1998.679518
A. Nozaki, Vaktang Lashkia
Let X be an arbitrary poset. A partial function f with n variables defined over X is said to be monotone if the following condition is satisfied: if x/sub 1//spl les/y/sub 1/,..., x/sub m//spl les/y/sub n/, and both the values f(x/sub 1/,..., x/sub n/) and f(y/sub 1/,....y/sub n/) are defined, then f(x/sub 1/,..., x/sub n/)/spl les/f(y/sub 1/,...,y/sub n/) It is shown that the set of all monotone partial functions has a finite basis.
{"title":"A finite basis of the set of all monotone partial functions defined over a finite poset","authors":"A. Nozaki, Vaktang Lashkia","doi":"10.1109/ISMVL.1998.679518","DOIUrl":"https://doi.org/10.1109/ISMVL.1998.679518","url":null,"abstract":"Let X be an arbitrary poset. A partial function f with n variables defined over X is said to be monotone if the following condition is satisfied: if x/sub 1//spl les/y/sub 1/,..., x/sub m//spl les/y/sub n/, and both the values f(x/sub 1/,..., x/sub n/) and f(y/sub 1/,....y/sub n/) are defined, then f(x/sub 1/,..., x/sub n/)/spl les/f(y/sub 1/,...,y/sub n/) It is shown that the set of all monotone partial functions has a finite basis.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114260075","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-27DOI: 10.1109/ISMVL.1998.679328
Y. Hata, M. Ishikawa, N. Kamiura
This paper proposes a segmentation method based on Kleene Algebra. For an input image including some regions of interests (ROIs for short), consider three segmented states: Shortage, Correct, Excess for the target region on applying segmentation method based on standard intensity thresholding. For the target image, we do thresholding to each of ROIs, then to derive all "Correct" for ROIs, unate function (one model of Kleene Algebra) based approach proposes to find all "Correct" states. However, the method is not complete for some cases, that is, correctly segmented ratio is about 70% for three and four ROI segmentation. For the failed cases, it is proved that Brzozowski operations are provided to completely find all "Correct" states. The experimental results on a human brain MR image and a foot CT image show that our method can correctly segment the ROI.
{"title":"Image segmentation based on Kleene algebra","authors":"Y. Hata, M. Ishikawa, N. Kamiura","doi":"10.1109/ISMVL.1998.679328","DOIUrl":"https://doi.org/10.1109/ISMVL.1998.679328","url":null,"abstract":"This paper proposes a segmentation method based on Kleene Algebra. For an input image including some regions of interests (ROIs for short), consider three segmented states: Shortage, Correct, Excess for the target region on applying segmentation method based on standard intensity thresholding. For the target image, we do thresholding to each of ROIs, then to derive all \"Correct\" for ROIs, unate function (one model of Kleene Algebra) based approach proposes to find all \"Correct\" states. However, the method is not complete for some cases, that is, correctly segmented ratio is about 70% for three and four ROI segmentation. For the failed cases, it is proved that Brzozowski operations are provided to completely find all \"Correct\" states. The experimental results on a human brain MR image and a foot CT image show that our method can correctly segment the ROI.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116735176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-27DOI: 10.1109/ISMVL.1998.679474
H. Thiele
The starting point of this paper is the classical well-known theorem due to G. Birkhoff, P. Hall, and J. Schmidt which establishes a one-to-one correspondence between compact closure operators, inductive closure operators, inductive closure systems, and closure operators generated in deductive systems (and generated in universal algebras, respectively). In the paper presented we make first steps in order to generalize this important theorem to the fuzzy set theory and fuzzy deductive systems (and fuzzy algebras, respectively).
本文的起点是由G. Birkhoff, P. Hall和J. Schmidt提出的经典的著名定理，该定理建立了紧闭算子，归纳闭算子，归纳闭算子和演绎系统(分别在泛代数中生成)中生成的闭算子之间的一一对应关系。在本文中，为了将这一重要定理推广到模糊集合理论和模糊演绎系统(分别是模糊代数)，我们做了第一步。
{"title":"On closure operators in fuzzy deductive systems and fuzzy algebras","authors":"H. Thiele","doi":"10.1109/ISMVL.1998.679474","DOIUrl":"https://doi.org/10.1109/ISMVL.1998.679474","url":null,"abstract":"The starting point of this paper is the classical well-known theorem due to G. Birkhoff, P. Hall, and J. Schmidt which establishes a one-to-one correspondence between compact closure operators, inductive closure operators, inductive closure systems, and closure operators generated in deductive systems (and generated in universal algebras, respectively). In the paper presented we make first steps in order to generalize this important theorem to the fuzzy set theory and fuzzy deductive systems (and fuzzy algebras, respectively).","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"280 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134285480","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-27DOI: 10.1109/ISMVL.1998.679451
Grant R. Pogosyan, Takashi Nakamura
Basis is a functionally complete set of logic functions that contains no complete proper subset. Efficiently irreducible generating set, termed /spl epsiv/-basis, is an irreducible set of generators which guarantees an optimal implementation of every function, with respect to the number of literals in its formal expression. The notion of /spl epsiv/-basis is significant in the composition of functions, since the classical definition of basis does not consider the efficiency of implementation. In case of two-valued functions, an /spl epsiv/-basis consists of all unary function, constants, and only two binary functions which are freely chosen from certain classes. In this note, expanding the domain of basic operation from dyadic to triadic, we study the efficiency of sets of 3-input gates as basic operations. This expansion, evidently, induces a decrease of the complexity of functions (hence, the complexity of functional circuits to be designed). Gaining an evident merit in the complexity, we have to pay a price by considerably increasing the number of such generators for the multiple valued circuits. However, in the case of Boolean operations this number is still very small, and will certainly be useful to consider the approach in the practical circuit design. This note provides a criterion for the basic set of triadic operations to be efficiently irreducible. In the case of Boolean functions the five types of triadic operations which constitute an /spl epsiv/-basis are found and well classified. Finally, we show a typical example of generating set, which forms an /spl epsiv/-basis.
{"title":"/spl epsiv/-bases of triadic logic operations","authors":"Grant R. Pogosyan, Takashi Nakamura","doi":"10.1109/ISMVL.1998.679451","DOIUrl":"https://doi.org/10.1109/ISMVL.1998.679451","url":null,"abstract":"Basis is a functionally complete set of logic functions that contains no complete proper subset. Efficiently irreducible generating set, termed /spl epsiv/-basis, is an irreducible set of generators which guarantees an optimal implementation of every function, with respect to the number of literals in its formal expression. The notion of /spl epsiv/-basis is significant in the composition of functions, since the classical definition of basis does not consider the efficiency of implementation. In case of two-valued functions, an /spl epsiv/-basis consists of all unary function, constants, and only two binary functions which are freely chosen from certain classes. In this note, expanding the domain of basic operation from dyadic to triadic, we study the efficiency of sets of 3-input gates as basic operations. This expansion, evidently, induces a decrease of the complexity of functions (hence, the complexity of functional circuits to be designed). Gaining an evident merit in the complexity, we have to pay a price by considerably increasing the number of such generators for the multiple valued circuits. However, in the case of Boolean operations this number is still very small, and will certainly be useful to consider the approach in the practical circuit design. This note provides a criterion for the basic set of triadic operations to be efficiently irreducible. In the case of Boolean functions the five types of triadic operations which constitute an /spl epsiv/-basis are found and well classified. Finally, we show a typical example of generating set, which forms an /spl epsiv/-basis.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"125 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124477053","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-27DOI: 10.1109/ISMVL.1998.679284
H. M. H. Babu, Tsutomu Sasao
This paper presents a design method for multiple-output networks using time domain multiplexing (TDM) and shared multi-terminal multiple-valued decision diagrams (SMTMDDs). SMTMDDs represent multiple-valued multiple-output functions, while TDM systems transmit several signals on a single line. This method reduces: 1) hardware; 2) logic levels; and 3) pins. In the logic design, we use two types of decision diagrams (DDs): shared binary decision diagrams (SBDDs) and SMTMDDs. We propose heuristic algorithms to derive shared multiterminal binary decision diagrams (SMTBDDs) from SBDDs, and SMTMDDs from SMTBDDs. Experimental results show the compactness of SMTMDDs over SBDDs in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the network, each non-terminal node of an SBDD and an SMTMDD is realized by a multiplexer (MUX). We also present upper bounds on the number of nonterminal nodes to realize an n-input m-output function by an SBDD and an SMTMDD. In addition, we compare the proposed TDM realization with the conventional one.
{"title":"Design of multiple-output networks using time domain multiplexing and shared multi-terminal multiple-valued decision diagrams","authors":"H. M. H. Babu, Tsutomu Sasao","doi":"10.1109/ISMVL.1998.679284","DOIUrl":"https://doi.org/10.1109/ISMVL.1998.679284","url":null,"abstract":"This paper presents a design method for multiple-output networks using time domain multiplexing (TDM) and shared multi-terminal multiple-valued decision diagrams (SMTMDDs). SMTMDDs represent multiple-valued multiple-output functions, while TDM systems transmit several signals on a single line. This method reduces: 1) hardware; 2) logic levels; and 3) pins. In the logic design, we use two types of decision diagrams (DDs): shared binary decision diagrams (SBDDs) and SMTMDDs. We propose heuristic algorithms to derive shared multiterminal binary decision diagrams (SMTBDDs) from SBDDs, and SMTMDDs from SMTBDDs. Experimental results show the compactness of SMTMDDs over SBDDs in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the network, each non-terminal node of an SBDD and an SMTMDD is realized by a multiplexer (MUX). We also present upper bounds on the number of nonterminal nodes to realize an n-input m-output function by an SBDD and an SMTMDD. In addition, we compare the proposed TDM realization with the conventional one.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129243046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-27DOI: 10.1109/ISMVL.1998.679327
Y. Yuminaka, Y. Sasaki, T. Aoki, T. Higuchi
A Wave-Parallel Computing (WPC) technique is proposed to address the interconnection problem in massively interconnected VLSI architectures. The fundamental concept is the multiplexing of several signals onto a single line using orthogonal sequences as information carriers. To reduce MUX/DEMUX circuits, we propose WPC concept which can process multiplexed data directly without decomposition. We investigate the possible implementation of WPC based on the present MOS technology, and propose the multiple valued pseudo-orthogonal m-sequence carrier generation technique. Applications of WPC to neural networks and image processing are discussed, with emphasis on the reduction in the in number of interconnections and on the noise tolerance property.
{"title":"Wave-parallel computing systems using multiple-valued pseudo-orthogonal sequences","authors":"Y. Yuminaka, Y. Sasaki, T. Aoki, T. Higuchi","doi":"10.1109/ISMVL.1998.679327","DOIUrl":"https://doi.org/10.1109/ISMVL.1998.679327","url":null,"abstract":"A Wave-Parallel Computing (WPC) technique is proposed to address the interconnection problem in massively interconnected VLSI architectures. The fundamental concept is the multiplexing of several signals onto a single line using orthogonal sequences as information carriers. To reduce MUX/DEMUX circuits, we propose WPC concept which can process multiplexed data directly without decomposition. We investigate the possible implementation of WPC based on the present MOS technology, and propose the multiple valued pseudo-orthogonal m-sequence carrier generation technique. Applications of WPC to neural networks and image processing are discussed, with emphasis on the reduction in the in number of interconnections and on the noise tolerance property.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123652192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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