Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069305
S. Kumaravel, Aryam Gupta, B. Venkataramani
In the literature, a modified Nauta's OTA has been proposed for achieving higher PSRR and CMRR. In this paper, a modified Nauta's OTA with double CMOS pair is proposed and is used for implementing a programmable Gm-C filter. The double CMOS pair enables the transconductance to be varied by varying the bias voltages at high impedance nodes. This in turn results in programmability of the filter (F-tuning). For the purpose of comparison, the proposed OTA and Nauta's OTA reported in the literature are implemented in UMC-0.18µm CMOS process and studied through simulation. The proposed OTA results in 11 dB increase in the PSRR and 21 dB increase in the CMRR compared to the Nauta's OTA. The tunable second order Gm-C band pass filter using the proposed OTA is implemented and studied. Simulation of filter is done with BSIM3V3 parameters under (±0.9V) supply voltage and (±1.4V) supply voltage for biasing of double CMOS pair. It is verified from the post-layout simulation that the filter can be tuned over the range (10MHz–300MHz).
{"title":"VLSI implementation of Gm-C filter using modified Nauta OTA with double CMOS pair","authors":"S. Kumaravel, Aryam Gupta, B. Venkataramani","doi":"10.1109/RAICS.2011.6069305","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069305","url":null,"abstract":"In the literature, a modified Nauta's OTA has been proposed for achieving higher PSRR and CMRR. In this paper, a modified Nauta's OTA with double CMOS pair is proposed and is used for implementing a programmable Gm-C filter. The double CMOS pair enables the transconductance to be varied by varying the bias voltages at high impedance nodes. This in turn results in programmability of the filter (F-tuning). For the purpose of comparison, the proposed OTA and Nauta's OTA reported in the literature are implemented in UMC-0.18µm CMOS process and studied through simulation. The proposed OTA results in 11 dB increase in the PSRR and 21 dB increase in the CMRR compared to the Nauta's OTA. The tunable second order Gm-C band pass filter using the proposed OTA is implemented and studied. Simulation of filter is done with BSIM3V3 parameters under (±0.9V) supply voltage and (±1.4V) supply voltage for biasing of double CMOS pair. It is verified from the post-layout simulation that the filter can be tuned over the range (10MHz–300MHz).","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"351 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115972896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069278
M. Poulose
Accurate determination of radiated field without resorting to field measurements has been a desired goal in many radio and navigation systems. This paper presents an efficient and accurate computer model which could evaluate the received field at any location. This is done in three steps: modeling of the terrain between the transmitting and receiving antennas, ray tracing and filed evaluation. The model has been applied to an instrument landing system (ILS) glideslope and the results are presented. The results computed from the method developed here are compared with the earlier methods and the actual measurements and good agreement is shown.
{"title":"An accurate computer model for field evaluation in radiating systems","authors":"M. Poulose","doi":"10.1109/RAICS.2011.6069278","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069278","url":null,"abstract":"Accurate determination of radiated field without resorting to field measurements has been a desired goal in many radio and navigation systems. This paper presents an efficient and accurate computer model which could evaluate the received field at any location. This is done in three steps: modeling of the terrain between the transmitting and receiving antennas, ray tracing and filed evaluation. The model has been applied to an instrument landing system (ILS) glideslope and the results are presented. The results computed from the method developed here are compared with the earlier methods and the actual measurements and good agreement is shown.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116161911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069281
Anupa Sabnis, L. Vachhani
Goal of the robot vision is to exploit power of visual sensing to observe and perceive the environment and react it. Visual feedback is used to manipulate the robot among objects by estimating their depths. This paper presents a depth estimation technique based on the defocus blur associated with a camera setting. A sharp image of an object is obtained from a defocused image of the same object by applying sharpening filter. The defocused and sharp images of the object are used to calculate the spread parameter which is related to the object depth. The method calculates the constant camera parameters. The main advantage of this method is use of a single image by the robot to estimate depth. The method is independent of illumination condition and can be applied to the images with different edge orientations. Experiments on real scene images have demonstrated the feasibility of the proposed method for depth estimation. The results indicate that the depth estimation average errors are within two percent of true values. The proposed method is compared with the existing methods.
{"title":"Single image based depth estimation for robotic applications","authors":"Anupa Sabnis, L. Vachhani","doi":"10.1109/RAICS.2011.6069281","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069281","url":null,"abstract":"Goal of the robot vision is to exploit power of visual sensing to observe and perceive the environment and react it. Visual feedback is used to manipulate the robot among objects by estimating their depths. This paper presents a depth estimation technique based on the defocus blur associated with a camera setting. A sharp image of an object is obtained from a defocused image of the same object by applying sharpening filter. The defocused and sharp images of the object are used to calculate the spread parameter which is related to the object depth. The method calculates the constant camera parameters. The main advantage of this method is use of a single image by the robot to estimate depth. The method is independent of illumination condition and can be applied to the images with different edge orientations. Experiments on real scene images have demonstrated the feasibility of the proposed method for depth estimation. The results indicate that the depth estimation average errors are within two percent of true values. The proposed method is compared with the existing methods.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"172 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120891036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069441
M. Majumder, B. Kaushik, S. Manhas
Multi-walled carbon nanotubes (MWNT) have provided potentially attractive solution over single-wall carbon nanotube (SWNT) bundles at current very large scale integration (VLSI) technologies. This paper presents a comprehensive analysis of propagation delay for both MWNT and SWNT bundles at different interconnect lengths (global) and shows a comparison of equivalent number of SWNTs in bundle and shells in MWNTs for specified propagation delays and lengths. It has been observed that irrespective of the type of CNTs, propagation delay increases with interconnect lengths. For same propagation delay performance, the number of SWNTs required in a bundle are found to be more than number of shells in MWNT for a given interconnect length.
{"title":"Comparison of propagation delay characteristics for single-walled CNT bundle and multiwalled CNT in global VLSI interconnects","authors":"M. Majumder, B. Kaushik, S. Manhas","doi":"10.1109/RAICS.2011.6069441","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069441","url":null,"abstract":"Multi-walled carbon nanotubes (MWNT) have provided potentially attractive solution over single-wall carbon nanotube (SWNT) bundles at current very large scale integration (VLSI) technologies. This paper presents a comprehensive analysis of propagation delay for both MWNT and SWNT bundles at different interconnect lengths (global) and shows a comparison of equivalent number of SWNTs in bundle and shells in MWNTs for specified propagation delays and lengths. It has been observed that irrespective of the type of CNTs, propagation delay increases with interconnect lengths. For same propagation delay performance, the number of SWNTs required in a bundle are found to be more than number of shells in MWNT for a given interconnect length.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122320212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069356
M. Karpaka Murthy, S. Seetha, F. Pádua
The problem of classification of continuous general data for content based retrieval and describe the scheme that able to classify the audio segments based on the MPEG-7 audio descriptors and description schemes that consist of tools for indexing audio media using probabilistic sound models. The descriptors provide containers for category labels as well as data structures for quantitative information about sound content. We describe the normative tools as well as informative methods for automatic description extraction.
{"title":"Generating MPEG 7 audio descriptor for content-based retrieval","authors":"M. Karpaka Murthy, S. Seetha, F. Pádua","doi":"10.1109/RAICS.2011.6069356","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069356","url":null,"abstract":"The problem of classification of continuous general data for content based retrieval and describe the scheme that able to classify the audio segments based on the MPEG-7 audio descriptors and description schemes that consist of tools for indexing audio media using probabilistic sound models. The descriptors provide containers for category labels as well as data structures for quantitative information about sound content. We describe the normative tools as well as informative methods for automatic description extraction.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125996224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069297
R. Hari, M. Wilscy
Video summarization is the main aspect in video content management system, by which users can easily search the video content for a particular data or scene. Video summarization is the process of selecting a set of significant frames called key frames to represent original video in the form of a short video clip. In this work, individual frames of the video represented using Contourlet Transform are analyzed structurally to detect the scene changes, which will result in clustering of frames in the video. Finally Renyi Entropy can be used to extract most relevant frames from clusters to construct full motion summarized video.
{"title":"Video summarization by Contourlet Transform and structural similarity","authors":"R. Hari, M. Wilscy","doi":"10.1109/RAICS.2011.6069297","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069297","url":null,"abstract":"Video summarization is the main aspect in video content management system, by which users can easily search the video content for a particular data or scene. Video summarization is the process of selecting a set of significant frames called key frames to represent original video in the form of a short video clip. In this work, individual frames of the video represented using Contourlet Transform are analyzed structurally to detect the scene changes, which will result in clustering of frames in the video. Finally Renyi Entropy can be used to extract most relevant frames from clusters to construct full motion summarized video.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126391436","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069382
R. Archana, A. Unnikrishnan, R. Gopikakumari, M. Rajesh
The identification of nonlinear systems with chaotic behavior using a neural network based computational algorithm is presented.. A neural network is trained on the measured output data of the actual system. The network parameters viz. the neural network weights are estimated using the Elman back propagation algorithm .Further, The Rossler and the Chen chaotic systems are used for simulation. The simulation results show that the ANN trained with back propagation algorithm performs very well and give exact reproduction of the output time series and states, as generated from the dynamical equations. The Kaplan Yorke dimensions and the Lyapunov exponents of the model are calculated.
{"title":"An intelligent computational algorithm based on neural networks for the identification of chaotic systems","authors":"R. Archana, A. Unnikrishnan, R. Gopikakumari, M. Rajesh","doi":"10.1109/RAICS.2011.6069382","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069382","url":null,"abstract":"The identification of nonlinear systems with chaotic behavior using a neural network based computational algorithm is presented.. A neural network is trained on the measured output data of the actual system. The network parameters viz. the neural network weights are estimated using the Elman back propagation algorithm .Further, The Rossler and the Chen chaotic systems are used for simulation. The simulation results show that the ANN trained with back propagation algorithm performs very well and give exact reproduction of the output time series and states, as generated from the dynamical equations. The Kaplan Yorke dimensions and the Lyapunov exponents of the model are calculated.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127774692","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069366
Mohd Azman Abdul Latif, N. B. Z. Zain Ali, F. Hussin
Recent submicron process technology scaling leads the urgency to build an efficient methodology of characterizing and modeling the process variation effect, for example, the threshold voltage, Vt. This is one of the key process parameters that must be extensively modeled and validated for accurate circuit performance. Furthermore, this requirement is even much more critical for analog applications which demand an ability to match devices precisely. Analog circuits use larger device dimensions as compared to digital circuits in order to minimize the process variation implication. This has led Negative Bias Temperature Instability (NBTI) to be the most performance limiter compared to the rest of reliability mechanisms. This reliability sensitivity is even more challenging as most of the circuit blocks (digital and analog) are fabricated on the same chip for system-on-chip (SoC) applications. This paper will describe in detail the actions taken to minimize impact to customers and will show how important proper aging simulations to be conducted with the right combination of process, voltage, temperature (PVT) and coupling/timing to occur due to process variation effect beyond specifications on analog differential amplifier (diffamp) circuits in SoC products.
{"title":"A case study of process-variation effect to SoC analog circuits","authors":"Mohd Azman Abdul Latif, N. B. Z. Zain Ali, F. Hussin","doi":"10.1109/RAICS.2011.6069366","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069366","url":null,"abstract":"Recent submicron process technology scaling leads the urgency to build an efficient methodology of characterizing and modeling the process variation effect, for example, the threshold voltage, Vt. This is one of the key process parameters that must be extensively modeled and validated for accurate circuit performance. Furthermore, this requirement is even much more critical for analog applications which demand an ability to match devices precisely. Analog circuits use larger device dimensions as compared to digital circuits in order to minimize the process variation implication. This has led Negative Bias Temperature Instability (NBTI) to be the most performance limiter compared to the rest of reliability mechanisms. This reliability sensitivity is even more challenging as most of the circuit blocks (digital and analog) are fabricated on the same chip for system-on-chip (SoC) applications. This paper will describe in detail the actions taken to minimize impact to customers and will show how important proper aging simulations to be conducted with the right combination of process, voltage, temperature (PVT) and coupling/timing to occur due to process variation effect beyond specifications on analog differential amplifier (diffamp) circuits in SoC products.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128986263","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069414
R. Jasutkar, P. Bajaj, A. Deshmukh
This paper discusses the design of micro power Sigma-delta modulator with GA based oversampling technology. This Sigma-delta modulator design is paid special attention to its low power application of portable electronic system in digitizing biomedical signals such as Electro-cardiogram (ECG), Electroencephalogram (EEG) etc. [1]. A high performance, low power second order Sigma-delta modulator is more useful in analog signal acquisition system. Using Sigma-delta modulator can reduce the power consumption and cost in the whole system. The original biomedical signal can be reconstructed by simply applying the digital bit stream from the modulator output through a low-pass filter. The loop filter of this modulator has been implemented by using switch capacitor (SC) integrators and using simple circuitry consists of OpAmps, Comparator and DAC. In general, the resolution of modulator is about 10 bits for biomedical application. In this two order Sigma-delta modulator simulation results of the 1.8V sigma delta modulator show a 68 dB signal-to-noise-and distortion ratio (SNDR) in 4 kHz biomedical signal bandwidth and a sampling frequency equal to 1MHz in the 0.18 m CMOS technology. The power consumption is 400 W. It is very suitable for low power application of biomedical instrument design.
{"title":"GA based low power sigma delta modulator for biomedical applications","authors":"R. Jasutkar, P. Bajaj, A. Deshmukh","doi":"10.1109/RAICS.2011.6069414","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069414","url":null,"abstract":"This paper discusses the design of micro power Sigma-delta modulator with GA based oversampling technology. This Sigma-delta modulator design is paid special attention to its low power application of portable electronic system in digitizing biomedical signals such as Electro-cardiogram (ECG), Electroencephalogram (EEG) etc. [1]. A high performance, low power second order Sigma-delta modulator is more useful in analog signal acquisition system. Using Sigma-delta modulator can reduce the power consumption and cost in the whole system. The original biomedical signal can be reconstructed by simply applying the digital bit stream from the modulator output through a low-pass filter. The loop filter of this modulator has been implemented by using switch capacitor (SC) integrators and using simple circuitry consists of OpAmps, Comparator and DAC. In general, the resolution of modulator is about 10 bits for biomedical application. In this two order Sigma-delta modulator simulation results of the 1.8V sigma delta modulator show a 68 dB signal-to-noise-and distortion ratio (SNDR) in 4 kHz biomedical signal bandwidth and a sampling frequency equal to 1MHz in the 0.18 m CMOS technology. The power consumption is 400 W. It is very suitable for low power application of biomedical instrument design.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132409872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069314
Mahantesh P Mattad, H. Guhilot, R. Kamat
We present an area efficient Time to Digital Converter (TDC) yielding a high resolution of nearly 10ps. The TDC architecture reported in this paper comprises of coarse measurement using system clock and two controllable oscillators for fine resolution measurement. The reported improved resolution is attributed to the difference in their frequencies. One of the main features of the implementation is its prototyping on a low-cost FPGA.
{"title":"Area efficient time to digital converter (TDC) architecture with double ring-oscillator technique on FPGA for fluorescence measurement application","authors":"Mahantesh P Mattad, H. Guhilot, R. Kamat","doi":"10.1109/RAICS.2011.6069314","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069314","url":null,"abstract":"We present an area efficient Time to Digital Converter (TDC) yielding a high resolution of nearly 10ps. The TDC architecture reported in this paper comprises of coarse measurement using system clock and two controllable oscillators for fine resolution measurement. The reported improved resolution is attributed to the difference in their frequencies. One of the main features of the implementation is its prototyping on a low-cost FPGA.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128077306","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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