Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069351
A. V. Paramkusam, V. Reddy
The new fast full search motion estimation algorithm for optimal motion estimation is proposed in this paper. The computational process of boundaries and possibility of early rejection of non best candidate blocks in Successive Elimination Algorithm (SEA), Multilevel Successive Elimination Algorithm (MSEA) and Fine Granularity Successive Elimination (FGSE) are theoretically and practically analyzed. Based on these analyzes, we present two methods. The first method is Fast Computing Method (FCM) which takes advantage of mathematical indications of redundancy to reduce the number of operations required to compute the boundaries. The second method is Best Initial Matching Error Predictive Method (BIMEPM) which predicts the best initial matching error. With these methods, the operation number for proposed motion estimation is reduced down to 1/52 of Full Search (FS). But MSEA and FGSE algorithms can reduce computations by 1/40 and 1/42 of FS.
{"title":"New fast motion estimation algorithm in video coding","authors":"A. V. Paramkusam, V. Reddy","doi":"10.1109/RAICS.2011.6069351","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069351","url":null,"abstract":"The new fast full search motion estimation algorithm for optimal motion estimation is proposed in this paper. The computational process of boundaries and possibility of early rejection of non best candidate blocks in Successive Elimination Algorithm (SEA), Multilevel Successive Elimination Algorithm (MSEA) and Fine Granularity Successive Elimination (FGSE) are theoretically and practically analyzed. Based on these analyzes, we present two methods. The first method is Fast Computing Method (FCM) which takes advantage of mathematical indications of redundancy to reduce the number of operations required to compute the boundaries. The second method is Best Initial Matching Error Predictive Method (BIMEPM) which predicts the best initial matching error. With these methods, the operation number for proposed motion estimation is reduced down to 1/52 of Full Search (FS). But MSEA and FGSE algorithms can reduce computations by 1/40 and 1/42 of FS.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130451289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069293
N. Viswanathan, K. Paramasivam, K. Somasundaram
In the nano scaled transistors integration era, interconnection of IP blocks and data exchange among the IP blocks are crucial concerns in System on Chip (SoC). Network-on-Chip (NoC) is an on-chip communication methodology proposed to resolve the increased interconnection problems in SoC. In deep sub-micron regime, 3D NoC becomes an emerging research area in recent years as the three dimensional (3D) integrated circuits (ICs) can offer shorter interconnection wire and dissipate lesser power. Major area of the 3D NoC research is network topology and routing techniques. In this paper, we present an NS-2 (Network Simulator) simulation environment for two 3D network topologies (GBT and CBT) and cluster based routing algorithms. Simulation results are reported. Simulation results about the relationship between switch buffer size, injected traffic load, packet delay, packet drop probability and energy dissipation are analyzed. On comparing CBT with GBT, a significant performance improvement is demonstrated.
{"title":"Performance analysis of cluster based 3D routing algorithms for NoC","authors":"N. Viswanathan, K. Paramasivam, K. Somasundaram","doi":"10.1109/RAICS.2011.6069293","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069293","url":null,"abstract":"In the nano scaled transistors integration era, interconnection of IP blocks and data exchange among the IP blocks are crucial concerns in System on Chip (SoC). Network-on-Chip (NoC) is an on-chip communication methodology proposed to resolve the increased interconnection problems in SoC. In deep sub-micron regime, 3D NoC becomes an emerging research area in recent years as the three dimensional (3D) integrated circuits (ICs) can offer shorter interconnection wire and dissipate lesser power. Major area of the 3D NoC research is network topology and routing techniques. In this paper, we present an NS-2 (Network Simulator) simulation environment for two 3D network topologies (GBT and CBT) and cluster based routing algorithms. Simulation results are reported. Simulation results about the relationship between switch buffer size, injected traffic load, packet delay, packet drop probability and energy dissipation are analyzed. On comparing CBT with GBT, a significant performance improvement is demonstrated.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127973509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069275
B. Bhalja, P. Shah
Due to the fast-paced changing technologies in the field of electricity market liberalization, the incorporation of Distributed Generation (DG) along with its various distributed resource technologies have led to a profound change in electrical power system. Besides many positive impacts of incorporation of DG into the electrical power system, it has introduced many inherent technical problems such as miscoordination, reliability degradation and stable islanding. This paper originates from the report of IEEE Power System Relaying Committee and on having observed the malfunctioning of Electricity boards by the authors at local and regional level due to DG interconnections with regards to the miscoordination of relay. A laboratory prototype of three phase radial distribution network containing DG is presented in this paper. By executing number of single line-to-ground faults at different locations in various sections of radial distribution network containing DG, numbers of maloperations due to miscordination of relay have been observed by the authors. Time of operations of all the relays of radial distribution network obtained from the developed laboratory prototype for different fault locations in various sections have been found to be in close conformity with the theoretical values obtained using an IEC standard relay characteristics equation.
{"title":"Miscoordination of relay in radial distribution network containing distributed generation","authors":"B. Bhalja, P. Shah","doi":"10.1109/RAICS.2011.6069275","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069275","url":null,"abstract":"Due to the fast-paced changing technologies in the field of electricity market liberalization, the incorporation of Distributed Generation (DG) along with its various distributed resource technologies have led to a profound change in electrical power system. Besides many positive impacts of incorporation of DG into the electrical power system, it has introduced many inherent technical problems such as miscoordination, reliability degradation and stable islanding. This paper originates from the report of IEEE Power System Relaying Committee and on having observed the malfunctioning of Electricity boards by the authors at local and regional level due to DG interconnections with regards to the miscoordination of relay. A laboratory prototype of three phase radial distribution network containing DG is presented in this paper. By executing number of single line-to-ground faults at different locations in various sections of radial distribution network containing DG, numbers of maloperations due to miscordination of relay have been observed by the authors. Time of operations of all the relays of radial distribution network obtained from the developed laboratory prototype for different fault locations in various sections have been found to be in close conformity with the theoretical values obtained using an IEC standard relay characteristics equation.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122971951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069381
K. G. Verma, Raghuvir Singh, B. Kaushik, M. Majumder
Process variation in current nanometer regime has recently emerged as a major concern in the design of very large scale integrated (VLSI) circuits including interconnect. Process variation leads to many uncertainties on circuit performances such as propagation delay. With the shrinking channel dimensions of MOSFET to nanometer scale, the performance of VLSI/ULSI chip becomes less predictable. The predictability of circuit performance may be reduced due to poor control of the physical features of devices and interconnects during the manufacturing process. Variations in these quantities maps to variations in the electrical behavior of circuits. The interconnect line resistance and capacitance varies due to changes in interconnect width and thickness, substrate, implant impurity level, and surface charge. This paper presents the variation of propagation delay through driver-interconnect-load (DIL) system due to various effects of interconnect parasitic. The impact of process induced variations on propagation delay of the circuit is discussed for three different fabrication technologies of 130nm, 70nm and 45nm. The comparison between these three technologies extensively shows that the effect of line resistive and capacitive parasitic variations on propagation delay has almost uniform trend as feature size shrinks. However, resistive parasitic variation in global interconnects has very nominal effect on the propagation delay as compared to capacitive parasitic. Propagation delay variation is observed from 0.01% to 0.04% and −4.32% to 18.1% due to resistive and capacitive deviation of −6.1% to 25% respectively.
{"title":"Propagation delay deviations due to process induced line parasitic variations in global VLSI interconnects","authors":"K. G. Verma, Raghuvir Singh, B. Kaushik, M. Majumder","doi":"10.1109/RAICS.2011.6069381","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069381","url":null,"abstract":"Process variation in current nanometer regime has recently emerged as a major concern in the design of very large scale integrated (VLSI) circuits including interconnect. Process variation leads to many uncertainties on circuit performances such as propagation delay. With the shrinking channel dimensions of MOSFET to nanometer scale, the performance of VLSI/ULSI chip becomes less predictable. The predictability of circuit performance may be reduced due to poor control of the physical features of devices and interconnects during the manufacturing process. Variations in these quantities maps to variations in the electrical behavior of circuits. The interconnect line resistance and capacitance varies due to changes in interconnect width and thickness, substrate, implant impurity level, and surface charge. This paper presents the variation of propagation delay through driver-interconnect-load (DIL) system due to various effects of interconnect parasitic. The impact of process induced variations on propagation delay of the circuit is discussed for three different fabrication technologies of 130nm, 70nm and 45nm. The comparison between these three technologies extensively shows that the effect of line resistive and capacitive parasitic variations on propagation delay has almost uniform trend as feature size shrinks. However, resistive parasitic variation in global interconnects has very nominal effect on the propagation delay as compared to capacitive parasitic. Propagation delay variation is observed from 0.01% to 0.04% and −4.32% to 18.1% due to resistive and capacitive deviation of −6.1% to 25% respectively.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"85 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122189990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069409
B. Mohan, K. Naresh
This paper reveals mathematical models of the simplest Mamdani PI/PD controllers which employ two fuzzy sets (N-negative and P-positive) on the universe of discourse (UoD) of each of two input variables (displacement and velocity) and three fuzzy sets (N-negative, Z-zero, P-positive) on the UoD of output variable (control output in the case of PD, incremental control output in the case of PI). The basic constituents of these models are algebraic product / minimum AND, bounded sum / algebraic sum / maximum OR, minimum inference, three linear fuzzy rules, and center of sums (CoS) defuzzification. Properties of all these models are investigated. It is shown that all these controllers are different nonlinear PI/PD controllers with their proportional and derivative gains changing with the inputs. The proposed models are significant and useful to control community as they are completely new and qualitatively different from the reported ones in the literature.
{"title":"Mathematical models of the simplest fuzzy two-term (PI/PD) controllers using minimum inference","authors":"B. Mohan, K. Naresh","doi":"10.1109/RAICS.2011.6069409","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069409","url":null,"abstract":"This paper reveals mathematical models of the simplest Mamdani PI/PD controllers which employ two fuzzy sets (N-negative and P-positive) on the universe of discourse (UoD) of each of two input variables (displacement and velocity) and three fuzzy sets (N-negative, Z-zero, P-positive) on the UoD of output variable (control output in the case of PD, incremental control output in the case of PI). The basic constituents of these models are algebraic product / minimum AND, bounded sum / algebraic sum / maximum OR, minimum inference, three linear fuzzy rules, and center of sums (CoS) defuzzification. Properties of all these models are investigated. It is shown that all these controllers are different nonlinear PI/PD controllers with their proportional and derivative gains changing with the inputs. The proposed models are significant and useful to control community as they are completely new and qualitatively different from the reported ones in the literature.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122206179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069418
Ivan Kawempy, S. Veera Ragavan, K. B. How
This paper presents an intelligent system for intercepting moving objects. Air hockey is an interesting table game for two players competing to score the opponent's goal. A movement interceptor that consists of vision system, prediction-decision system and Servo pneumatics system has been developed and tested to intercept a moving puck in a prototype of air hockey game. The movement of the object is tracked with a vision system which uses a low cost USB web camera. Statistical background modeling is used to identify the objects position. Object centroid from vision system is used to predict the movement trajectory. Straight line movement estimation method is used to estimate the position where the object will arrive on the other end to be intercepted. Output of prediction i.e. target position is used to drive double acting cylinder in the pneumatics system to intercept the moving object. In order to reach the target position accurately with shortest time possible, embedded PID controller was developed. Simulation and experimental results shows that the prototype built is capable of intercepting objects moving at slow to medium speeds.
{"title":"Intelligent system for intercepting moving objects","authors":"Ivan Kawempy, S. Veera Ragavan, K. B. How","doi":"10.1109/RAICS.2011.6069418","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069418","url":null,"abstract":"This paper presents an intelligent system for intercepting moving objects. Air hockey is an interesting table game for two players competing to score the opponent's goal. A movement interceptor that consists of vision system, prediction-decision system and Servo pneumatics system has been developed and tested to intercept a moving puck in a prototype of air hockey game. The movement of the object is tracked with a vision system which uses a low cost USB web camera. Statistical background modeling is used to identify the objects position. Object centroid from vision system is used to predict the movement trajectory. Straight line movement estimation method is used to estimate the position where the object will arrive on the other end to be intercepted. Output of prediction i.e. target position is used to drive double acting cylinder in the pneumatics system to intercept the moving object. In order to reach the target position accurately with shortest time possible, embedded PID controller was developed. Simulation and experimental results shows that the prototype built is capable of intercepting objects moving at slow to medium speeds.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126070171","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069296
A. Paul, P. Mythili, K. Paulose Jacob
In this paper we propose a cryptographic transformation based on matrix manipulations for image encryption. Substitution and diffusion operations, based on the matrix, facilitate fast conversion of plaintext and images into ciphertext and cipher images. The paper describes the encryption algorithm, discusses the simulation results and compares with results obtained from Advanced Encryption Standard (AES). It is shown that the proposed algorithm is capable of encrypting images eight times faster than AES.
{"title":"Matrix based cryptographic procedure for efficient image encryption","authors":"A. Paul, P. Mythili, K. Paulose Jacob","doi":"10.1109/RAICS.2011.6069296","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069296","url":null,"abstract":"In this paper we propose a cryptographic transformation based on matrix manipulations for image encryption. Substitution and diffusion operations, based on the matrix, facilitate fast conversion of plaintext and images into ciphertext and cipher images. The paper describes the encryption algorithm, discusses the simulation results and compares with results obtained from Advanced Encryption Standard (AES). It is shown that the proposed algorithm is capable of encrypting images eight times faster than AES.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116758383","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069271
K. P. Chandar, M. Chandra, M. R. Kumar, B. Swarnalatha
Uncontrolled lighting Conditions poses obstacle to face recognition. To deal with this problem, this paper proposes a preprocessing scheme using Singular Value Decomposition and Histogram Equalization to enhance and facilitate illumination invariant face recognition. The proposed method first generates synthetic image using Histogram equalization. Original and synthetic images are singular value decomposed; from the estimates of singular values enhanced image is reconstructed. Enhanced image is discrete wavelet decomposed (Haar & Db4) in to different frequency sub bands (LL, LH, HL, HH). The LL sub band is the best approximation of original image with lower-dimensional space and is used as biometric template. Pose Invariant Feature vectors are extracted from this template using Kernel Principal Component Analysis (KPCA). To show the performance, the proposed method is tested on YaleB, ORL benchmarking Databases. The results obtained show the impact of the method and is compared with PCA, KPCA without any preprocessing.
{"title":"Preprocessing using SVD towards illumination invariant face recognition","authors":"K. P. Chandar, M. Chandra, M. R. Kumar, B. Swarnalatha","doi":"10.1109/RAICS.2011.6069271","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069271","url":null,"abstract":"Uncontrolled lighting Conditions poses obstacle to face recognition. To deal with this problem, this paper proposes a preprocessing scheme using Singular Value Decomposition and Histogram Equalization to enhance and facilitate illumination invariant face recognition. The proposed method first generates synthetic image using Histogram equalization. Original and synthetic images are singular value decomposed; from the estimates of singular values enhanced image is reconstructed. Enhanced image is discrete wavelet decomposed (Haar & Db4) in to different frequency sub bands (LL, LH, HL, HH). The LL sub band is the best approximation of original image with lower-dimensional space and is used as biometric template. Pose Invariant Feature vectors are extracted from this template using Kernel Principal Component Analysis (KPCA). To show the performance, the proposed method is tested on YaleB, ORL benchmarking Databases. The results obtained show the impact of the method and is compared with PCA, KPCA without any preprocessing.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"40 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122501968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069328
S. Mishra, G. Panda, S. Meher, R. Majhi, M. Singh
The portfolio optimization aims to find an optimal set of assets to invest on, as well as the optimal investment for each asset. This optimal selection and weighting of assets is a multi-objective problem where total profit of investment has to be maximized and total risk is to be minimized. In this paper four well known multi-objective evolutionary algorithms i.e. Pareto Archived Evolution Strategy (PAES), Pareto Envelope-based Selection Algorithm (PESA), Adaptive Pareto Archived Evolution Strategy (APAES) algorithm and Non dominated Sorting Genetic Algorithm II (NSGA II) are chosen and successfully applied for solving the biobjective portfolio optimization problem. Their performances have been evaluated through simulation study and have been compared in terms of Pareto fronts, the delta, C and S metrics. Simulation results of various portfolios clearly demonstrate the superior portfolio management capability of NSGA II based method compared to other three standard methods. Finally NSGA II algorithm is applied to the same problem with some real world constraint.
{"title":"Portfolio management assessment by four multiobjective optimization algorithm","authors":"S. Mishra, G. Panda, S. Meher, R. Majhi, M. Singh","doi":"10.1109/RAICS.2011.6069328","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069328","url":null,"abstract":"The portfolio optimization aims to find an optimal set of assets to invest on, as well as the optimal investment for each asset. This optimal selection and weighting of assets is a multi-objective problem where total profit of investment has to be maximized and total risk is to be minimized. In this paper four well known multi-objective evolutionary algorithms i.e. Pareto Archived Evolution Strategy (PAES), Pareto Envelope-based Selection Algorithm (PESA), Adaptive Pareto Archived Evolution Strategy (APAES) algorithm and Non dominated Sorting Genetic Algorithm II (NSGA II) are chosen and successfully applied for solving the biobjective portfolio optimization problem. Their performances have been evaluated through simulation study and have been compared in terms of Pareto fronts, the delta, C and S metrics. Simulation results of various portfolios clearly demonstrate the superior portfolio management capability of NSGA II based method compared to other three standard methods. Finally NSGA II algorithm is applied to the same problem with some real world constraint.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131564264","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-03DOI: 10.1109/RAICS.2011.6069370
P. Telagarapu
This paper addresses the problem associated with classification of signatures of four different types of aircraft prototypes. In order to classify the signatures, Nonlinear Alignment method is proposed. This procedure is designed to pair wise generate optimally aligned signatures by back tracking along the optimal alignment path. Classification results on these prototype signatures show that this method is quite robust in classifying the signals with unequal duration, compared to nearest mean classifier. Classification results were observed for different MSSNR for both classification methods. This paper also focused on reconstructing signatures based on the alignment path.
{"title":"Closed planar shape classification using nonlinear alignment","authors":"P. Telagarapu","doi":"10.1109/RAICS.2011.6069370","DOIUrl":"https://doi.org/10.1109/RAICS.2011.6069370","url":null,"abstract":"This paper addresses the problem associated with classification of signatures of four different types of aircraft prototypes. In order to classify the signatures, Nonlinear Alignment method is proposed. This procedure is designed to pair wise generate optimally aligned signatures by back tracking along the optimal alignment path. Classification results on these prototype signatures show that this method is quite robust in classifying the signals with unequal duration, compared to nearest mean classifier. Classification results were observed for different MSSNR for both classification methods. This paper also focused on reconstructing signatures based on the alignment path.","PeriodicalId":394515,"journal":{"name":"2011 IEEE Recent Advances in Intelligent Computational Systems","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131790396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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