El objetivo fue comparar la altura de la planta y la producción de brotes en pitahaya (Hylocereus sp.), y su relación con las variables climáticas, en las variedades San Ignacio y Amarilla. El ensayo se realizó en San Mateo, Alajuela, Costa Rica, de febrero 2017 a diciembre 2019. Las variables evaluadas fueron: altura de planta (AP, en cm), número de brotes vegetativos (NBV), número de brotes reproductivos (NBR), precipitación pluvial (P, en mm), humedad relativa (HR, en %), temperatura promedio (Tp, en °C), temperatura máxima (Tmáx, en °C), y temperatura mínima (Tmín, en °C). No se presentaron diferencias significativas en AP y NBR entre ambas variedades; sin embargo, NBV fue significativamente mayor para la variedad San Ignacio (0,40), con respecto a la variedad Amarilla (0,20), lo que podría indicar una mejor adaptación de la variedad San Ignacio a las condiciones en que se realizó el ensayo. Los brotes reproductivos se produjeron únicamente durante la estación lluviosa; en 2018 y 2019, la variedad Amarilla presentó dos ciclos principales de floración por año, mientras que la variedad San Ignacio mostró tres ciclos por año.
{"title":"Comparación en altura de planta y producción de brotes entre dos variedades de pitahaya (Hylocereus sp.)","authors":"J. E. Monge-Pérez, Michelle Loría-Coto","doi":"10.18845/tm.v36i3.6105","DOIUrl":"https://doi.org/10.18845/tm.v36i3.6105","url":null,"abstract":"El objetivo fue comparar la altura de la planta y la producción de brotes en pitahaya (Hylocereus sp.), y su relación con las variables climáticas, en las variedades San Ignacio y Amarilla. El ensayo se realizó en San Mateo, Alajuela, Costa Rica, de febrero 2017 a diciembre 2019. Las variables evaluadas fueron: altura de planta (AP, en cm), número de brotes vegetativos (NBV), número de brotes reproductivos (NBR), precipitación pluvial (P, en mm), humedad relativa (HR, en %), temperatura promedio (Tp, en °C), temperatura máxima (Tmáx, en °C), y temperatura mínima (Tmín, en °C). No se presentaron diferencias significativas en AP y NBR entre ambas variedades; sin embargo, NBV fue significativamente mayor para la variedad San Ignacio (0,40), con respecto a la variedad Amarilla (0,20), lo que podría indicar una mejor adaptación de la variedad San Ignacio a las condiciones en que se realizó el ensayo. Los brotes reproductivos se produjeron únicamente durante la estación lluviosa; en 2018 y 2019, la variedad Amarilla presentó dos ciclos principales de floración por año, mientras que la variedad San Ignacio mostró tres ciclos por año.","PeriodicalId":42957,"journal":{"name":"Tecnologia en Marcha","volume":null,"pages":null},"PeriodicalIF":0.1,"publicationDate":"2023-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89057273","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Leticia Tombion, M. A. Coviella, María Julia Pannunzio, M. S. Soto, Paula Bologna
Calibrachoa es un género originario de América del Sur que pertenece a la familia Solanaceae. La utilización de semillas de especies de calibrachoa nativas de la Argentina sirve como fuente de variabilidad natural y con fines de investigación, por lo que su germinación in vitro representa una herramienta rápida y confiable frente a otras técnicas de germinación tradicionales. Por ello, en este trabajo se evaluó la germinación in vitro de C. thymifolia y C. missionica bajo los medios de cultivos Murashige y Skoog y Woody plant medium, y se vio que ambos son eficientes para la germinación de estas especies. A su vez, se determinó que, bajo las condiciones de este experimento, C. thymifolia logra germinar una mayor cantidad de semillas en un menor tiempo con respecto a C. missionica.
{"title":"Germinación in vitro de Calibrachoa thymifolia y Calibrachoa missionica nativas de la Argentina","authors":"Leticia Tombion, M. A. Coviella, María Julia Pannunzio, M. S. Soto, Paula Bologna","doi":"10.18845/tm.v36i3.6142","DOIUrl":"https://doi.org/10.18845/tm.v36i3.6142","url":null,"abstract":"Calibrachoa es un género originario de América del Sur que pertenece a la familia Solanaceae. La utilización de semillas de especies de calibrachoa nativas de la Argentina sirve como fuente de variabilidad natural y con fines de investigación, por lo que su germinación in vitro representa una herramienta rápida y confiable frente a otras técnicas de germinación tradicionales. Por ello, en este trabajo se evaluó la germinación in vitro de C. thymifolia y C. missionica bajo los medios de cultivos Murashige y Skoog y Woody plant medium, y se vio que ambos son eficientes para la germinación de estas especies. A su vez, se determinó que, bajo las condiciones de este experimento, C. thymifolia logra germinar una mayor cantidad de semillas en un menor tiempo con respecto a C. missionica.","PeriodicalId":42957,"journal":{"name":"Tecnologia en Marcha","volume":null,"pages":null},"PeriodicalIF":0.1,"publicationDate":"2023-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89198928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The emergence of fin-shaped field effect transistors (FinFETs) was governed by the requirement of the VLSI industry to include more functionalities per unit chip area. Enhanced gate control in a FinFET due to a surrounding gate architecture built on the fundamental geometry of a MOSFET made them highly compatible to the existing CMOS circuit applications. The announcement of a vertically stacked multiple FinFET structure named as Ribbon-FET by Intel Corporation in 2021 motivates the work presented in this article. This article proposes a dual core sourcedrain gate-all-around FinFET, and evaluates its performance in terms of variation in core doping concentrations through technology computer aided design (TCAD) simulations. The advantage of having a dual core in source and drain regions is the opportunity to tune the performance metrics of the device by altering the doping concentration in the outer, and inner cores. The response of the optimized architecture to presence of acceptor-like, and donor-like traps in oxide/ channel interface is presented. The acceptor-like traps affect the characteristics in its on-state, whereas the donor-like traps influence the off-state of the device. DIBL reduces with the introduction of interface traps.
{"title":"A Dual Core Source/Drain GAA FinFET","authors":"Prachuryya Subash Das, Deepjyoti Deb, Rupam Goswami, Santanu Sharma, Rajesh Saha, Hirakjyoti Choudhury","doi":"10.18845/tm.v36i6.6748","DOIUrl":"https://doi.org/10.18845/tm.v36i6.6748","url":null,"abstract":"The emergence of fin-shaped field effect transistors (FinFETs) was governed by the requirement of the VLSI industry to include more functionalities per unit chip area. Enhanced gate control in a FinFET due to a surrounding gate architecture built on the fundamental geometry of a MOSFET made them highly compatible to the existing CMOS circuit applications. The announcement of a vertically stacked multiple FinFET structure named as Ribbon-FET by Intel Corporation in 2021 motivates the work presented in this article. This article proposes a dual core sourcedrain gate-all-around FinFET, and evaluates its performance in terms of variation in core doping concentrations through technology computer aided design (TCAD) simulations. The advantage of having a dual core in source and drain regions is the opportunity to tune the performance metrics of the device by altering the doping concentration in the outer, and inner cores. The response of the optimized architecture to presence of acceptor-like, and donor-like traps in oxide/ channel interface is presented. The acceptor-like traps affect the characteristics in its on-state, whereas the donor-like traps influence the off-state of the device. DIBL reduces with the introduction of interface traps.","PeriodicalId":42957,"journal":{"name":"Tecnologia en Marcha","volume":null,"pages":null},"PeriodicalIF":0.1,"publicationDate":"2023-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78023711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
El modelado e impresión 3D es una tecnología ampliamente utilizada. Puede ser utilizado en diferentes áreas de la industria como para imprimir dispositivos electrónicos como sensores y placas electrónicas, implementaciones dentro del área biomédica para fabricar prótesis y partes del cuerpo humano para preparación quirúrgica, o incluso dentro de industrias por ejemplo aeronáutica y automotriz. Todas estas aplicaciones y su importancia dentro de nuestra sociedad nos hacen requerir un mayor énfasis en las áreas de educación de tallos que involucran estas tecnologías. Por ello es que se considera que es de vital importancia enseñar esta relevante tecnología a personas jóvenes y creativas, que aún no están seguras de que camino tomar en su vida universitaria, un taller sobre estas tecnologías puede darle ese impulso que les falta para poder tomar una decisión y motivarse a innovar mediante la creación de diseños en modelado 3D por software y luego prototipar tanto en software como en impresión 3D.
{"title":"Educación STEM a través del modelado e implementación de impresión 3D dentro de las áreas biomédica e industrial","authors":"Keyner Araya-Portuguez, Daniel Torres-Ulate","doi":"10.18845/tm.v36i6.6756","DOIUrl":"https://doi.org/10.18845/tm.v36i6.6756","url":null,"abstract":"El modelado e impresión 3D es una tecnología ampliamente utilizada. Puede ser utilizado en diferentes áreas de la industria como para imprimir dispositivos electrónicos como sensores y placas electrónicas, implementaciones dentro del área biomédica para fabricar prótesis y partes del cuerpo humano para preparación quirúrgica, o incluso dentro de industrias por ejemplo aeronáutica y automotriz. Todas estas aplicaciones y su importancia dentro de nuestra sociedad nos hacen requerir un mayor énfasis en las áreas de educación de tallos que involucran estas tecnologías. Por ello es que se considera que es de vital importancia enseñar esta relevante tecnología a personas jóvenes y creativas, que aún no están seguras de que camino tomar en su vida universitaria, un taller sobre estas tecnologías puede darle ese impulso que les falta para poder tomar una decisión y motivarse a innovar mediante la creación de diseños en modelado 3D por software y luego prototipar tanto en software como en impresión 3D.","PeriodicalId":42957,"journal":{"name":"Tecnologia en Marcha","volume":null,"pages":null},"PeriodicalIF":0.1,"publicationDate":"2023-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88181146","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The document “Feasibility Study for the Implementation of Number Portability in Nicaragua” proposes the mechanisms to implement operator Number Portability, taking into account the ITU-T Series Q and E regulations. The existing information is analyzed, after the collection of information through interviews with operator officials, as well as surveys of users of telephone services. After reviewing the advantages and conditions of the different techniques to implement number portability, we recommend the All Call Query technique, a simple and effective method, as well as operator Number Portability, for which you need intelligent network capabilities to recognize the ported number, the status, the conditions and the operator must develop activities to adapt their networks to this model. The documents that legally and regulatory support the implementation of Number Portability are: Administrative Agreement No. 036-2003, the Numbering Resource Regulations and the National Numbering Plan, all of these issued by TELCOR Regulatory Entity, the Free Trade Agreement between the Dominican Republic - Central America and the United States (DR-CAFTA) and the Regional Technical Telecommunications Commission of Central America, COMTELCA The elaboration of regulatory documents such as the Number Portability Regulation is proposed and indications are given for the creation of the Centralized Database Administrator with its subordinates in the different nodes that make up the network and a proposal for a General Implementation Plan.
{"title":"Feasibility study for the implementation of number portability in Nicaragua","authors":"Guillermo de Jesús Valdivia-Medina","doi":"10.18845/tm.v36i6.6763","DOIUrl":"https://doi.org/10.18845/tm.v36i6.6763","url":null,"abstract":"The document “Feasibility Study for the Implementation of Number Portability in Nicaragua” proposes the mechanisms to implement operator Number Portability, taking into account the ITU-T Series Q and E regulations. The existing information is analyzed, after the collection of information through interviews with operator officials, as well as surveys of users of telephone services. After reviewing the advantages and conditions of the different techniques to implement number portability, we recommend the All Call Query technique, a simple and effective method, as well as operator Number Portability, for which you need intelligent network capabilities to recognize the ported number, the status, the conditions and the operator must develop activities to adapt their networks to this model. The documents that legally and regulatory support the implementation of Number Portability are: Administrative Agreement No. 036-2003, the Numbering Resource Regulations and the National Numbering Plan, all of these issued by TELCOR Regulatory Entity, the Free Trade Agreement between the Dominican Republic - Central America and the United States (DR-CAFTA) and the Regional Technical Telecommunications Commission of Central America, COMTELCA The elaboration of regulatory documents such as the Number Portability Regulation is proposed and indications are given for the creation of the Centralized Database Administrator with its subordinates in the different nodes that make up the network and a proposal for a General Implementation Plan.","PeriodicalId":42957,"journal":{"name":"Tecnologia en Marcha","volume":null,"pages":null},"PeriodicalIF":0.1,"publicationDate":"2023-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81691803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nupur Navlakha, Leonard F. Register, Sanjay K. Banerjee
This work focuses on understanding the electronic properties of materials to enhance the performance of Tunnel Field Effect Transistor (TFET) through Density Functional Theory (DFT) simulations. Material selection prefers a p-type material with in-plane high density of state (DOS) (and low out-of-plane effective mass, m*, where defined for many layer systems), and high valence band maxima (VBM) energy stacked with an n-type material with low conduction band minimum (CBM) energy (large electron affinity (EA)) that creates a broken or nearly broken band alignment and has low lattice mismatch. SnSe2 is well-suited for an n-type 2D material due to high EA, while WSe2, Black phosphorous (BP) and SnSe are explored for p-type materials. Bilayers consisting of monolayers of WSe2 and SnSe2 show a staggered but nearly broken band alignment (gap of 24 meV) and a high valence band DOS for WSe2. BP-SnSe2 shows a broken band alignment and benefits from a low lattice mismatch. SnSe-SnSe2 shows the highest chemical stability, an optimal performance in terms of DOS of SnSe, tunability with an external field, and high VBM that also leads to a broken band alignment.
{"title":"Emerging 2D materials for tunneling field effect transistors","authors":"Nupur Navlakha, Leonard F. Register, Sanjay K. Banerjee","doi":"10.18845/tm.v36i6.6768","DOIUrl":"https://doi.org/10.18845/tm.v36i6.6768","url":null,"abstract":"This work focuses on understanding the electronic properties of materials to enhance the performance of Tunnel Field Effect Transistor (TFET) through Density Functional Theory (DFT) simulations. Material selection prefers a p-type material with in-plane high density of state (DOS) (and low out-of-plane effective mass, m*, where defined for many layer systems), and high valence band maxima (VBM) energy stacked with an n-type material with low conduction band minimum (CBM) energy (large electron affinity (EA)) that creates a broken or nearly broken band alignment and has low lattice mismatch. SnSe2 is well-suited for an n-type 2D material due to high EA, while WSe2, Black phosphorous (BP) and SnSe are explored for p-type materials. Bilayers consisting of monolayers of WSe2 and SnSe2 show a staggered but nearly broken band alignment (gap of 24 meV) and a high valence band DOS for WSe2. BP-SnSe2 shows a broken band alignment and benefits from a low lattice mismatch. SnSe-SnSe2 shows the highest chemical stability, an optimal performance in terms of DOS of SnSe, tunability with an external field, and high VBM that also leads to a broken band alignment.","PeriodicalId":42957,"journal":{"name":"Tecnologia en Marcha","volume":null,"pages":null},"PeriodicalIF":0.1,"publicationDate":"2023-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84229202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Patrycja Królak, Magaly Ramírez-Como, Lluis F. Marsal-Garví, Josep Pallarès-Marzal
In this work, we report a degradation study of high-efficiency conventional polymer solar cells (PSCs). The high performance of the PM6:Y7-based device is achieved with a power conversion efficiency (PCE) of up to 15.64% in the first measurement. The article describes the results of the measurements and analysis of the degradation process. The electrical parameters during the degradation process were extracted from the current density – voltage characteristics curves (J–V) under light and dark conditions. Were observed the specific parameters of the selected cells: open-circuit voltage (VOC), short circuit current density (JSC), fill factor (FF), PCE, series (RS), and shunt (RSH) resistance values The PCE of the device decreased down to 64% of the initial PCE after 1056 h.
{"title":"Analysis of the degradation of highefficiency encapsulated PM6:Y7based Photovoltaic Cells","authors":"Patrycja Królak, Magaly Ramírez-Como, Lluis F. Marsal-Garví, Josep Pallarès-Marzal","doi":"10.18845/tm.v36i6.6765","DOIUrl":"https://doi.org/10.18845/tm.v36i6.6765","url":null,"abstract":"In this work, we report a degradation study of high-efficiency conventional polymer solar cells (PSCs). The high performance of the PM6:Y7-based device is achieved with a power conversion efficiency (PCE) of up to 15.64% in the first measurement. The article describes the results of the measurements and analysis of the degradation process. The electrical parameters during the degradation process were extracted from the current density – voltage characteristics curves (J–V) under light and dark conditions. Were observed the specific parameters of the selected cells: open-circuit voltage (VOC), short circuit current density (JSC), fill factor (FF), PCE, series (RS), and shunt (RSH) resistance values The PCE of the device decreased down to 64% of the initial PCE after 1056 h.","PeriodicalId":42957,"journal":{"name":"Tecnologia en Marcha","volume":null,"pages":null},"PeriodicalIF":0.1,"publicationDate":"2023-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85363668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Marta Serantes-Melo, Magaly Ramírez-Como, Lluis F. Marsal-Garví, Josep Pallarès-Marzal
In this study, we analyze the degradation behavior of conventional polymeric solar cells (PSCs) under constant indoor light illumination. A LED lamp with a color temperature of 2700 K, was used for the indoor light illumination conditions. We compare the results obtained with encapsulated and non-encapsulated devices. The performance of the PTB7:PC70BM-based cell showed an initial maximum power conversion efficiency (PCE) of 12.0% under the luminance of 1000 lux and maximum power density (MPP) of 45.7 μW/cm2. The work describes the results of the measurements and analysis of the degradation process, performed by a current density – voltage (J–V) characteristic curve study under LED light. The analyzed performance parameters were PCE, short circuit current density (JSC), open-circuit voltage (VOC) and fill factor (FF). The PCE of encapsulated devices remained above 80% of the initial value after 624 h.
{"title":"Analysis of the stability of organic photovoltaic cells under indoor illumination","authors":"Marta Serantes-Melo, Magaly Ramírez-Como, Lluis F. Marsal-Garví, Josep Pallarès-Marzal","doi":"10.18845/tm.v36i6.6764","DOIUrl":"https://doi.org/10.18845/tm.v36i6.6764","url":null,"abstract":"In this study, we analyze the degradation behavior of conventional polymeric solar cells \u0000(PSCs) under constant indoor light illumination. A LED lamp with a color temperature of 2700 K, was used for the indoor light illumination conditions. We compare the results obtained with encapsulated and non-encapsulated devices. The performance of the PTB7:PC70BM-based cell showed an initial maximum power conversion efficiency (PCE) of 12.0% under the luminance of 1000 lux and maximum power density (MPP) of 45.7 μW/cm2. The work describes the results of the measurements and analysis of the degradation process, performed by a current density – voltage (J–V) characteristic curve study under LED light. The analyzed performance parameters were PCE, short circuit current density (JSC), open-circuit voltage (VOC) and fill factor (FF). The PCE of encapsulated devices remained above 80% of the initial value after 624 h.","PeriodicalId":42957,"journal":{"name":"Tecnologia en Marcha","volume":null,"pages":null},"PeriodicalIF":0.1,"publicationDate":"2023-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91353785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article presents a NOT logic gate circuit based on a single memristor, and analyzes it for different biological memristive samples based on extracted resistances. The simple resistorvoltage representation of the memristor in the logic circuit is used to formulate a methodology to tune the parameters of the circuit in accordance with TTL voltage values. The logic circuit consists of two resistors in series with the memristor. The input is connected to one end of the memristor, and the output is drawn across the series connection of the second resistor, and the memristor. The methodology comprises of two steps, where, in the first step, the logic ‘low’ TTLinput voltages are examined, and in the second step, the circuit is evaluated for logic ‘high’ TTLinput voltages. The methodology reveals that there is a mínimum voltage value of ‘high’ TTL-input beyond which the output does not fall within the logic ‘low’ TTL-output. The proposed technique may be extended to evaluate novel memristive materials for single memristor-based NOT logic.
{"title":"A Single Memristorbased TTL NOT logic","authors":"Hirakjyoti Choudhury, Suvankar Paul, Deepjyoti Deb, Prachuryya Subash Das, Rupam Goswami","doi":"10.18845/tm.v36i6.6771","DOIUrl":"https://doi.org/10.18845/tm.v36i6.6771","url":null,"abstract":"This article presents a NOT logic gate circuit based on a single memristor, and analyzes it for different biological memristive samples based on extracted resistances. The simple resistorvoltage representation of the memristor in the logic circuit is used to formulate a methodology to tune the parameters of the circuit in accordance with TTL voltage values. The logic circuit consists of two resistors in series with the memristor. The input is connected to one end of the memristor, and the output is drawn across the series connection of the second resistor, and the memristor. The methodology comprises of two steps, where, in the first step, the logic ‘low’ TTLinput voltages are examined, and in the second step, the circuit is evaluated for logic ‘high’ TTLinput voltages. The methodology reveals that there is a mínimum voltage value of ‘high’ TTL-input beyond which the output does not fall within the logic ‘low’ TTL-output. The proposed technique may be extended to evaluate novel memristive materials for single memristor-based NOT logic.","PeriodicalId":42957,"journal":{"name":"Tecnologia en Marcha","volume":null,"pages":null},"PeriodicalIF":0.1,"publicationDate":"2023-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82880580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Gerald Alexander Castillo-Picado, Gustavo Fuentes-Quirós
La propuesta es realizar mediante el uso de Arduino y el uso de diferentes sensores, se pueda crear un sistema que pueda monitorear distintas condiciones de riesgo en motores trifásicos de inducción, como suministro de energía (corriente y voltaje), vibraciones y temperatura del motor o ambiente, para lo cual se utilizan sensores de vibración, de temperatura y sonoros, esto con intensión de verificar las condiciones del motor mediante el monitoreo. Esto puede evitar daños y perdidas en la producción con una detección temprana de estos factores, al notificar a los encargados en caso de estar en riesgo la integridad del motor y poder realizar en el sistema mantenimientos preventivos, los cuales tienen bajo costo y no retrasan tanto el proceso productivo como lo haría el realizar un mantenimiento correctivo, en el caso de daños en el motor o accesorios vinculados a este como es el caso de sistemas de ventilación, bombas y demás.
{"title":"Sistema de monitoreo inteligente para motores completamente operativos","authors":"Gerald Alexander Castillo-Picado, Gustavo Fuentes-Quirós","doi":"10.18845/tm.v36i6.6753","DOIUrl":"https://doi.org/10.18845/tm.v36i6.6753","url":null,"abstract":"La propuesta es realizar mediante el uso de Arduino y el uso de diferentes sensores, se pueda crear un sistema que pueda monitorear distintas condiciones de riesgo en motores trifásicos de inducción, como suministro de energía (corriente y voltaje), vibraciones y temperatura del motor o ambiente, para lo cual se utilizan sensores de vibración, de temperatura y sonoros, esto con intensión de verificar las condiciones del motor mediante el monitoreo. Esto puede evitar daños y perdidas en la producción con una detección temprana de estos factores, al notificar a los encargados en caso de estar en riesgo la integridad del motor y poder realizar en el sistema mantenimientos preventivos, los cuales tienen bajo costo y no retrasan tanto el proceso productivo como lo haría el realizar un mantenimiento correctivo, en el caso de daños en el motor o accesorios vinculados a este como es el caso de sistemas de ventilación, bombas y demás.","PeriodicalId":42957,"journal":{"name":"Tecnologia en Marcha","volume":null,"pages":null},"PeriodicalIF":0.1,"publicationDate":"2023-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91141758","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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