Pub Date : 2023-10-28DOI: 10.1142/s0218126624501068
Shams Ul Haq, Vijay Kumar Sharma
In the current nanoscale regime, fin field effect transistor (FinFET) technology overcomes the limitations of metal oxide semiconductor field effect transistor (MOSFET) technology. Robust and low-power static random access memory (SRAM) design is a demanding task for memory designers, especially in the nanoscale regime. Therefore, this paper proposes a 10 transistor (10T)-based SRAM cell design using low-power FinFET technology. The proposed approach not only reduces the leakage current, but also improves cell stability in different states. The proposed SRAM cell is simulated and analyzed at a 10[Formula: see text]nm technology node using a multi-gate predictive technology model (PTM) for the transistors with a power supply of 0.7[Formula: see text]V. The comparison analysis is also presented with the existing designs. The read and write static noise margins, and SRAM electrical quantity matrix (SEQM) of the proposed SRAM cell are improved by 3.54×, 1.71× and 26.41×, respectively, compared with the conventional 6T (C6T) design. The reliability investigations and comparison of the proposed SRAM cell have been carried out using Monte Carlo simulations with [Formula: see text]% deviations in the process parameters. The reliability analysis shows that the proposed SRAM cell is less sensitive to process variations.
{"title":"Improved Stability for Robust and Low-Power SRAM Cell using FinFET Technology","authors":"Shams Ul Haq, Vijay Kumar Sharma","doi":"10.1142/s0218126624501068","DOIUrl":"https://doi.org/10.1142/s0218126624501068","url":null,"abstract":"In the current nanoscale regime, fin field effect transistor (FinFET) technology overcomes the limitations of metal oxide semiconductor field effect transistor (MOSFET) technology. Robust and low-power static random access memory (SRAM) design is a demanding task for memory designers, especially in the nanoscale regime. Therefore, this paper proposes a 10 transistor (10T)-based SRAM cell design using low-power FinFET technology. The proposed approach not only reduces the leakage current, but also improves cell stability in different states. The proposed SRAM cell is simulated and analyzed at a 10[Formula: see text]nm technology node using a multi-gate predictive technology model (PTM) for the transistors with a power supply of 0.7[Formula: see text]V. The comparison analysis is also presented with the existing designs. The read and write static noise margins, and SRAM electrical quantity matrix (SEQM) of the proposed SRAM cell are improved by 3.54×, 1.71× and 26.41×, respectively, compared with the conventional 6T (C6T) design. The reliability investigations and comparison of the proposed SRAM cell have been carried out using Monte Carlo simulations with [Formula: see text]% deviations in the process parameters. The reliability analysis shows that the proposed SRAM cell is less sensitive to process variations.","PeriodicalId":54866,"journal":{"name":"Journal of Circuits Systems and Computers","volume":"19 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136157332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This work presents a tunable receiver analog front-end (AFE) circuit, capable of achieving data rates between 14 Gb/s and 28 Gb/s. The circuit is implemented using the TSMC 65 nm CMOS technology. The circuit incorporates a continuous-time linear equalizer (CTLE), a transimpedance amplifier (TIA) and an output buffer. A [Formula: see text]-boosted technique is employed within the CTLE for bandwidth and gain enhancement, while the TIA leverages a super source follower (SSF) structure to combat parasitic output node issues. By adjusting the tunable structures in the circuit, the proposed AFE can achieve variable DC gain at 14 GHz. Simulation results reveal that the AFE can compensate for the channel loss at the 14 GHz Nyquist frequency, delivering eye diagram spreads of approximately 0.85 UI and 0.78 UI at 14 Gb/s and 28 Gb/s, respectively. The complete post-simulation layout area is only 0.0026[Formula: see text]mm 2 . Operating with a power consumption of 10.5[Formula: see text]mW, the AFE exhibits an exceptional FoM of 11.8 pJ/bit/dB.
{"title":"A high efficiency 14 to 28 Gb/s tunable receiver analog front-end in 65 nm CMOS technology","authors":"Shunyu Li, Guang Yong Chu, Kezhen Zhu, Pengfei Niu, Shixun Zhang, Guofeng Yang","doi":"10.1142/s0218126624501160","DOIUrl":"https://doi.org/10.1142/s0218126624501160","url":null,"abstract":"This work presents a tunable receiver analog front-end (AFE) circuit, capable of achieving data rates between 14 Gb/s and 28 Gb/s. The circuit is implemented using the TSMC 65 nm CMOS technology. The circuit incorporates a continuous-time linear equalizer (CTLE), a transimpedance amplifier (TIA) and an output buffer. A [Formula: see text]-boosted technique is employed within the CTLE for bandwidth and gain enhancement, while the TIA leverages a super source follower (SSF) structure to combat parasitic output node issues. By adjusting the tunable structures in the circuit, the proposed AFE can achieve variable DC gain at 14 GHz. Simulation results reveal that the AFE can compensate for the channel loss at the 14 GHz Nyquist frequency, delivering eye diagram spreads of approximately 0.85 UI and 0.78 UI at 14 Gb/s and 28 Gb/s, respectively. The complete post-simulation layout area is only 0.0026[Formula: see text]mm 2 . Operating with a power consumption of 10.5[Formula: see text]mW, the AFE exhibits an exceptional FoM of 11.8 pJ/bit/dB.","PeriodicalId":54866,"journal":{"name":"Journal of Circuits Systems and Computers","volume":"24 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136157334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-27DOI: 10.1142/s0218126624501366
Yun Zeng, Honglin Chen
{"title":"An Improved Convolution Neural Network-based Fast Estimation Method for Construction Project Cost","authors":"Yun Zeng, Honglin Chen","doi":"10.1142/s0218126624501366","DOIUrl":"https://doi.org/10.1142/s0218126624501366","url":null,"abstract":"","PeriodicalId":54866,"journal":{"name":"Journal of Circuits Systems and Computers","volume":"159 9","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136261561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-27DOI: 10.1142/s0218126624500713
Xiaoyu Wang, Shaohui Liu
{"title":"Classification of ecological garden scenes using deep learning in remote sensing images","authors":"Xiaoyu Wang, Shaohui Liu","doi":"10.1142/s0218126624500713","DOIUrl":"https://doi.org/10.1142/s0218126624500713","url":null,"abstract":"","PeriodicalId":54866,"journal":{"name":"Journal of Circuits Systems and Computers","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136261738","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-27DOI: 10.1142/s0218126624501317
Rong Fu, Mijuan Tian
{"title":"Classroom Facial expression recognition Method Based on Conv3D-ConvLSTM-SEnet in Online Education Environment","authors":"Rong Fu, Mijuan Tian","doi":"10.1142/s0218126624501317","DOIUrl":"https://doi.org/10.1142/s0218126624501317","url":null,"abstract":"","PeriodicalId":54866,"journal":{"name":"Journal of Circuits Systems and Computers","volume":"43 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136262069","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-27DOI: 10.1142/s0218126624501299
Li Zhang, Lin Wang
{"title":"An Ensemble Learning-Enhanced Smart Prediction Model for Financial Credit Risks","authors":"Li Zhang, Lin Wang","doi":"10.1142/s0218126624501299","DOIUrl":"https://doi.org/10.1142/s0218126624501299","url":null,"abstract":"","PeriodicalId":54866,"journal":{"name":"Journal of Circuits Systems and Computers","volume":"151 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136262269","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-27DOI: 10.1142/s0218126624501329
Yuqi Zhang, Chunping Tan, Jiayan Zhang
{"title":"Three-party Evolutionary Game Analysis of IOT platform Knowledge Hiding under Organization Participation from the Perspective of Stakeholders","authors":"Yuqi Zhang, Chunping Tan, Jiayan Zhang","doi":"10.1142/s0218126624501329","DOIUrl":"https://doi.org/10.1142/s0218126624501329","url":null,"abstract":"","PeriodicalId":54866,"journal":{"name":"Journal of Circuits Systems and Computers","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136261900","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-27DOI: 10.1142/s0218126624501275
SR Breesha, SS Vinsley
{"title":"Classification of Arrhythmic and Normal Rhythm FECG Signal Based On Ensemble Features and Dense Networks","authors":"SR Breesha, SS Vinsley","doi":"10.1142/s0218126624501275","DOIUrl":"https://doi.org/10.1142/s0218126624501275","url":null,"abstract":"","PeriodicalId":54866,"journal":{"name":"Journal of Circuits Systems and Computers","volume":"20 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136262057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-27DOI: 10.1142/s0218126624501391
Yang Xu, Zhouwang Yang
{"title":"GraphPack: A reinforcement learning algorithm for strip packing problem using graph neural network","authors":"Yang Xu, Zhouwang Yang","doi":"10.1142/s0218126624501391","DOIUrl":"https://doi.org/10.1142/s0218126624501391","url":null,"abstract":"","PeriodicalId":54866,"journal":{"name":"Journal of Circuits Systems and Computers","volume":"68 7","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136262409","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-27DOI: 10.1142/s0218126624501123
Wenjun Shi, Qinxiang Cao, Yuxin Deng
In order to verify the functional correctness of quantum circuits or algorithms, a prominent approach is to specify them as quantum programs and semi-automatically deduce them in a theorem prover. It is indispensable to first formalize the semantics of the basic quantum language. We formalize in Coq an imperative language which allows for classical and quantum information interactions. We define small-step operational semantics and state-based denotational semantics. Then we prove a consistency theorem between these two semantics. A distribution-based denotational semantics is also defined and related to the state-based one. Finally, we describe a few typical quantum algorithms and utilize the distribution-based denotational semantics to verify their correctness.
{"title":"Formalizing the Semantics of a Classical-Quantum Imperative Language in Coq","authors":"Wenjun Shi, Qinxiang Cao, Yuxin Deng","doi":"10.1142/s0218126624501123","DOIUrl":"https://doi.org/10.1142/s0218126624501123","url":null,"abstract":"In order to verify the functional correctness of quantum circuits or algorithms, a prominent approach is to specify them as quantum programs and semi-automatically deduce them in a theorem prover. It is indispensable to first formalize the semantics of the basic quantum language. We formalize in Coq an imperative language which allows for classical and quantum information interactions. We define small-step operational semantics and state-based denotational semantics. Then we prove a consistency theorem between these two semantics. A distribution-based denotational semantics is also defined and related to the state-based one. Finally, we describe a few typical quantum algorithms and utilize the distribution-based denotational semantics to verify their correctness.","PeriodicalId":54866,"journal":{"name":"Journal of Circuits Systems and Computers","volume":"268 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136233031","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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