Low temperature co-fired ceramics (LTCC) have garnered significant attention due to their exceptional electrical and thermal properties. While the traditional tape casting method for preparing LTCC substrates yields high density, it is constrained by limited geometric freedom and a complex process, making it less suitable for contemporary demands. In this study, we employ vat photopolymerization 3D printing technology to fabricate alumina/borosilicate glass composite LTCC systems and introduce a microporous structure design on the substrate. This innovation simplifies the traditional punching step, enhancing both productivity and reliability. We formulated LTCC slurry suitable for vat photopolymerization and examined the thermal conductivity and dielectric properties of the sintered parts. The findings reveal that samples held at 750 °C for 30 minutes achieved the highest densities, exhibiting a thermal conductivity of 3.63 W·m−1·K−1, a relative dielectric constant of 13.09, and the lowest dielectric loss (7.9 × 10−3). We successfully realized microporous printing on LTCC substrates, achieving microporous structures with an actual diameter of 132 μm. Additionally, we verified the compatibility of substrates with silver co-firing, observing a robust bond between the silver layer and the LTCC layer. This study underscores the potential of vat photopolymerization for LTCC applications.
{"title":"Vat Photopolymerization of Al2O3/Borosilicate Glass Low Temperature Co-Fired Ceramic Substrates With Integrated Micropore Patterning Device","authors":"Yizhen Chu;Yujuan Zhou;Mingyong Jia;Qianshun Cui;Haiyuan Shi;Zhifeng Huang;Fei Chen","doi":"10.1109/TMAT.2025.3598753","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3598753","url":null,"abstract":"Low temperature co-fired ceramics (LTCC) have garnered significant attention due to their exceptional electrical and thermal properties. While the traditional tape casting method for preparing LTCC substrates yields high density, it is constrained by limited geometric freedom and a complex process, making it less suitable for contemporary demands. In this study, we employ vat photopolymerization 3D printing technology to fabricate alumina/borosilicate glass composite LTCC systems and introduce a microporous structure design on the substrate. This innovation simplifies the traditional punching step, enhancing both productivity and reliability. We formulated LTCC slurry suitable for vat photopolymerization and examined the thermal conductivity and dielectric properties of the sintered parts. The findings reveal that samples held at 750 °C for 30 minutes achieved the highest densities, exhibiting a thermal conductivity of 3.63 W·m<sup>−1</sup>·K<sup>−1</sup>, a relative dielectric constant of 13.09, and the lowest dielectric loss (7.9 × 10<sup>−3</sup>). We successfully realized microporous printing on LTCC substrates, achieving microporous structures with an actual diameter of 132 μm. Additionally, we verified the compatibility of substrates with silver co-firing, observing a robust bond between the silver layer and the LTCC layer. This study underscores the potential of vat photopolymerization for LTCC applications.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"95-102"},"PeriodicalIF":0.0,"publicationDate":"2025-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144916326","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this letter, we have successfully fabricated a metal-ferroelectricity-metal (MFM) capacitor of an ultrathin 5.6 nm HZO and ultrathin In2O3 back gate devices in a back-end-of-line (BEOL) compatible process. By proposing a novel atomic layer deposition (ALD) scheme and an alternative bottom electrode treatment, the MoN-HZO sample shows an average 2Pr value of 64 μC/cm2 (with a standard deviation of 0.52) and high endurance (△2Pr/2Prpristine ≈2% from pristine to 1010 cycles). The MoN–HZO stack integrated with an ultrathin In2O3 back gate exhibits a memory window (MW) greater than 2.5 V and excellent endurance and data retention characteristics. With a maximum process temperature of 400°C, our approach meets the stringent requirements for Back-End-of-Line (BEOL) integration.
{"title":"BEOL-Compatible 5.6 nm Ultrathin HZO With Molybdenum Nitride Electrode and IN2O3 Channel Devices for Enhanced Ferroelectricity and Reliability","authors":"Li-Cheng Teng;Yu-Che Huang;Shin-Yuan Wang;Yu-Hsien Lin;Chao-Hsin Chien","doi":"10.1109/TMAT.2025.3586809","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3586809","url":null,"abstract":"In this letter, we have successfully fabricated a metal-ferroelectricity-metal (MFM) capacitor of an ultrathin 5.6 nm HZO and ultrathin In<sub>2</sub>O<sub>3</sub> back gate devices in a back-end-of-line (BEOL) compatible process. By proposing a novel atomic layer deposition (ALD) scheme and an alternative bottom electrode treatment, the MoN-HZO sample shows an average 2Pr value of 64 μC/cm<sup>2</sup> (with a standard deviation of 0.52) and high endurance (△2Pr/2Pr<sub>pristine</sub> ≈2% from pristine to 10<sup>10</sup> cycles). The MoN–HZO stack integrated with an ultrathin In<sub>2</sub>O<sub>3</sub> back gate exhibits a memory window (MW) greater than 2.5 V and excellent endurance and data retention characteristics. With a maximum process temperature of 400°C, our approach meets the stringent requirements for Back-End-of-Line (BEOL) integration.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"90-94"},"PeriodicalIF":0.0,"publicationDate":"2025-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144704968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-06-27DOI: 10.1109/TMAT.2025.3583512
{"title":"Call for Papers: Special Issue of IEEE Transactions on Electron Devices on Reliability of Advanced Nodes","authors":"","doi":"10.1109/TMAT.2025.3583512","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3583512","url":null,"abstract":"","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"C3-C3"},"PeriodicalIF":0.0,"publicationDate":"2025-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11053704","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144502875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-06-19DOI: 10.1109/TMAT.2025.3581508
Angel Regalado-Contreras;Wencel de la Cruz
Chromium oxide thin films were deposited at room temperature, via reactive laser ablation under varying O2 pressures and analyzed using in-situ X-ray Photoelectron Spectroscopy. Cr 2p spectra exhibited spin-orbit splitting, with peak separations ranging from 9.2 to 9.5 eV. Cr3+, and Cr4+ states were identified, with 2p3/2 binding energies between 576.8 and 582.5 eV. Quantitative analysis confirmed that lower O2 pressures favored Cr2O3 growth, while higher pressures promoted CrO2. Near-Fermi-level spectra revealed significant Density-Of-States modulation, with the Valence Band Maximum shifting from 1.25 to 3.3 eV. A direct correlation between O2 pressure and electronic structure was established.
{"title":"Tunable Density-of-States in Chromium Oxide Thin Films via Room Temperature Laser Ablation","authors":"Angel Regalado-Contreras;Wencel de la Cruz","doi":"10.1109/TMAT.2025.3581508","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3581508","url":null,"abstract":"Chromium oxide thin films were deposited at room temperature, via reactive laser ablation under varying O<sub>2</sub> pressures and analyzed using in-situ X-ray Photoelectron Spectroscopy. Cr 2p spectra exhibited spin-orbit splitting, with peak separations ranging from 9.2 to 9.5 eV. Cr<sup>3+</sup>, and Cr<sup>4+</sup> states were identified, with 2p<sub>3/2</sub> binding energies between 576.8 and 582.5 eV. Quantitative analysis confirmed that lower O<sub>2</sub> pressures favored Cr<sub>2</sub>O<sub>3</sub> growth, while higher pressures promoted CrO<sub>2</sub>. Near-Fermi-level spectra revealed significant Density-Of-States modulation, with the Valence Band Maximum shifting from 1.25 to 3.3 eV. A direct correlation between O<sub>2</sub> pressure and electronic structure was established.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"86-89"},"PeriodicalIF":0.0,"publicationDate":"2025-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144606251","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This work demonstrates the fabrication and characterization of a freestanding oxide varactor membrane designed for integration onto silicon substrates. An epitaxial varactor heterostructure composed of a 1% Mn-doped Ba$_{0.5}$Sr$_{0.5}$TiO$_{3}$ dielectric layer and a $rm {SrMoO}_{3}$ conductive layer was grown using pulsed laser deposition on a water-soluble sacrificial layer $rm {Sr_{3}Al_{2}O_{6}}$. After the lift-off process, the varactor heterostructure was successfully transferred onto a silicon substrate. Structural analysis confirms the high crystallinity and strain relaxation of the heterostructure after transfer. Electrical measurements reveal high tunability (n=1.7) at 120 V/$mu rm {m}$, a quality factor exceeding 100 at 1 MHz, and a low leakage current density well below 5 $text{A/m}^{2}$. This approach overcomes the challenges of direct oxide growth of epitaxial varactor heterostructures on silicon, such as lattice mismatch and chemical incompatibility. These results validate the potential of freestanding varactor membranes for agile microwave and RF applications, offering a scalable route for high-performance, multifunctional devices with low energy consumption in next-generation telecommunications and wireless networks.
{"title":"Transferable Freestanding Varactor Based on a Membrane Stack for Microwave Application","authors":"Yating Ruan;Philipp Komissinskiy;Alexey Arzumanov;Holger Maune;Lambert Alff","doi":"10.1109/TMAT.2025.3580484","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3580484","url":null,"abstract":"This work demonstrates the fabrication and characterization of a freestanding oxide varactor membrane designed for integration onto silicon substrates. An epitaxial varactor heterostructure composed of a 1% Mn-doped Ba<inline-formula><tex-math>$_{0.5}$</tex-math></inline-formula>Sr<inline-formula><tex-math>$_{0.5}$</tex-math></inline-formula>TiO<inline-formula><tex-math>$_{3}$</tex-math></inline-formula> dielectric layer and a <inline-formula><tex-math>$rm {SrMoO}_{3}$</tex-math></inline-formula> conductive layer was grown using pulsed laser deposition on a water-soluble sacrificial layer <inline-formula><tex-math>$rm {Sr_{3}Al_{2}O_{6}}$</tex-math></inline-formula>. After the lift-off process, the varactor heterostructure was successfully transferred onto a silicon substrate. Structural analysis confirms the high crystallinity and strain relaxation of the heterostructure after transfer. Electrical measurements reveal high tunability (<italic>n</i>=1.7) at 120 V/<inline-formula><tex-math>$mu rm {m}$</tex-math></inline-formula>, a quality factor exceeding 100 at 1 MHz, and a low leakage current density well below 5 <inline-formula><tex-math>$text{A/m}^{2}$</tex-math></inline-formula>. This approach overcomes the challenges of direct oxide growth of epitaxial varactor heterostructures on silicon, such as lattice mismatch and chemical incompatibility. These results validate the potential of freestanding varactor membranes for agile microwave and RF applications, offering a scalable route for high-performance, multifunctional devices with low energy consumption in next-generation telecommunications and wireless networks.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"80-85"},"PeriodicalIF":0.0,"publicationDate":"2025-06-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11039081","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144557714","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-06-13DOI: 10.1109/TMAT.2025.3579714
Sanjay Kumar;Shalu Rani
Herein, we present a CMOS-compatible fabrication process, in-depth materials, and electrical analysis of yttrium oxide (Y2O3)-based memristive devices having a device size of 100 μm2. The fabricated devices exhibit improved performance by incorporating TiN electrodes and device scaling and efficiently emulate the various low-power neuromorphic and pattern recognition tasks. The fabricated memristive devices exhibit stable bipolar resistive switching behavior with an excellent endurance beyond 50,000 cycles and retention properties exceeding 106 s by maintaining a very high ON/OFF ratio of 104. Additionally, the fabricated devices show remarkable stability in the device switching voltages under cycle-to-cycle (C2C) and device-to-device (D2D) wherein, the coefficient of variability (CV) in the device switching voltages in C2C and D2D is 4.95% and 11.39%, respectively. Moreover, the fabricated devices efficiently emulate the synaptic response by emulating potentiation, depression, paired-pulse facilitation (PPF), and paired-pulse depression (PPD) and also exhibit the device conductance tunability under the variations in the pulse width as similar to the biological synapse counterpart. Furthermore, the fabricated devices efficiently show the pattern recognition task by achieving an accuracy of 88.2% for the handwriting MNIST dataset. Therefore, the present work opens a new horizon in the field of miniaturized artificial synapses and neuromorphic computing to perform various operations.
{"title":"Improved Performance of Yttrium Oxide-Based Memristor Through TiN Electrodes and Device Scaling for Neuromorphic and Pattern Recognition","authors":"Sanjay Kumar;Shalu Rani","doi":"10.1109/TMAT.2025.3579714","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3579714","url":null,"abstract":"Herein, we present a CMOS-compatible fabrication process, in-depth materials, and electrical analysis of yttrium oxide (Y<sub>2</sub>O<sub>3</sub>)-based memristive devices having a device size of 100 μm<sup>2</sup>. The fabricated devices exhibit improved performance by incorporating TiN electrodes and device scaling and efficiently emulate the various low-power neuromorphic and pattern recognition tasks. The fabricated memristive devices exhibit stable bipolar resistive switching behavior with an excellent endurance beyond 50,000 cycles and retention properties exceeding 10<sup>6</sup> s by maintaining a very high ON/OFF ratio of 10<sup>4</sup>. Additionally, the fabricated devices show remarkable stability in the device switching voltages under cycle-to-cycle (C2C) and device-to-device (D2D) wherein, the coefficient of variability (<italic>C</i><sub>V</sub>) in the device switching voltages in C2C and D2D is 4.95% and 11.39%, respectively. Moreover, the fabricated devices efficiently emulate the synaptic response by emulating potentiation, depression, paired-pulse facilitation (PPF), and paired-pulse depression (PPD) and also exhibit the device conductance tunability under the variations in the pulse width as similar to the biological synapse counterpart. Furthermore, the fabricated devices efficiently show the pattern recognition task by achieving an accuracy of 88.2% for the handwriting MNIST dataset. Therefore, the present work opens a new horizon in the field of miniaturized artificial synapses and neuromorphic computing to perform various operations.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"72-79"},"PeriodicalIF":0.0,"publicationDate":"2025-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144524374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-04-21DOI: 10.1109/TMAT.2025.3562290
{"title":"Call for Papers: Ultrawide Band Gap Semiconductor Devices for RF, Power and Optoelectronic Applications","authors":"","doi":"10.1109/TMAT.2025.3562290","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3562290","url":null,"abstract":"","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"C3-C3"},"PeriodicalIF":0.0,"publicationDate":"2025-04-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10970663","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143856185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-04-17DOI: 10.1109/TMAT.2025.3561623
{"title":"IEEE Electron Devices Society","authors":"","doi":"10.1109/TMAT.2025.3561623","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3561623","url":null,"abstract":"","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"C2-C2"},"PeriodicalIF":0.0,"publicationDate":"2025-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10967368","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143845496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-04-17DOI: 10.1109/TMAT.2025.3562178
Mun-Cheol Paek;Han-Won Ryu;Hyun Hwangbo;Yong-Ha Lee;Chong-Ook Park
We have implemented LTCC (Low Temperature Co-Fired Ceramics) based packages for all solid-state electrochemical hydrogen sensor modules. The hydrogen sensor utilizing a solid electrolyte is designed to have a hetero-junction structure of a proton conductor and an oxygen ion conductor. LTCC is a composite material of ceramic powders and glass frits, and can be sintered at a low temperature of 900 °C or less, and has superior electrical, mechanical, and thermal properties compared to PCB. In this study, we developed a package technology for hydrogen sensor modules using this LTCC material. A double layer structure is used to form the package, and in the bottom plate, a mount for the hydrogen sensor, line guides for air flow, and guides to support the wires are fabricated. Laser pulses are employed to form 3D structures of LTCC including the mounting cavities and vias to connect the metal electrodes of the sensor. The hydrogen sensor is mounted in the center of the bottom plate and connected to the Ag/Pt electrode formed at the backside of the plate through 4 wires and via holes. The measurement results to check the hydrogen response of the sensors using LTCC packages show that the solid-state electrochemical voltage change from 248.2 ∼ 296.4 mV to 472.8 ∼ 554.5.2 mV for hydrogen concentration from 0.5 to 4.0% in the air. The electrochemical voltage of this sensor is linearly proportional to the logarithm of the hydrogen partial pressure. The reproducibility tests show that the change of the sensitivity of the sensor was within 4.3% deviation for 3 times repeat test. This reaction sensitivity remains the same with a deviation of less than 1.2% in the test even after 52 days. In the thermal shock test for environmental evaluation, all hydrogen sensor packages fabricated in this study show normal operation.
{"title":"Implementation of Low Temperature Co-Fired Ceramic Packages for All Solid-State Hydrogen Sensor Modules","authors":"Mun-Cheol Paek;Han-Won Ryu;Hyun Hwangbo;Yong-Ha Lee;Chong-Ook Park","doi":"10.1109/TMAT.2025.3562178","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3562178","url":null,"abstract":"We have implemented LTCC (Low Temperature Co-Fired Ceramics) based packages for all solid-state electrochemical hydrogen sensor modules. The hydrogen sensor utilizing a solid electrolyte is designed to have a hetero-junction structure of a proton conductor and an oxygen ion conductor. LTCC is a composite material of ceramic powders and glass frits, and can be sintered at a low temperature of 900 °C or less, and has superior electrical, mechanical, and thermal properties compared to PCB. In this study, we developed a package technology for hydrogen sensor modules using this LTCC material. A double layer structure is used to form the package, and in the bottom plate, a mount for the hydrogen sensor, line guides for air flow, and guides to support the wires are fabricated. Laser pulses are employed to form 3D structures of LTCC including the mounting cavities and vias to connect the metal electrodes of the sensor. The hydrogen sensor is mounted in the center of the bottom plate and connected to the Ag/Pt electrode formed at the backside of the plate through 4 wires and via holes. The measurement results to check the hydrogen response of the sensors using LTCC packages show that the solid-state electrochemical voltage change from 248.2 ∼ 296.4 mV to 472.8 ∼ 554.5.2 mV for hydrogen concentration from 0.5 to 4.0% in the air. The electrochemical voltage of this sensor is linearly proportional to the logarithm of the hydrogen partial pressure. The reproducibility tests show that the change of the sensitivity of the sensor was within 4.3% deviation for 3 times repeat test. This reaction sensitivity remains the same with a deviation of less than 1.2% in the test even after 52 days. In the thermal shock test for environmental evaluation, all hydrogen sensor packages fabricated in this study show normal operation.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"42-48"},"PeriodicalIF":0.0,"publicationDate":"2025-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143938017","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-04-16DOI: 10.1109/TMAT.2025.3561740
Seung Jin Oh;Jae Hak Lee;Seung Man Kim;Seongheum Han;Ah-Young Park;Hyunkyu Moon;Jun-Yeob Song
Mechanical testing methodologies are essential for advancing semiconductor packaging processes, ensuring the mechanical reliability of devices subjected to increasingly complex manufacturing processes and operational conditions. In recent years, advanced packaging technologies, including system-in-package (SiP) using 2.xD and 3D integration, have played a crucial role in enabling high-performance electronic devices. However, the miniaturization of device structures and integration of materials with mismatched thermomechanical properties have introduced significant mechanical challenges, including warpage, interfacial delamination, and fracture-induced failures. This review comprehensively evaluates key mechanical testing methodologies used to characterize the material properties and interfacial reliability of materials in semiconductor packages. Techniques such as the tensile test and double-cantilever beam (DCB) test are critically examined, with a focus on their effectiveness in assessing thin-film mechanical behavior, adhesion properties, and fracture mechanisms in miniaturized semiconductor structures. Furthermore, this review highlights the limitations of traditional testing techniques in micro- and nanoscale applications and explores emerging testing approaches. By providing a comparative analysis of mechanical testing techniques and their applications in semiconductor packaging, this work aims to provide insights for optimizing reliability evaluation strategies and guiding future developments in advanced packaging technologies.
{"title":"Overview of Testing Methods for Mechanical and Adhesion Properties of Materials in Semiconductor Packages","authors":"Seung Jin Oh;Jae Hak Lee;Seung Man Kim;Seongheum Han;Ah-Young Park;Hyunkyu Moon;Jun-Yeob Song","doi":"10.1109/TMAT.2025.3561740","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3561740","url":null,"abstract":"Mechanical testing methodologies are essential for advancing semiconductor packaging processes, ensuring the mechanical reliability of devices subjected to increasingly complex manufacturing processes and operational conditions. In recent years, advanced packaging technologies, including system-in-package (SiP) using 2.xD and 3D integration, have played a crucial role in enabling high-performance electronic devices. However, the miniaturization of device structures and integration of materials with mismatched thermomechanical properties have introduced significant mechanical challenges, including warpage, interfacial delamination, and fracture-induced failures. This review comprehensively evaluates key mechanical testing methodologies used to characterize the material properties and interfacial reliability of materials in semiconductor packages. Techniques such as the tensile test and double-cantilever beam (DCB) test are critically examined, with a focus on their effectiveness in assessing thin-film mechanical behavior, adhesion properties, and fracture mechanisms in miniaturized semiconductor structures. Furthermore, this review highlights the limitations of traditional testing techniques in micro- and nanoscale applications and explores emerging testing approaches. By providing a comparative analysis of mechanical testing techniques and their applications in semiconductor packaging, this work aims to provide insights for optimizing reliability evaluation strategies and guiding future developments in advanced packaging technologies.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"49-63"},"PeriodicalIF":0.0,"publicationDate":"2025-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143937983","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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