Pub Date : 2010-12-01DOI: 10.1109/TENCON.2010.5686547
Jeng-Ji Huang, Yeh-Horng Chen, D. Shiung
In IEEE 802.11e, a centralized polling based channel access mechanism is provided for the quality-of-service (QoS) provision of real-time applications. In order to improve bandwidth efficiency of polling for uplink variable bit rate (VBR) sources, it has previously been proposed in, e.g., ARROW, that the amount of backlogged traffic is fed back for exact bandwidth allocation. However, due to that the feedback and the bandwidth allocation are performed separately in two different polls, transmission latency incurred by packets could cause them to violate delay constraint. In this paper, a four-way-polling scheduler is first proposed by directly inquiring buffer occupancy information of an uplink station during a poll. Theoretical analysis is then performed to evaluate the performance of both the proposed scheduler and ARROW. From both analytical and ns-2 simulation results, it is shown that packet loss rates can effectively be reduced and more capacity can thereby be obtained under the proposed scheduler, as compared with ARROW.
{"title":"A four-way-polling QoS scheduler for IEEE 802.11e HCCA","authors":"Jeng-Ji Huang, Yeh-Horng Chen, D. Shiung","doi":"10.1109/TENCON.2010.5686547","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686547","url":null,"abstract":"In IEEE 802.11e, a centralized polling based channel access mechanism is provided for the quality-of-service (QoS) provision of real-time applications. In order to improve bandwidth efficiency of polling for uplink variable bit rate (VBR) sources, it has previously been proposed in, e.g., ARROW, that the amount of backlogged traffic is fed back for exact bandwidth allocation. However, due to that the feedback and the bandwidth allocation are performed separately in two different polls, transmission latency incurred by packets could cause them to violate delay constraint. In this paper, a four-way-polling scheduler is first proposed by directly inquiring buffer occupancy information of an uplink station during a poll. Theoretical analysis is then performed to evaluate the performance of both the proposed scheduler and ARROW. From both analytical and ns-2 simulation results, it is shown that packet loss rates can effectively be reduced and more capacity can thereby be obtained under the proposed scheduler, as compared with ARROW.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116661455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper studies the resource allocation algorithm for multicasting scalable video coding (SVC) source in WiMax network. In order to effectively utilize the radio resources, the proposed scheme considers the channel condition of each mobile station for the establishment of multicast groups. We considers that a service multicast group, which receive the same service traffic simultaneously, can be divided into several delivery multicast groups in WiMAX network for better radio resource utilization. And the delivery multicast group is designed as a “soft-group” that can be flexibly arranged. The proposed algorithm divides the allocation procedure into two parts in a heuristic way to reduce the computing complexity. The delivery multicast group allocation part applies the willingness to pay and throughput comparison concepts to arrange the subchannel for users. The SVC resource allocation part utilizes the divide and conquer approach to reduce the radio resource consumption. The simulation results show that the proposed scheme can minimize the resource usage according to each receiver's channel condition for better transmission efficiency and can provide fair video quality as well.
{"title":"Study of SVC traffic multicast over WiMAX network","authors":"I-Hsuan Peng, Yen-Wen Chen, Chia-Han Lee, Chang-Wu Chen","doi":"10.1109/TENCON.2010.5686536","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686536","url":null,"abstract":"This paper studies the resource allocation algorithm for multicasting scalable video coding (SVC) source in WiMax network. In order to effectively utilize the radio resources, the proposed scheme considers the channel condition of each mobile station for the establishment of multicast groups. We considers that a service multicast group, which receive the same service traffic simultaneously, can be divided into several delivery multicast groups in WiMAX network for better radio resource utilization. And the delivery multicast group is designed as a “soft-group” that can be flexibly arranged. The proposed algorithm divides the allocation procedure into two parts in a heuristic way to reduce the computing complexity. The delivery multicast group allocation part applies the willingness to pay and throughput comparison concepts to arrange the subchannel for users. The SVC resource allocation part utilizes the divide and conquer approach to reduce the radio resource consumption. The simulation results show that the proposed scheme can minimize the resource usage according to each receiver's channel condition for better transmission efficiency and can provide fair video quality as well.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115993822","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-12-01DOI: 10.1109/TENCON.2010.5686023
Tsuyoshi Kimura, N. Kai, M. Amagasaki, M. Kuga, T. Sueyoshi
SRAM-based field programmable gate arrays (FPGAs) are vulnerable to a single event upset (SEU), which is induced by radiation effect. Therefore, the dependable design techniques become important, and the accurate dependability analysis method is required to demonstrate their robustness. Most of present analysis techniques are performed by using full reconfiguration to emulate the soft error. However, it takes long time to analyze the dependability because it requires many times of reconfiguration to complete the soft error injection. In the present paper, we construct the soft error estimation system to analyze the reliability and to reduce the estimation time. Moreover, we apply monte carlo simulation to our approach, and identify trade-off between accuracy of error rate and estimation time. As a result of our experimentation for 8-bit full-adder and multiplier, we can show the dependability of the implemented system. Also, the constructed system can reduce the estimation time. According to the result, when performing about 50% circuit monte carlo simulation, the error rate is within 20%.
{"title":"A case study of evaluation technique for soft error tolerance on SRAM-based FPGAs","authors":"Tsuyoshi Kimura, N. Kai, M. Amagasaki, M. Kuga, T. Sueyoshi","doi":"10.1109/TENCON.2010.5686023","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686023","url":null,"abstract":"SRAM-based field programmable gate arrays (FPGAs) are vulnerable to a single event upset (SEU), which is induced by radiation effect. Therefore, the dependable design techniques become important, and the accurate dependability analysis method is required to demonstrate their robustness. Most of present analysis techniques are performed by using full reconfiguration to emulate the soft error. However, it takes long time to analyze the dependability because it requires many times of reconfiguration to complete the soft error injection. In the present paper, we construct the soft error estimation system to analyze the reliability and to reduce the estimation time. Moreover, we apply monte carlo simulation to our approach, and identify trade-off between accuracy of error rate and estimation time. As a result of our experimentation for 8-bit full-adder and multiplier, we can show the dependability of the implemented system. Also, the constructed system can reduce the estimation time. According to the result, when performing about 50% circuit monte carlo simulation, the error rate is within 20%.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129734156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-12-01DOI: 10.1109/TENCON.2010.5685851
Y. Togawa, T. Kimura, K. Harada, A. Tonomura, Y. Otani
We microscopically investigate the dynamics of magnetic domains and domain walls induced by a current pulse in Permalloy narrow wires by means of Lorentz microscopy and simultaneous transport measurement. A variety of magnetic domain and domain wall dynamics are induced as a function of current density flowing into the wire and wire resistance. Important finding is that observed magnetic domain wall displacement and domain nucleation explicitly exhibit stochastic nature, indicating that the magnetic state in the wire is hardly controlled by using solely the current pulse. However, the application of small in-plane magnetic field changes drastically the nature into deterministic, which effectively improves controllability of the magnetic domain and domain wall dynamics using current.
{"title":"Stochastic nature of current-excited magnetic domain and domain wall dynamics microscopically investigated by Lorentz microscopy","authors":"Y. Togawa, T. Kimura, K. Harada, A. Tonomura, Y. Otani","doi":"10.1109/TENCON.2010.5685851","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5685851","url":null,"abstract":"We microscopically investigate the dynamics of magnetic domains and domain walls induced by a current pulse in Permalloy narrow wires by means of Lorentz microscopy and simultaneous transport measurement. A variety of magnetic domain and domain wall dynamics are induced as a function of current density flowing into the wire and wire resistance. Important finding is that observed magnetic domain wall displacement and domain nucleation explicitly exhibit stochastic nature, indicating that the magnetic state in the wire is hardly controlled by using solely the current pulse. However, the application of small in-plane magnetic field changes drastically the nature into deterministic, which effectively improves controllability of the magnetic domain and domain wall dynamics using current.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130630731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-12-01DOI: 10.1109/TENCON.2010.5686411
Y. Nakashima, K. Nagai, Terumitsu Tanaka, K. Matsuyama, Y. Nozaki
Fundamental operations in magneto-static spin wave devices of nucleation, propagation and inductive detection for a spin wave packets (magnetic solitons) are numerically studied by using micromagnetic simulations. The collective spin dynamics and device performances are compared for three different spin wave modes. Simulation results of the group velocity reasonably agree with the theoretical prediction under a thin film approximation. Structural and operational parameters are optimized so as to maximize the inductive output voltage Vout. The practical Vout of 0.052 mV/µm2 is obtained at optimized parameters in a spin wave mode of magneto-static backward volume wave.
{"title":"Numerical study on inductive detection of magnetostatic spin wave packet","authors":"Y. Nakashima, K. Nagai, Terumitsu Tanaka, K. Matsuyama, Y. Nozaki","doi":"10.1109/TENCON.2010.5686411","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686411","url":null,"abstract":"Fundamental operations in magneto-static spin wave devices of nucleation, propagation and inductive detection for a spin wave packets (magnetic solitons) are numerically studied by using micromagnetic simulations. The collective spin dynamics and device performances are compared for three different spin wave modes. Simulation results of the group velocity reasonably agree with the theoretical prediction under a thin film approximation. Structural and operational parameters are optimized so as to maximize the inductive output voltage Vout. The practical Vout of 0.052 mV/µm2 is obtained at optimized parameters in a spin wave mode of magneto-static backward volume wave.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"143 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130920114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-12-01DOI: 10.1109/TENCON.2010.5686771
Tao Wang, K. Urahama
We present a method for resizing images and videos by deleting or inserting less important rows or columns in images and frames in videos. Their deletion leads to down-sizing of images and shortening of videos while the insertion yields image up-sizing and video elongation. This method is inexpensive than the seam carving with comparably low distortion of objects in images or videos. We use the down-sizing technique in this method for compressing the file size of images and videos with low distortion of important objects in them.
{"title":"Cartesian resizing of image and video for data compression","authors":"Tao Wang, K. Urahama","doi":"10.1109/TENCON.2010.5686771","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686771","url":null,"abstract":"We present a method for resizing images and videos by deleting or inserting less important rows or columns in images and frames in videos. Their deletion leads to down-sizing of images and shortening of videos while the insertion yields image up-sizing and video elongation. This method is inexpensive than the seam carving with comparably low distortion of objects in images or videos. We use the down-sizing technique in this method for compressing the file size of images and videos with low distortion of important objects in them.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125521070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-12-01DOI: 10.1109/TENCON.2010.5686540
S. Nagata, G. Nakagawa, T. Asano
Metal induced lateral crystallization (MILC) using nickel di-silicide catalyst is able to grow poly-Si films having a preferential crystal orientation along surface normal direction. The poly-Si film prepared by MILC, however, contains randomly distributed sub-grain boundaries which may degrade the performance of poly-Si TFT fabricated using the MILC film. We have investigated effects of patterning of the a-Si film prior to MILC on the growth characteristics and TFT performance. When the width of a-Si film pattern was narrowed, grain filtering effect occurred and, as a result, poly-Si islands whose active region for TFT is mostly composed of single oriented crystal were successfully grown. We characterized the film thus prepared by fabricating n and p-channel TFTs. TFTs were fabricated using the standard high temperature process. The results indicated that TFT performance is very much improved in terms of carrier mobility, on-current, and sub-threshold swing. We conclude that the pre-growth pattering of a-Si in MILC is useful technique to improve the performance of MILC TFTs.
{"title":"Grain filtering in MILC and its impact on performance of n- and p-channel TFTs","authors":"S. Nagata, G. Nakagawa, T. Asano","doi":"10.1109/TENCON.2010.5686540","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686540","url":null,"abstract":"Metal induced lateral crystallization (MILC) using nickel di-silicide catalyst is able to grow poly-Si films having a preferential crystal orientation along surface normal direction. The poly-Si film prepared by MILC, however, contains randomly distributed sub-grain boundaries which may degrade the performance of poly-Si TFT fabricated using the MILC film. We have investigated effects of patterning of the a-Si film prior to MILC on the growth characteristics and TFT performance. When the width of a-Si film pattern was narrowed, grain filtering effect occurred and, as a result, poly-Si islands whose active region for TFT is mostly composed of single oriented crystal were successfully grown. We characterized the film thus prepared by fabricating n and p-channel TFTs. TFTs were fabricated using the standard high temperature process. The results indicated that TFT performance is very much improved in terms of carrier mobility, on-current, and sub-threshold swing. We conclude that the pre-growth pattering of a-Si in MILC is useful technique to improve the performance of MILC TFTs.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116124264","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-12-01DOI: 10.1109/TENCON.2010.5686653
K. Nojima, Y. Katayama, K. Iramina
The aim of this study is to investigate the effects of repetitive Transcranial Magnetic Stimulation (rTMS) to the electroencephalogram (EEG). rTMS of 100 pulses were applied over the primary motor area in the left hemisphere. The EEG was recorded during and after rTMS of 100 pulses applied. rTMS of 100 pulses consists of rTMS of 1 Hz 5 pulses repeated 20 times at ten seconds intervals. Also, the effects of the pulses number were investigated. Power spectrums of EEG amplitude were calculated. After the 100 pulses of rTMS applied, it was found that the power spectrum of EEG amplitude is significantly increased at the opposite electrode to the stimulus point in the right hemisphere. There was no significantly change in the amplitude of power in y-band by sham stimulation. Current distribution which induced by TMS was calculated. It was found that the effects appeared in the contralateral hemisphere at 27.5 ms after TMS applied. Also, the electrical activity which induced by TMS were appeared stronger in last 5 pulses of rTMS than first 5 pulses of rTMS.
{"title":"Change of EEG activity by repetitive Transcranial Magnetic Stimulation","authors":"K. Nojima, Y. Katayama, K. Iramina","doi":"10.1109/TENCON.2010.5686653","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686653","url":null,"abstract":"The aim of this study is to investigate the effects of repetitive Transcranial Magnetic Stimulation (rTMS) to the electroencephalogram (EEG). rTMS of 100 pulses were applied over the primary motor area in the left hemisphere. The EEG was recorded during and after rTMS of 100 pulses applied. rTMS of 100 pulses consists of rTMS of 1 Hz 5 pulses repeated 20 times at ten seconds intervals. Also, the effects of the pulses number were investigated. Power spectrums of EEG amplitude were calculated. After the 100 pulses of rTMS applied, it was found that the power spectrum of EEG amplitude is significantly increased at the opposite electrode to the stimulus point in the right hemisphere. There was no significantly change in the amplitude of power in y-band by sham stimulation. Current distribution which induced by TMS was calculated. It was found that the effects appeared in the contralateral hemisphere at 27.5 ms after TMS applied. Also, the electrical activity which induced by TMS were appeared stronger in last 5 pulses of rTMS than first 5 pulses of rTMS.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"168 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115237168","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-12-01DOI: 10.1109/TENCON.2010.5686014
Qian Zhao, Y. Ichinomiya, Yasuhiro Okamoto, M. Amagasaki, M. Iida, T. Sueyoshi
The field-programmable gate arrays (FPGAs) are widely used in varies fields in recent years. However, because of large amounts of configuration memories in FPGAs are used to implement logic and routing, the single event upset (SEU) problem makes them not feasible for applications that need high reliability. Moreover, as the threshold voltage becomes lower with the development of silicon process technology, the configuration memories are becoming more sensitive to SEU. Therefore, FPGAs require new technology to improve its dependability. In this research, we first develop a new Hamming code based error detect and correct (EDC) circuit that can prevent the configuration memory of a reconfigurable device from SEU. We then propose a novel reconfigurable logic element, namely COGRE, which will use much less configuration memory than the conventional FPGA 4-, 5- or 6-LUTs (lookup tables). Evaluation revealed that compared to the 6-LUT FPGAs with triple modular redundancy (TMR) configuration memory blocks, the 5- and 6-input COGRE with the novel error detect and correct circuit save about 75.44 and 74.29% memories on average, respectively. And the dependability of the proposed architectures is about 6.8 to 10 times better than the LUTs with a tile level TMR structure on average. Moreover, with the consideration of the on the fly scrubbing advantage of the EDC, SEUs cannot be accumulated, so a much higher dependability can be achieved.
{"title":"A less configuration memory reconfigurable logic device with error detect and correct circuit","authors":"Qian Zhao, Y. Ichinomiya, Yasuhiro Okamoto, M. Amagasaki, M. Iida, T. Sueyoshi","doi":"10.1109/TENCON.2010.5686014","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5686014","url":null,"abstract":"The field-programmable gate arrays (FPGAs) are widely used in varies fields in recent years. However, because of large amounts of configuration memories in FPGAs are used to implement logic and routing, the single event upset (SEU) problem makes them not feasible for applications that need high reliability. Moreover, as the threshold voltage becomes lower with the development of silicon process technology, the configuration memories are becoming more sensitive to SEU. Therefore, FPGAs require new technology to improve its dependability. In this research, we first develop a new Hamming code based error detect and correct (EDC) circuit that can prevent the configuration memory of a reconfigurable device from SEU. We then propose a novel reconfigurable logic element, namely COGRE, which will use much less configuration memory than the conventional FPGA 4-, 5- or 6-LUTs (lookup tables). Evaluation revealed that compared to the 6-LUT FPGAs with triple modular redundancy (TMR) configuration memory blocks, the 5- and 6-input COGRE with the novel error detect and correct circuit save about 75.44 and 74.29% memories on average, respectively. And the dependability of the proposed architectures is about 6.8 to 10 times better than the LUTs with a tile level TMR structure on average. Moreover, with the consideration of the on the fly scrubbing advantage of the EDC, SEUs cannot be accumulated, so a much higher dependability can be achieved.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"46 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120905197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-12-01DOI: 10.1109/TENCON.2010.5685923
Shinya Yamada, A. Keijiro, S. Kusakabe, Y. Omori
In software development, there is a problem that development cost increases by back track when bugs which are included in the phase of requirement definition are found in the after phases. As an effective method to solve the problem, we have a method with a formal specification language for requirement. A formal specification language can describe the functional requirement exactly with mathematical in and verifies the specification with tools. In formal method, we change the specification in a formal specification to executable program with stepwise refinement. At stepwise refinement step, we find bugs by proof of the specification. Herewith, we can get the program of the high level reliability. But, it is expensive to develop with proof. There is a method to verify specification with test cases generated by manpower. But, there are possibilities of including bugs in specification because of generating by manpower. We propose the method to validate stepwise refinement with lightweight method. We generate test cases from formal specification in VDM-SL before refinement, and test the specification after refinement. With this validation method, it is possible to validate of refinement focused state transition model. We implemented test case generator tool whose test case is executed with VDMUnit and VDMTools. We can confirm the availability of the validation of refinement with test case generator tool we implemented.
{"title":"Validation of stepwise refinement with test cases generated from formal specification","authors":"Shinya Yamada, A. Keijiro, S. Kusakabe, Y. Omori","doi":"10.1109/TENCON.2010.5685923","DOIUrl":"https://doi.org/10.1109/TENCON.2010.5685923","url":null,"abstract":"In software development, there is a problem that development cost increases by back track when bugs which are included in the phase of requirement definition are found in the after phases. As an effective method to solve the problem, we have a method with a formal specification language for requirement. A formal specification language can describe the functional requirement exactly with mathematical in and verifies the specification with tools. In formal method, we change the specification in a formal specification to executable program with stepwise refinement. At stepwise refinement step, we find bugs by proof of the specification. Herewith, we can get the program of the high level reliability. But, it is expensive to develop with proof. There is a method to verify specification with test cases generated by manpower. But, there are possibilities of including bugs in specification because of generating by manpower. We propose the method to validate stepwise refinement with lightweight method. We generate test cases from formal specification in VDM-SL before refinement, and test the specification after refinement. With this validation method, it is possible to validate of refinement focused state transition model. We implemented test case generator tool whose test case is executed with VDMUnit and VDMTools. We can confirm the availability of the validation of refinement with test case generator tool we implemented.","PeriodicalId":101683,"journal":{"name":"TENCON 2010 - 2010 IEEE Region 10 Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121204848","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：