Pub Date : 2011-12-22DOI: 10.1109/ISIEA.2011.6108685
I. Yassin, M. Taib, M. A. Abdul Aziz, N. Abdul Rahim, N. Tahir, A. Johari
In this paper, we present a Radial Basis Function Neural Network (RBFNN)-based Nonlinear Auto-Regressive Model with Exegeneous Inputs (NARX) model of a DC motor drive controller model by (Rahim, 2004). Tests were conducted to measure the accuracy of the model (using One Step Ahead (OSA) and its validity (using correlation tests and histogram analysis). The resulting model produced Mean Square Error (MSE) of 8.53 × 10−3 and 8.82 × 10−3 on the training set and test set, respectively, while fulfilling all validation tests performed.
{"title":"Identification of DC motor drive system model using Radial Basis Function (RBF) Neural Network","authors":"I. Yassin, M. Taib, M. A. Abdul Aziz, N. Abdul Rahim, N. Tahir, A. Johari","doi":"10.1109/ISIEA.2011.6108685","DOIUrl":"https://doi.org/10.1109/ISIEA.2011.6108685","url":null,"abstract":"In this paper, we present a Radial Basis Function Neural Network (RBFNN)-based Nonlinear Auto-Regressive Model with Exegeneous Inputs (NARX) model of a DC motor drive controller model by (Rahim, 2004). Tests were conducted to measure the accuracy of the model (using One Step Ahead (OSA) and its validity (using correlation tests and histogram analysis). The resulting model produced Mean Square Error (MSE) of 8.53 × 10−3 and 8.82 × 10−3 on the training set and test set, respectively, while fulfilling all validation tests performed.","PeriodicalId":110449,"journal":{"name":"2011 IEEE Symposium on Industrial Electronics and Applications","volume":"170 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116109387","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-22DOI: 10.1109/ISIEA.2011.6108720
M. Rahman, S. Majumder
Performance analysis of a power line communication system is presented considering the noise as a cyclostationary non-white Gaussian random process. The instantaneous variance of noise is considered as a function of frequency with an exponential power delay profile. An analytic approach is presented to evaluate the performance of a power line communication link in the presence of the above limitations. The expression of the signal to noise ratio is developed considering the frequency and time dependence of the cyclostationary noise. The system bit error rate (BER) is then evaluated numerically for several system parameters like system bit rate, Fourier coefficients of the non-white Gaussian noise process etc. The BER results show that there is deterioration in system BER due to time and frequency dependence of noise and the degradation is found to be significant at higher bit rates and bandwidth. The system suffers penalty in receiver sensitivity due to non-white nature of the noise process.
{"title":"Performance analysis of a power line communication system over a non-white additive Gaussian noise channel","authors":"M. Rahman, S. Majumder","doi":"10.1109/ISIEA.2011.6108720","DOIUrl":"https://doi.org/10.1109/ISIEA.2011.6108720","url":null,"abstract":"Performance analysis of a power line communication system is presented considering the noise as a cyclostationary non-white Gaussian random process. The instantaneous variance of noise is considered as a function of frequency with an exponential power delay profile. An analytic approach is presented to evaluate the performance of a power line communication link in the presence of the above limitations. The expression of the signal to noise ratio is developed considering the frequency and time dependence of the cyclostationary noise. The system bit error rate (BER) is then evaluated numerically for several system parameters like system bit rate, Fourier coefficients of the non-white Gaussian noise process etc. The BER results show that there is deterioration in system BER due to time and frequency dependence of noise and the degradation is found to be significant at higher bit rates and bandwidth. The system suffers penalty in receiver sensitivity due to non-white nature of the noise process.","PeriodicalId":110449,"journal":{"name":"2011 IEEE Symposium on Industrial Electronics and Applications","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115222091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-22DOI: 10.1109/ISIEA.2011.6108737
Khairul Shariman Bin Kalid, P. Sebastian, A. B. Saman
In mobile robotics, sometimes a non-conventional locomotion is more suitable where the terrain is rough, uneven, unstable surface or the path has only small opening for maneuvering such as in a search and rescue situation, exploration of hostile area or handling of hazardous materials. Dragging is a type of non-conventional locomotion has the benefits of being physically small, able to move on rough surface and simple to implement. This paper describes a tele-operated three-finger robot that uses dragging to achieve locomotion. Through coordinated motion of the three fingers, it can move forward, backward, left and right by dragging its body.
{"title":"TriBot: Dragging locomotion three-finger robot","authors":"Khairul Shariman Bin Kalid, P. Sebastian, A. B. Saman","doi":"10.1109/ISIEA.2011.6108737","DOIUrl":"https://doi.org/10.1109/ISIEA.2011.6108737","url":null,"abstract":"In mobile robotics, sometimes a non-conventional locomotion is more suitable where the terrain is rough, uneven, unstable surface or the path has only small opening for maneuvering such as in a search and rescue situation, exploration of hostile area or handling of hazardous materials. Dragging is a type of non-conventional locomotion has the benefits of being physically small, able to move on rough surface and simple to implement. This paper describes a tele-operated three-finger robot that uses dragging to achieve locomotion. Through coordinated motion of the three fingers, it can move forward, backward, left and right by dragging its body.","PeriodicalId":110449,"journal":{"name":"2011 IEEE Symposium on Industrial Electronics and Applications","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133248232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-22DOI: 10.1109/ISIEA.2011.6108711
C. K. Ong, M. T. Mustaffa, L.H. Goh
This paper presents the methodology of converting an asynchronous design to a synchronous design. As the size of transistor is shrinking, the difficulty of a design to meet the timing has increased. Continuously shrinking of transistor size from time to time has increased the on-die variation such as Process, Voltage, and Temperature (PVT) variation of the chip. Since Performance Verification (PV) or Static Timing Analysis (STA) tools is unable to accurately calculate the timing of asynchronous design, asynchronous design is required to migrate to synchronous based design for the STA tools to ensure the silicon timing can be met across PVT. A proper design methodology of converting asynchronous design to synchronous design is proposed in this paper. An Intel 8254 Programmable Interval Timer (PIT) is used as a case study. Current Intel 8254 timer is an asynchronous based design and it has approximately 12,000 gates. STA is performed after conversion and results shows the timing of synchronous design can be fully verified by STA. Additional comparison for area is made as well.
{"title":"Asynchronous to synchronous: A design methodology","authors":"C. K. Ong, M. T. Mustaffa, L.H. Goh","doi":"10.1109/ISIEA.2011.6108711","DOIUrl":"https://doi.org/10.1109/ISIEA.2011.6108711","url":null,"abstract":"This paper presents the methodology of converting an asynchronous design to a synchronous design. As the size of transistor is shrinking, the difficulty of a design to meet the timing has increased. Continuously shrinking of transistor size from time to time has increased the on-die variation such as Process, Voltage, and Temperature (PVT) variation of the chip. Since Performance Verification (PV) or Static Timing Analysis (STA) tools is unable to accurately calculate the timing of asynchronous design, asynchronous design is required to migrate to synchronous based design for the STA tools to ensure the silicon timing can be met across PVT. A proper design methodology of converting asynchronous design to synchronous design is proposed in this paper. An Intel 8254 Programmable Interval Timer (PIT) is used as a case study. Current Intel 8254 timer is an asynchronous based design and it has approximately 12,000 gates. STA is performed after conversion and results shows the timing of synchronous design can be fully verified by STA. Additional comparison for area is made as well.","PeriodicalId":110449,"journal":{"name":"2011 IEEE Symposium on Industrial Electronics and Applications","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133110644","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-22DOI: 10.1109/ISIEA.2011.6108761
A. S. Al-Khalid, S. Omran
This paper describes a very fast method of calculating the power factor (p.f.) for a power line. Only two progressive samples of the current and voltage are required to execute the measurement. A phase locked loop (PLL) frequency multiplier scheme allows for an accurate measurement independent of the power line frequency fluctuation.
{"title":"A very fast power factor calculation method","authors":"A. S. Al-Khalid, S. Omran","doi":"10.1109/ISIEA.2011.6108761","DOIUrl":"https://doi.org/10.1109/ISIEA.2011.6108761","url":null,"abstract":"This paper describes a very fast method of calculating the power factor (p.f.) for a power line. Only two progressive samples of the current and voltage are required to execute the measurement. A phase locked loop (PLL) frequency multiplier scheme allows for an accurate measurement independent of the power line frequency fluctuation.","PeriodicalId":110449,"journal":{"name":"2011 IEEE Symposium on Industrial Electronics and Applications","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132031075","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-22DOI: 10.1109/ISIEA.2011.6108788
H. Hussin, N. Soin
Negative Bias Temperature Instability is a serious reliability concerns for modern p-MOSFETs with Effective Oxide Thickness less than 2nm. This reliability problem can severely affect the device performance and limit the lifetime of the device. This paper is focusing on the safe operating condition and lifetime estimation of the p-MOSFET device with regard to NBTI effects. To explore the variation of safe operating condition and lifetime estimation, p-MOSFET having EOT 1nm was systematically simulated by varying the hydrogen species, measurement delay, stress temperature and stress gate voltage. The hydrogen species is varied based on molecular and atomic hydrogen. The measurement delay is simulated based on the measurement delay as found in literature. The stress temperature is varied from 80°C to 100°C and the stress gate voltage is varied from −0.5V to −1V. The simulation result shows that the safe operating voltage for molecular hydrogen and atomic hydrogen is almost the same but the device lifetime estimation for molecular hydrogen is less than atomic hydrogen. For higher measurement delay, the lifetime estimation is higher compare to no delay while the safe operating voltage estimated for 5 years lifetime shows no significant different. The lifetime estimation for variation of temperature shows that the higher stress temperature contributes to more reduction in the device lifetime. The safe operating voltage condition is decreases as the temperature increases. Meanwhile, for the simulated stress voltage, the lifetime estimation of the device is increases as the absolute value of the stress voltage decreases.
{"title":"Safe operating condition and lifetime estimation in p-MOSFET device due to Negative Bias Temperature Instability","authors":"H. Hussin, N. Soin","doi":"10.1109/ISIEA.2011.6108788","DOIUrl":"https://doi.org/10.1109/ISIEA.2011.6108788","url":null,"abstract":"Negative Bias Temperature Instability is a serious reliability concerns for modern p-MOSFETs with Effective Oxide Thickness less than 2nm. This reliability problem can severely affect the device performance and limit the lifetime of the device. This paper is focusing on the safe operating condition and lifetime estimation of the p-MOSFET device with regard to NBTI effects. To explore the variation of safe operating condition and lifetime estimation, p-MOSFET having EOT 1nm was systematically simulated by varying the hydrogen species, measurement delay, stress temperature and stress gate voltage. The hydrogen species is varied based on molecular and atomic hydrogen. The measurement delay is simulated based on the measurement delay as found in literature. The stress temperature is varied from 80°C to 100°C and the stress gate voltage is varied from −0.5V to −1V. The simulation result shows that the safe operating voltage for molecular hydrogen and atomic hydrogen is almost the same but the device lifetime estimation for molecular hydrogen is less than atomic hydrogen. For higher measurement delay, the lifetime estimation is higher compare to no delay while the safe operating voltage estimated for 5 years lifetime shows no significant different. The lifetime estimation for variation of temperature shows that the higher stress temperature contributes to more reduction in the device lifetime. The safe operating voltage condition is decreases as the temperature increases. Meanwhile, for the simulated stress voltage, the lifetime estimation of the device is increases as the absolute value of the stress voltage decreases.","PeriodicalId":110449,"journal":{"name":"2011 IEEE Symposium on Industrial Electronics and Applications","volume":"359 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133952819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-22DOI: 10.1109/ISIEA.2011.6108712
Md. Arafat Hossain Khan, A. Rahman, T. Muntasir, U. Acharjee, Md. Abu Layek
Early voltage is indeed a very simple form of calculation for mathematical ease. But Channel Length Modulation is not actually linear. The non-linear Channel Length Modulation is in fact tells nothing strict about the Early voltage conception of MOSFET. For very short channel devices or thin oxide insulation, there arises lots of parameters which must be considered. The simulators uses lot more difficult equations to calculate the quantities. This paper deals with HSPICE, that uses hundreds of parameters to return the real world situation as it considers lots of non-ideal effects like- Non-uniform doping, Short channel DIBL effects, Narrow-width effect, Gate to substrate leakage, Bulk charge effect, Velocity saturation of intrinsic and extrinsic case, Drain induced threshold shift by pocket implant, Velocity overshoot, Flicker noise, Temperature dependence and a lot more complexities [1]. This paper describes the numerical approach to show whether the existing Early voltage approximation is valid for BSIM3 or BSIM4 MOSFET Model equations of HSPICE as they almost predict the real world situation. The most significant contribution of this paper is to propose a multiple polynomial regression method that can best approximate the Early voltage as well as the MOSFET characteristics in saturation.
{"title":"Multiple polynomial regression for modeling a MOSFET in saturation to validate the Early voltage","authors":"Md. Arafat Hossain Khan, A. Rahman, T. Muntasir, U. Acharjee, Md. Abu Layek","doi":"10.1109/ISIEA.2011.6108712","DOIUrl":"https://doi.org/10.1109/ISIEA.2011.6108712","url":null,"abstract":"Early voltage is indeed a very simple form of calculation for mathematical ease. But Channel Length Modulation is not actually linear. The non-linear Channel Length Modulation is in fact tells nothing strict about the Early voltage conception of MOSFET. For very short channel devices or thin oxide insulation, there arises lots of parameters which must be considered. The simulators uses lot more difficult equations to calculate the quantities. This paper deals with HSPICE, that uses hundreds of parameters to return the real world situation as it considers lots of non-ideal effects like- Non-uniform doping, Short channel DIBL effects, Narrow-width effect, Gate to substrate leakage, Bulk charge effect, Velocity saturation of intrinsic and extrinsic case, Drain induced threshold shift by pocket implant, Velocity overshoot, Flicker noise, Temperature dependence and a lot more complexities [1]. This paper describes the numerical approach to show whether the existing Early voltage approximation is valid for BSIM3 or BSIM4 MOSFET Model equations of HSPICE as they almost predict the real world situation. The most significant contribution of this paper is to propose a multiple polynomial regression method that can best approximate the Early voltage as well as the MOSFET characteristics in saturation.","PeriodicalId":110449,"journal":{"name":"2011 IEEE Symposium on Industrial Electronics and Applications","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133796406","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-22DOI: 10.1109/ISIEA.2011.6108776
K. Kamil, K. H. Chong, S. K. Tiong, K. Yeap
In this paper, a crossover factor, fTIG is introduced to the Finite Persisting Sphere Genetic Algorithm (FPSGA). The factor provides a variable range of the loop in the process of Finite Persisting Sphere. By the existing of the variable range, the risk to have too large number of loop or too small number of loop in the FPSGA can be reduced. Too large number of loop will risk of repeating using the same data and too small number of loop will cause the loss of good genes in the FPSGA. By the proposed approach, potential to achieve the global solution in a small number of population will be increased and at the same time less time required running the process in the loop. This paper show that FPSGA with fTIG has higher global solution compared to other method and this method has faster converges to the global solution. The experiment result revealed the superiority of fTIG in FPSGA.
{"title":"The implementation of crossover factor, fTIG in the Finite Persisting Sphere Genetic Algorithm","authors":"K. Kamil, K. H. Chong, S. K. Tiong, K. Yeap","doi":"10.1109/ISIEA.2011.6108776","DOIUrl":"https://doi.org/10.1109/ISIEA.2011.6108776","url":null,"abstract":"In this paper, a crossover factor, fTIG is introduced to the Finite Persisting Sphere Genetic Algorithm (FPSGA). The factor provides a variable range of the loop in the process of Finite Persisting Sphere. By the existing of the variable range, the risk to have too large number of loop or too small number of loop in the FPSGA can be reduced. Too large number of loop will risk of repeating using the same data and too small number of loop will cause the loss of good genes in the FPSGA. By the proposed approach, potential to achieve the global solution in a small number of population will be increased and at the same time less time required running the process in the loop. This paper show that FPSGA with fTIG has higher global solution compared to other method and this method has faster converges to the global solution. The experiment result revealed the superiority of fTIG in FPSGA.","PeriodicalId":110449,"journal":{"name":"2011 IEEE Symposium on Industrial Electronics and Applications","volume":"130 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116834965","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-22DOI: 10.1109/ISIEA.2011.6108695
A. Nandi, S. Kundu
This paper evaluates energy level performance of error control strategies in Wireless Sensor Networks (WSNs) in presence of Rayleigh fading. More precisely Forward Error Correcting (FEC) and Automatic Repeat Request (ARQ) technique are studied for a square grid WSN. ARQ scheme is compared with FEC scheme in terms of Packet Error Rate (PER), energy efficiency and total energy spent to communicate packetized data. The impact of Rayleigh fading, node spatial density and packet lengths on energy efficiency and energy expenditure is discussed. Further an optimum FEC scheme with the maximum energy efficiency for a given node spatial density and packet size is investigated. The impact of node spatial density, Rayleigh fading and packet length on optimal error correcting capability is indicated. Energy efficiency for several error correcting capabilities and packet lengths is also evaluated.
{"title":"Energy level performance of error control schemes in WSN over Rayleigh fading channel","authors":"A. Nandi, S. Kundu","doi":"10.1109/ISIEA.2011.6108695","DOIUrl":"https://doi.org/10.1109/ISIEA.2011.6108695","url":null,"abstract":"This paper evaluates energy level performance of error control strategies in Wireless Sensor Networks (WSNs) in presence of Rayleigh fading. More precisely Forward Error Correcting (FEC) and Automatic Repeat Request (ARQ) technique are studied for a square grid WSN. ARQ scheme is compared with FEC scheme in terms of Packet Error Rate (PER), energy efficiency and total energy spent to communicate packetized data. The impact of Rayleigh fading, node spatial density and packet lengths on energy efficiency and energy expenditure is discussed. Further an optimum FEC scheme with the maximum energy efficiency for a given node spatial density and packet size is investigated. The impact of node spatial density, Rayleigh fading and packet length on optimal error correcting capability is indicated. Energy efficiency for several error correcting capabilities and packet lengths is also evaluated.","PeriodicalId":110449,"journal":{"name":"2011 IEEE Symposium on Industrial Electronics and Applications","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117073107","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-22DOI: 10.1109/ISIEA.2011.6108783
N. Ab Wahab, M. K. Mohd Salleh, O. H. Hassan, Z. Awang
A single-mode ring resonator which is fed along one of its quarter-wavelength sides is presented. The resonator's response presents transmission zeros whose frequencies can be modified by adjusting the line impedance of the ring and the coupling level of the feeding coupled-line. The proposed topology introduced much simpler bandpass filter configuration and reduced the number of control parameters. This idea is tested on FR4 microstrip substrate using the electromagnetic simulation. The measurement results are then presented in this paper to show its feasibility.
{"title":"Side-coupled single-mode ring resonator with transmission zeros","authors":"N. Ab Wahab, M. K. Mohd Salleh, O. H. Hassan, Z. Awang","doi":"10.1109/ISIEA.2011.6108783","DOIUrl":"https://doi.org/10.1109/ISIEA.2011.6108783","url":null,"abstract":"A single-mode ring resonator which is fed along one of its quarter-wavelength sides is presented. The resonator's response presents transmission zeros whose frequencies can be modified by adjusting the line impedance of the ring and the coupling level of the feeding coupled-line. The proposed topology introduced much simpler bandpass filter configuration and reduced the number of control parameters. This idea is tested on FR4 microstrip substrate using the electromagnetic simulation. The measurement results are then presented in this paper to show its feasibility.","PeriodicalId":110449,"journal":{"name":"2011 IEEE Symposium on Industrial Electronics and Applications","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116280163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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