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UTexGen: High-quality texture reconstruction for large-scale scenes using multi-view images UTexGen:使用多视图图像进行大规模场景的高质量纹理重建
IF 1.6 4区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-12-11 DOI: 10.4218/etrij.2024-0320
Hye-Sun Kim, Yun-Ji Ban, Chang-Joon Park

When reconstructing extensive terrain, it is essential to partition it into smaller tiles for individual processing. This paper introduces a texture reconstruction approach that ensures seamless and consistent final outputs, even when processed tile by tile. Among the stages of multi-view image-based reconstruction, texture reconstruction presents significant challenges during tile-based processing. Relying solely on local tile-level data complicates achieving precise texture mapping. The absence of occlusion details between tiles can lead to selecting incorrect images as the best visible ones or adjusting tile texture colors differently, resulting in noticeable grid-like texture seams in the final result. To mitigate these issues, we leverage global depth maps to accurately detect occlusions between neighboring tiles. Furthermore, by utilizing a shared texture candidate list, we establish uniform targets for texture color correction across tiles. Experimental findings demonstrate that leveraging global information for texture reconstruction on a tile-by-tile basis enables the creation of smooth and realistic texture maps, as validated through comparisons with existing methodologies.

当重建广泛的地形时,必须将其划分为更小的瓦片进行单独处理。本文介绍了一种纹理重建方法,即使逐块处理,也能确保最终输出的无缝和一致。在多视图图像重建的各个阶段中,纹理重建是基于贴图处理的重要挑战。仅仅依赖局部瓷砖级别的数据会使实现精确的纹理映射变得复杂。贴图之间缺乏遮挡细节会导致选择不正确的图像作为最佳可见图像,或者不同地调整贴图纹理颜色,从而导致最终结果中出现明显的网格状纹理接缝。为了缓解这些问题,我们利用全局深度图来准确检测相邻瓷砖之间的遮挡。此外,通过使用共享纹理候选列表,我们建立了统一的纹理颜色校正目标。实验结果表明,通过与现有方法的比较,利用全局信息逐块地进行纹理重建可以创建光滑和逼真的纹理映射。
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引用次数: 0
Network function parallelism configuration with segment routing over IPv6 based on deep reinforcement learning 基于深度强化学习的 IPv6 分段路由网络功能并行性配置
IF 1.3 4区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-12-11 DOI: 10.4218/etrij.2023-0511
Seokwon Jang, Namseok Ko, Yeunwoong Kyung, Haneul Ko, Jaewook Lee, Sangheon Pack

Network function parallelism (NFP) has gained attention for processing packets in parallel through service functions arranged in the required service function chain. While parallel processing efficiently reduces the service function chaining (SFC) completion time, it incurs a higher network overhead (e.g., network congestion) to replicate various packets for processing. To reduce the SFC completion time while maintaining a low network overhead, we propose a deep-reinforcement-learning-based NFP algorithm (DeepNFP) that provides an SFC processing policy to determine the sequential or parallel processing of every service function. In DeepNFP, deep reinforcement learning captures the network dynamics and service function conditions and iteratively finds the SFC processing policy in the network environment. Furthermore, an SFC data plane protocol based on segment routing over IPv6 configures and operates the policy in the SFC data network. Evaluation results show that DeepNFP can achieve 46% of the SFC completion time and 66% of the network overhead compared with conventional SFC and NFP, respectively.

网络功能并行化(NFP)通过在所需的服务功能链中排列的服务功能并行处理数据包,因此受到了关注。虽然并行处理能有效缩短服务功能链(SFC)的完成时间,但复制各种数据包进行处理会产生较高的网络开销(如网络拥塞)。为了缩短 SFC 完成时间,同时保持较低的网络开销,我们提出了一种基于深度强化学习的 NFP 算法(DeepNFP),该算法提供一种 SFC 处理策略,以确定每个服务功能的顺序或并行处理。在 DeepNFP 中,深度强化学习捕捉网络动态和服务功能条件,并在网络环境中迭代地找到 SFC 处理策略。此外,基于 IPv6 网段路由的 SFC 数据平面协议可在 SFC 数据网络中配置和运行该策略。评估结果表明,与传统的 SFC 和 NFP 相比,DeepNFP 可分别缩短 46% 的 SFC 完成时间和减少 66% 的网络开销。
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引用次数: 0
UP-Net: A multi-head architecture for reading and efficiently segmenting distorted QR codes UP-Net:用于读取和有效分割扭曲QR码的多头架构
IF 1.3 4区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-12-11 DOI: 10.4218/etrij.2023-0540
Ebrahim Parcham, Mahdi Ilbeygi, Vahid Hajipour, Ali Gharaei, Mahdi Mokhtari, Mostafa Foroutan

Semantic segmentation is essential in machine vision but susceptible to noise and distortions that often appear in real-world images. We propose UPlus-Net (UP-Net), a deep-learning architecture based on the U-Net encoder–decoder architecture. We address the limitations of U-Net by introducing a multi-head architecture in UP-Net to properly handle segmentation challenges. In addition, we evaluate UP-Net for decoding distorted quick-response (QR) codes heavily polluted by noise. Experimental results confirm that UP-Net outperforms existing QR reader mobile applications, highlighting the UP-Net ability to handle challenging images. Unlike existing methods focused solely on QR code reading or segmentation, UP-Net offers a combined solution, efficiently and accurately reading distorted QR codes while performing high-quality semantic segmentation. These unique characteristics render UP-Net promising for applications demanding robust image analysis in challenging environments.

语义分割在机器视觉中是必不可少的,但容易受到现实世界图像中经常出现的噪声和扭曲的影响。我们提出了upus - net (UP-Net),一种基于U-Net编码器-解码器架构的深度学习架构。我们通过在UP-Net中引入多头架构来解决U-Net的局限性,以正确处理分段挑战。此外,我们还评估了UP-Net对严重受噪声污染的扭曲快速响应(QR)码的解码效果。实验结果证实,UP-Net优于现有的QR阅读器移动应用程序,突出了UP-Net处理具有挑战性图像的能力。不像现有的方法只专注于QR码读取或分割,UP-Net提供了一个组合的解决方案,有效和准确地读取扭曲的QR码,同时执行高质量的语义分割。这些独特的特性使UP-Net在具有挑战性的环境中要求强大的图像分析的应用中具有前景。
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引用次数: 0
Performance evaluations of AI-based obfuscated and encrypted malicious script detection with feature optimization 基于特征优化的人工智能模糊加密恶意脚本检测性能评估
IF 1.6 4区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-12-08 DOI: 10.4218/etrij.2024-0255
Kookjin Kim, Jisoo Shin, Jong-Geun Park, Jung-Tae Kim

In the digital security environment, the obfuscation and encryption of malicious scripts are primary attack methods used to evade detection. These scripts—easily spread through websites, emails, and file downloads—can be automatically executed on users' systems, posing serious security threats. To overcome the limitations of signature-based detection methods, this study proposed a methodology for real-time detection of obfuscated and encrypted malicious scripts using ML/DL models with feature optimization techniques. The obfuscated script datasets were analyzed to identify the unique characteristics, classified into 16 feature sets, to evaluate the optimal features for the best detection accuracy. Although the detection accuracy of these datasets was < 20%, when tested with commercial antivirus services, the experimental results using ML and DL models demonstrated that the proposed light gradient boosting model (LGBM) could achieve the best detection accuracy and processing speed. The LGBM outperformed other artificial intelligence models by achieving 97% accuracy and the minimum processing time in the decoded, obfuscated, and encrypted dataset cases.

在数字安全环境中,对恶意脚本进行混淆和加密是逃避检测的主要攻击手段。这些脚本很容易通过网站、电子邮件和文件下载传播,可以在用户系统上自动执行,造成严重的安全威胁。为了克服基于签名的检测方法的局限性,本研究提出了一种使用ML/DL模型和特征优化技术实时检测混淆和加密恶意脚本的方法。对混淆后的脚本数据集进行分析,识别出其独特的特征,并将其分为16个特征集,以评估最优特征以获得最佳的检测精度。虽然这些数据集的检测精度为<;20%的实验结果表明,本文提出的光梯度增强模型(LGBM)可以达到最佳的检测精度和处理速度。LGBM在解码、混淆和加密数据集的情况下,准确率达到97%,处理时间最短,优于其他人工智能模型。
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引用次数: 0
Correction to “NEST-C: A deep learning compiler framework for heterogeneous computing systems with artificial intelligence accelerators” 更正“NEST-C:一个用于具有人工智能加速器的异构计算系统的深度学习编译器框架”
IF 1.3 4区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-12-08 DOI: 10.4218/etr2.12748
Jeman Park, Misun Yu, Jinse Kwon, Junmo Park, Jemin Lee, Yongin Kwon

NEST-C: A deep learning compiler framework for heterogeneous computing systems with artificial intelligence accelerators

https://doi.org/10.4218/etrij.2024-0139

ETRI Journal, Volume 46, Issue 5, October 2024, pp. 851–864.

In the article entitled “NEST-C: A deep learning compiler framework for heterogeneous computing systems with artificial intelligence accelerators,” the authors would like to correct the funding information of their article. It should be written as follows:

Funding information This study is supported by a grant from the Institute of Information & Communications Technology Planning & Evaluation (IITP), funded by the Korean government (MSIT) (No. RS-2023-00277060, Development of OpenEdge AI SoC hardware and software platform and No. 2018-0-00769, Neuromorphic Computing Software Platform for Artificial Intelligence Systems).

The authors would like to apologize for the inconvenience caused.

NEST-C:一个基于人工智能加速器的异构计算系统的深度学习编译器框架[//doi.org/10.4218/etrij.2024-0139ETRI Journal, Volume 46, Issue 5, October 2024, pp. 851-864]在题为“NEST-C:一个带有人工智能加速器的异构计算系统的深度学习编译器框架”的文章中,作者想纠正他们文章的资助信息。资助信息本研究由信息研究所(Institute of information &;通信技术规划&;评估(IITP),由韩国政府(MSIT)资助(No. 1)。RS-2023-00277060, OpenEdge AI SoC硬件和软件平台开发和No. 2018-0-00769,人工智能系统神经形态计算软件平台)。作者对造成的不便表示歉意。
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引用次数: 0
Correction to “Low-complexity patch projection method for efficient and lightweight point-cloud compression” 对 "用于高效、轻量级点云压缩的低复杂度补丁投影法 "的更正
IF 1.3 4区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-11-26 DOI: 10.4218/etr2.12746

Sungryeul Rhyu | Junsik Kim | Gwang Hoon Park | Kyuheon Kim

Low-complexity patch projection method for efficient and lightweight point-cloud compression

https://doi.org/10.4218/etrij.2023-0242

ETRI Journal, Volume 46, Issue 4, August 2024, pp. 683–696.

In the article entitled “Low-complexity patch projection method for efficient and lightweight point-cloud compression”, the authors would like to correct the funding information of their article. It should be written as follows:

Funding information

This study was supported by the Information Technology Research Center of the Ministry of Science and ICT, Korea (grant number: IITP-2024-2021-0-02046) and the Institute of Information & Communications Technology Planning & Evaluation, Korea (grant number: RS-2023-00227431, Development of 3D space digital media standard technology).

The authors would like to apologize for the inconvenience caused.

刘成柳|金俊植|朴光勋|金奎宪低复杂度斑块投影方法的高效轻量级点云压缩[https://doi.org/10.4218/etrij.2023-0242ETRI Journal, vol . 46, Issue 4, August 2024, pp. 683-696 .]在题为“高效轻量级点云压缩的低复杂度补丁投影方法”的文章中,作者希望更正其文章的资助信息。本研究由韩国科学和信息通信技术部信息技术研究中心(批准号:IITP-2024-2021-0-02046)和韩国信息技术研究所(iitp &;通信技术规划&;韩国评价项目(批准号:RS-2023-00227431, 3D空间数字媒体标准技术开发)。作者对造成的不便表示歉意。
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引用次数: 0
A bi-stream transformer for single-image dehazing 用于单图像除雾的双流变压器
IF 1.3 4区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-11-22 DOI: 10.4218/etrij.2024-0037
Mingrui Wang, Jinqiang Yan, Chaoying Wan, Guowei Yang, Teng Yu

Deep-learning methods, such as encoder–decoder networks, have achieved impressive results in image dehazing. However, these methods often rely only on synthesized data for training that limits their generalizability to hazy, real-world images. To leverage prior knowledge of haze properties, we propose a bi-encoder structure that integrates a prior-based encoder into a traditional encoder–decoder network. The features from both encoders were fused using a feature enhancement module. We adopted transformer blocks instead of convolutions to model local feature associations. Experimental results demonstrate that our method surpasses state-of-the-art methods for synthesized and actual hazy scenes. Therefore, we believe that our method will be a useful supplement to the collection of current artificial intelligence models and will benefit engineering applications in computer vision.

深度学习方法,如编码器-解码器网络,在图像去雾方面取得了令人印象深刻的成果。然而,这些方法通常只依赖于合成数据进行训练,这限制了它们在模糊的真实世界图像中的泛化性。为了利用雾霾特性的先验知识,我们提出了一种双编码器结构,将基于先验的编码器集成到传统的编码器-解码器网络中。两个编码器的特征使用特征增强模块进行融合。我们采用转换块代替卷积来建模局部特征关联。实验结果表明,该方法在合成和实际朦胧场景中都优于目前最先进的方法。因此,我们相信我们的方法将是对当前人工智能模型集合的有益补充,并将有利于计算机视觉的工程应用。
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引用次数: 0
High-speed end-to-edge data caching and forwarding architecture based on field programmable gate array 基于现场可编程门阵列的高速端到端数据缓存和转发体系结构
IF 1.6 4区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-11-09 DOI: 10.4218/etrij.2024-0212
Xiao Liu, Shubo Liu, Juncheng Wu, Song Song, Zhaohui Cai, Guoqing Tu

The application of the Internet of Things generates massive end-device data. Traditional end-to-edge data caching methods lack parallelism, consume numerous resources, and lack data backup mechanisms. We propose a lightweight high-speed data caching and forwarding architecture based on a field-programmable gate array. In the basic scheme, a double-data-rate memory read/write mixed control method is proposed to efficiently cache massive amounts of data. To improve reliability, we propose address-space virtualization to forward data to backup devices. To satisfy the demand for higher performance scenarios, we propose a real-time data shunting mechanism to realize an optimized scheme that supports higher data rates. These two schemes support single-link high-speed data caching and forwarding at 10 and 40 Gbps. Compared with the existing method, the basic and optimized schemes improve the performance by 25% and four times and save 66% and 40% of the resources, respectively. Thus, we provide a lightweight and reliable high-performance end-to-edge data caching solution for resource-constrained edge devices.

物联网的应用产生了海量的终端设备数据。传统的端到端数据缓存方法缺乏并行性,消耗大量资源,缺乏数据备份机制。我们提出了一种基于现场可编程门阵列的轻量级高速数据缓存和转发架构。在基本方案中,提出了一种双数据速率的存储器读写混合控制方法,以有效地缓存海量数据。为了提高可靠性,我们提出了地址空间虚拟化来将数据转发到备份设备。为了满足更高性能场景的需求,我们提出了一种实时数据分流机制,以实现支持更高数据速率的优化方案。这两种方案分别支持10gbps和40gbps的单链路高速数据缓存和转发。与现有方法相比,基本方案和优化方案的性能分别提高了25%和4倍,分别节省了66%和40%的资源。因此,我们为资源受限的边缘设备提供了一个轻量级和可靠的高性能端到端数据缓存解决方案。
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引用次数: 0
SNN eXpress: Streamlining Low-Power AI-SoC Development With Unsigned Weight Accumulation Spiking Neural Network SNN eXpress:利用无符号权值累积尖峰神经网络简化低功耗 AI-SoC 开发
IF 1.3 4区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-10-28 DOI: 10.4218/etrij.2024-0114
Hyeonguk Jang, Kyuseung Han, Kwang-Il Oh, Sukho Lee, Jae-Jin Lee, Woojoo Lee

SoCs with analog-circuit-based unsigned weight-accumulating spiking neural networks (UWA-SNNs) are a highly promising solution for achieving low-power AI-SoCs. This paper addresses the challenges that must be overcome to realize the potential of UWA-SNNs in low-power AI-SoCs: (i) the absence of UWA-SNN learning methods and the lack of an environment for developing applications based on trained SNN models and (ii) the inherent issue of testing and validating applications on the system being nearly impractical until the final chip is fabricated owing to the mixed-signal circuit implementation of UWA-SNN-based SoCs. This paper argues that, by integrating the proposed solutions, the development of an EDA tool that enables the easy and rapid development of UWA-SNN-based SoCs is feasible, and demonstrates this through the development of the SNN eXpress (SNX) tool. The developed SNX automates the generation of RTL code, FPGA prototypes, and a software development kit tailored for UWA-SNN-based application development. Comprehensive details of SNX development and the performance evaluation and verification results of two AI-SoCs developed using SNX are also presented.

采用基于模拟电路的无符号权值累积尖峰神经网络(UWA-SNN)的系统级芯片是实现低功耗人工智能系统级芯片的一种极具前景的解决方案。本文探讨了实现 UWA-SNN 在低功耗 AI-SoC 中的潜力所必须克服的挑战:(i) 缺乏 UWA-SNN 学习方法,以及缺乏基于训练有素的 SNN 模型开发应用的环境;(ii) 由于基于 UWA-SNN 的 SoC 采用混合信号电路实现,在最终芯片制造之前,在系统上测试和验证应用几乎是不切实际的。本文认为,通过整合所提出的解决方案,开发一种 EDA 工具使基于 UWA-SNN 的系统级芯片的简单快速开发成为可行,并通过开发 SNN eXpress (SNX) 工具证明了这一点。所开发的 SNX 可自动生成 RTL 代码、FPGA 原型和专为基于 UWA-SNN 的应用开发而定制的软件开发工具包。此外,还介绍了 SNX 开发的全面细节以及使用 SNX 开发的两个 AI-SoC 的性能评估和验证结果。
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引用次数: 0
PF-GEMV: Utilization maximizing architecture in fast matrix–vector multiplication for GPT-2 inference PF-GEMV:用于 GPT-2 推理的快速矩阵向量乘法中的利用率最大化架构
IF 1.3 4区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-10-28 DOI: 10.4218/etrij.2024-0111
Hyeji Kim, Yeongmin Lee, Chun-Gi Lyuh

Owing to the widespread advancement of transformer-based artificial neural networks, artificial intelligence (AI) processors are now required to perform matrix–vector multiplication in addition to the conventional matrix–matrix multiplication. However, current AI processor architectures are optimized for general matrix–matrix multiplications (GEMMs), which causes significant throughput degradation when processing general matrix–vector multiplications (GEMVs). In this study, we proposed a port-folding GEMV (PF-GEMV) scheme employing multiformat and low-precision techniques while reusing an outer product-based processor optimized for conventional GEMM operations. This approach achieves 93.7% utilization in GEMV operations with an 8-bit format on an 8 × 8 processor, thus resulting in a 7.5 × increase in throughput compared with that of the original scheme. Furthermore, when applied to the matrix operation of the GPT-2 large model, an increase in speed by 7 × is achieved in single-batch inferences.

由于基于变压器的人工神经网络的广泛发展,人工智能(AI)处理器现在除了需要执行传统的矩阵-矩阵乘法外,还需要执行矩阵-矢量乘法。然而,目前的人工智能处理器架构针对通用矩阵-矩阵乘法(GEMM)进行了优化,这导致在处理通用矩阵-矢量乘法(GEMV)时吞吐量明显下降。在这项研究中,我们提出了一种端口折叠 GEMV(PF-GEMV)方案,它采用了多格式和低精度技术,同时重新使用了针对传统 GEMM 运算优化的基于外积的处理器。在 8 × 8 处理器上进行 8 位格式的 GEMV 运算时,这种方法实现了 93.7% 的利用率,因此与原始方案相比,吞吐量提高了 7.5 倍。此外,当应用于 GPT-2 大型模型的矩阵运算时,单批推断的速度提高了 7 倍。
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引用次数: 0
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