Pub Date : 2020-12-16DOI: 10.1109/PEDES49360.2020.9379343
K. Thakre, S. Gupta, K. Mohanty
This study presents, a modified circuit for symmetrical source multilevel inverter, which consist of cascaded basic unit cells with H-bridge. It requires least number of components as compared to classical and other recent proposed topologies. Also, the suggested circuit reduced the number of on-state switches which will reduced switching loss. The multicarrier pulse width modulation scheme is used to generate pulses for each switch. The simulation results are obtained by MATLAB/Simulink and experimental output also demonstrated using dSPACE real-time controller.
{"title":"Modified circuit for cascaded multilevel inverter with reduced number of switches","authors":"K. Thakre, S. Gupta, K. Mohanty","doi":"10.1109/PEDES49360.2020.9379343","DOIUrl":"https://doi.org/10.1109/PEDES49360.2020.9379343","url":null,"abstract":"This study presents, a modified circuit for symmetrical source multilevel inverter, which consist of cascaded basic unit cells with H-bridge. It requires least number of components as compared to classical and other recent proposed topologies. Also, the suggested circuit reduced the number of on-state switches which will reduced switching loss. The multicarrier pulse width modulation scheme is used to generate pulses for each switch. The simulation results are obtained by MATLAB/Simulink and experimental output also demonstrated using dSPACE real-time controller.","PeriodicalId":124226,"journal":{"name":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130511289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-12-16DOI: 10.1109/PEDES49360.2020.9379594
Md. Apel Mahmud, T. K. Roy, Rajesh Kumar, A. Oo
In this paper, a new nonlinear output feedback controller is proposed for islanded DC microgrids using the partial feedback linearization technique while considering only the output of each component. The proposed controller is designed to ensure the desired common DC-bus voltage which depicts the maintenance of the power balance for the DC microgrid. The structure of DC microgrids includes a solar photovoltaic (PV) unit, a battery energy storage system (BESS), a standby diesel generator, and an aggregated DC load. The implementation of the proposed partial feedback linearizing control scheme requires all state information of DC microgrids which need to be either measured or estimated through observers. Traditionally, it is considered that all states can be measured for which it is essential to use large number of sensors. Here, the common DC-bus voltage which is the output of each component is used as feedback variables for the estimation of state variables using a new nonlinear state observer. The proposed output feedback control scheme is designed based on the dynamical models of all components within a DC microgrid structure. Simulation studies are carried out under different operating conditions in order to evaluate the performance of the proposed nonlinear output feedback controller including some comparisons with an existing sliding mode controller.
{"title":"Nonlinear Partial Feedback Linearizing Output Feedback Control of Islanded DC Microgrids","authors":"Md. Apel Mahmud, T. K. Roy, Rajesh Kumar, A. Oo","doi":"10.1109/PEDES49360.2020.9379594","DOIUrl":"https://doi.org/10.1109/PEDES49360.2020.9379594","url":null,"abstract":"In this paper, a new nonlinear output feedback controller is proposed for islanded DC microgrids using the partial feedback linearization technique while considering only the output of each component. The proposed controller is designed to ensure the desired common DC-bus voltage which depicts the maintenance of the power balance for the DC microgrid. The structure of DC microgrids includes a solar photovoltaic (PV) unit, a battery energy storage system (BESS), a standby diesel generator, and an aggregated DC load. The implementation of the proposed partial feedback linearizing control scheme requires all state information of DC microgrids which need to be either measured or estimated through observers. Traditionally, it is considered that all states can be measured for which it is essential to use large number of sensors. Here, the common DC-bus voltage which is the output of each component is used as feedback variables for the estimation of state variables using a new nonlinear state observer. The proposed output feedback control scheme is designed based on the dynamical models of all components within a DC microgrid structure. Simulation studies are carried out under different operating conditions in order to evaluate the performance of the proposed nonlinear output feedback controller including some comparisons with an existing sliding mode controller.","PeriodicalId":124226,"journal":{"name":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127017250","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-12-16DOI: 10.1109/PEDES49360.2020.9379370
Ashish Laddha, N. Satyanarayana, Bhanu Pratap Sanvat
Voltage stabilization of intermittent natured solar photovoltaic (PV) network is essential for making it compatible with that of load(s) accommodated after interface network(s). At the first, this manuscript presents small signal modeling of the solar PV array fed ‘Buck’ DC to DC converter (BDDC) system by linearization around the operating point. Through this, the brief obtains open, as well as closed loop transfer functions between output voltage of the solar PV network and duty ratio (d) of the BDDC incorporating parasitic elements. The communique discusses design of the Proportional Integral Derivative (PID) controller for stabilizing voltage of the solar PV incorporating detailed manner gains tuning procedure. The writing also presents a comparison of voltage response of the solar PV as obtained with open loop, closed loop PID and the Model Prediction based control (MPC).
{"title":"Design of PID and Model Predictive Control for Stabilization of Photovoltaic Voltage","authors":"Ashish Laddha, N. Satyanarayana, Bhanu Pratap Sanvat","doi":"10.1109/PEDES49360.2020.9379370","DOIUrl":"https://doi.org/10.1109/PEDES49360.2020.9379370","url":null,"abstract":"Voltage stabilization of intermittent natured solar photovoltaic (PV) network is essential for making it compatible with that of load(s) accommodated after interface network(s). At the first, this manuscript presents small signal modeling of the solar PV array fed ‘Buck’ DC to DC converter (BDDC) system by linearization around the operating point. Through this, the brief obtains open, as well as closed loop transfer functions between output voltage of the solar PV network and duty ratio (d) of the BDDC incorporating parasitic elements. The communique discusses design of the Proportional Integral Derivative (PID) controller for stabilizing voltage of the solar PV incorporating detailed manner gains tuning procedure. The writing also presents a comparison of voltage response of the solar PV as obtained with open loop, closed loop PID and the Model Prediction based control (MPC).","PeriodicalId":124226,"journal":{"name":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129217710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-12-16DOI: 10.1109/PEDES49360.2020.9379778
Mohammad Zaid, Javed Ahmad, A. Sarwar, Zeeshan Sarwer, M. Tariq, A. Alam
In this paper, a new non-isolated de-de converter with high voltage gain and reduced stress across switch and diodes is proposed. A new voltage boost cell is proposed to boost the voltage at the output at lower duty ratios. Thus, switching devices of low power rating can be selected. Apart from high gain, the converter has a single switch and continuous source current. All these features make this converter suitable to be used in microgrid applications. Steady-state working of the converter is discussed in detail and performance comparison of the converter is done with other high gain topologies. Respective expressions for voltage gain and stress across switch and diodes are presented in the paper. The power loss and efficiency of the converter are also determined by incorporating the switching characteristics of switch and diodes from datasheet into PLECS software. The software is specially designed to determine the losses in switching devices. Finally, a hardware prototype is also developed in the laboratory. The hardware results verify the results obtained through simulation.
{"title":"A Transformerless Quadratic Boost High Gain DC-DC Converter","authors":"Mohammad Zaid, Javed Ahmad, A. Sarwar, Zeeshan Sarwer, M. Tariq, A. Alam","doi":"10.1109/PEDES49360.2020.9379778","DOIUrl":"https://doi.org/10.1109/PEDES49360.2020.9379778","url":null,"abstract":"In this paper, a new non-isolated de-de converter with high voltage gain and reduced stress across switch and diodes is proposed. A new voltage boost cell is proposed to boost the voltage at the output at lower duty ratios. Thus, switching devices of low power rating can be selected. Apart from high gain, the converter has a single switch and continuous source current. All these features make this converter suitable to be used in microgrid applications. Steady-state working of the converter is discussed in detail and performance comparison of the converter is done with other high gain topologies. Respective expressions for voltage gain and stress across switch and diodes are presented in the paper. The power loss and efficiency of the converter are also determined by incorporating the switching characteristics of switch and diodes from datasheet into PLECS software. The software is specially designed to determine the losses in switching devices. Finally, a hardware prototype is also developed in the laboratory. The hardware results verify the results obtained through simulation.","PeriodicalId":124226,"journal":{"name":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121286677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-12-16DOI: 10.1109/PEDES49360.2020.9379535
Vaibhav Shah, S. Payami
The paper proposes a new 4-level converter configuration for a 4-phase, 8/6 switched reluctance motor (SRM) drive. The proposed converter is based on double bridge topology and shares a common leg for the quadrature phases in 4-phase SRM. The common leg allows the discharging quadrature-phase energy to charge the corresponding capacitor in the bridge. This, during the energization of the corresponding quadrature-phase, provides a maximum boost in voltage. Thus, an inherent voltage boosting is achieved. Analysis of different operating modes of the proposed converter is discussed. The proposed converter's effectiveness is verified through the simulation studies in the MATLAB/Simulink environment on a prototype 4-phase 8/6 SRM, designed in ANSYS/Maxwell. The proposed converter configuration uses the same number of switches and diodes as in a conventional three-level asymmetric half-bridge converter (TL-AHB). However, due to inherent boosting capability in the proposed converter configuration, the constant torque region, and the smooth torque output region are extended by 25%, compared with TL-AHB.
{"title":"A Novel 4-level Converter with Inherent Voltage Boosting for 4-Phase SRM","authors":"Vaibhav Shah, S. Payami","doi":"10.1109/PEDES49360.2020.9379535","DOIUrl":"https://doi.org/10.1109/PEDES49360.2020.9379535","url":null,"abstract":"The paper proposes a new 4-level converter configuration for a 4-phase, 8/6 switched reluctance motor (SRM) drive. The proposed converter is based on double bridge topology and shares a common leg for the quadrature phases in 4-phase SRM. The common leg allows the discharging quadrature-phase energy to charge the corresponding capacitor in the bridge. This, during the energization of the corresponding quadrature-phase, provides a maximum boost in voltage. Thus, an inherent voltage boosting is achieved. Analysis of different operating modes of the proposed converter is discussed. The proposed converter's effectiveness is verified through the simulation studies in the MATLAB/Simulink environment on a prototype 4-phase 8/6 SRM, designed in ANSYS/Maxwell. The proposed converter configuration uses the same number of switches and diodes as in a conventional three-level asymmetric half-bridge converter (TL-AHB). However, due to inherent boosting capability in the proposed converter configuration, the constant torque region, and the smooth torque output region are extended by 25%, compared with TL-AHB.","PeriodicalId":124226,"journal":{"name":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121496417","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-12-16DOI: 10.1109/PEDES49360.2020.9379827
Amir Ganjavi, H. Rathnayake, D. Kumar, Firuz Zare, A. Abbosh, P. Davari
Magnetic chokes are conventionally utilized at the DC or AC side of the Adjustable Speed Drives (ASDs) to suppress low order harmonics of 0–2 kHz. Recently, the frequency range of 9–150 kHz has been noticed as a new disturbing frequency range, interfering with the distribution networks. Due to the novelty of this topic, so far, there has not been a thorough investigation for the effect of DC and AC choke configurations on 9–150 kHz emissions, especially for the three-phase ASDs. In this paper, the effect of DC and AC choke configurations on Common-Mode (CM) current emissions at the frequency range of 9–150 kHz is broadly surveyed in the three-phase ASDs. Subsequently, the comprehensive equivalent models of the system are presented for each configuration of DC and AC chokes. This investigation is based on the comparative analysis of the system's transfer functions according to the presented single-phase equivalent model, mathematical calculations, and the three-phase system circuit. Consequently, the presented approach is highly useful to minimize the drive system volume, as the designer can predict the choke configuration of the smallest size for suppressing 9–150 kHz emissions.
{"title":"Analysis of DC and AC Choke Effects on Common-Mode Noise Emissions in ASD at the Frequency Range of 9–150 kHz","authors":"Amir Ganjavi, H. Rathnayake, D. Kumar, Firuz Zare, A. Abbosh, P. Davari","doi":"10.1109/PEDES49360.2020.9379827","DOIUrl":"https://doi.org/10.1109/PEDES49360.2020.9379827","url":null,"abstract":"Magnetic chokes are conventionally utilized at the DC or AC side of the Adjustable Speed Drives (ASDs) to suppress low order harmonics of 0–2 kHz. Recently, the frequency range of 9–150 kHz has been noticed as a new disturbing frequency range, interfering with the distribution networks. Due to the novelty of this topic, so far, there has not been a thorough investigation for the effect of DC and AC choke configurations on 9–150 kHz emissions, especially for the three-phase ASDs. In this paper, the effect of DC and AC choke configurations on Common-Mode (CM) current emissions at the frequency range of 9–150 kHz is broadly surveyed in the three-phase ASDs. Subsequently, the comprehensive equivalent models of the system are presented for each configuration of DC and AC chokes. This investigation is based on the comparative analysis of the system's transfer functions according to the presented single-phase equivalent model, mathematical calculations, and the three-phase system circuit. Consequently, the presented approach is highly useful to minimize the drive system volume, as the designer can predict the choke configuration of the smallest size for suppressing 9–150 kHz emissions.","PeriodicalId":124226,"journal":{"name":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"212 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124162231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-12-16DOI: 10.1109/PEDES49360.2020.9379571
Gayatri Nayak, S. Nath
This paper presents the input voltage feedforward and feedback (IVFF) control for coupled inductor single-input dual-output (CI-SIDO) buck converter. In IVFF, the duty cycle is modulated directly using the input voltage and hence, improves the audio-susceptibility of CI-SIDO buck converter. The feedforward and feedback control is designed by developing the small-signal model (SSM) of CI-SIDO buck converter operating in continuous conduction mode (CCM). The SSM is developed considering the circuit parasitics. It is observed that with feed forward control, output voltage experience no overshoot for input voltage variation. The analysis is verified using the simulation results.
{"title":"Input Voltage Feedforward and Feedback Control of Coupled Inductor SIDO Buck Converter","authors":"Gayatri Nayak, S. Nath","doi":"10.1109/PEDES49360.2020.9379571","DOIUrl":"https://doi.org/10.1109/PEDES49360.2020.9379571","url":null,"abstract":"This paper presents the input voltage feedforward and feedback (IVFF) control for coupled inductor single-input dual-output (CI-SIDO) buck converter. In IVFF, the duty cycle is modulated directly using the input voltage and hence, improves the audio-susceptibility of CI-SIDO buck converter. The feedforward and feedback control is designed by developing the small-signal model (SSM) of CI-SIDO buck converter operating in continuous conduction mode (CCM). The SSM is developed considering the circuit parasitics. It is observed that with feed forward control, output voltage experience no overshoot for input voltage variation. The analysis is verified using the simulation results.","PeriodicalId":124226,"journal":{"name":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121942033","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-12-16DOI: 10.1109/PEDES49360.2020.9379458
S. Konar, S. Saha
This paper presents a new soft-switched flyback converter with an active clamp circuit, used to recover the leakage energy of the flyback transformer. The trapped leakage energy is further utilized for charging a clamping capacitor, connected in series with the input supply. Thus, overall voltage gain of the flyback converter is boosted up. All the semiconductor switches of this flyback converter are operated under soft-switching conditions and the semiconductor diodes are commutated softly. Performance of the proposed converter has been successfully verified through hardware experimentation of a laboratory prototype.
{"title":"Efficient Energy Recovery and Boosting the Voltage Gain of a Soft-Switched Flyback Converter","authors":"S. Konar, S. Saha","doi":"10.1109/PEDES49360.2020.9379458","DOIUrl":"https://doi.org/10.1109/PEDES49360.2020.9379458","url":null,"abstract":"This paper presents a new soft-switched flyback converter with an active clamp circuit, used to recover the leakage energy of the flyback transformer. The trapped leakage energy is further utilized for charging a clamping capacitor, connected in series with the input supply. Thus, overall voltage gain of the flyback converter is boosted up. All the semiconductor switches of this flyback converter are operated under soft-switching conditions and the semiconductor diodes are commutated softly. Performance of the proposed converter has been successfully verified through hardware experimentation of a laboratory prototype.","PeriodicalId":124226,"journal":{"name":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121610558","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-12-16DOI: 10.1109/PEDES49360.2020.9379452
C. A. Perianayagam, V. Krishnakumar, R. Dhanushvarma
The BLDC motor provokes the best option for emerging applications like electrical vehicles, surgical robots, artificial heart, equipment in industries. Remarkable characteristics feature like prominent dynamic behavior beyond the scope of the speed limit, astounding torque density, we shaped structure; enhanced efficiency predicts the BLDC motor to be competent for another two decades until the alternative arrives. However, the torque undulation and cogging torque become noticeable restrictions posed by this motor even numerous inherent positive receptions associated with it. To retain the torque distinctiveness, the furtherance of the finite element method (FEM) with appreciable geometrical modification has been accomplished by utilizing recent newfangled infolytica software. The notching (1mm) of stator tooth has been pertained for BLDC motor to outstretch the quality of torque, thereby the effects of vibration and acoustic noise have been curbed.
{"title":"Stator Notching Design of Permanent Magnet Brushless DC Motor to Mitigate the Cogging Torque","authors":"C. A. Perianayagam, V. Krishnakumar, R. Dhanushvarma","doi":"10.1109/PEDES49360.2020.9379452","DOIUrl":"https://doi.org/10.1109/PEDES49360.2020.9379452","url":null,"abstract":"The BLDC motor provokes the best option for emerging applications like electrical vehicles, surgical robots, artificial heart, equipment in industries. Remarkable characteristics feature like prominent dynamic behavior beyond the scope of the speed limit, astounding torque density, we shaped structure; enhanced efficiency predicts the BLDC motor to be competent for another two decades until the alternative arrives. However, the torque undulation and cogging torque become noticeable restrictions posed by this motor even numerous inherent positive receptions associated with it. To retain the torque distinctiveness, the furtherance of the finite element method (FEM) with appreciable geometrical modification has been accomplished by utilizing recent newfangled infolytica software. The notching (1mm) of stator tooth has been pertained for BLDC motor to outstretch the quality of torque, thereby the effects of vibration and acoustic noise have been curbed.","PeriodicalId":124226,"journal":{"name":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132195448","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-12-16DOI: 10.1109/PEDES49360.2020.9379564
Srinivasarao Kamala, Naga Brahmendra Yadav Gorla, S. K. Panda
The presence of regulated power converter in the three-phase microgrid system makes it vulnerable to interactions with the grid and causes instability. Because, the regulated converters exhibits negative impedance characteristics and acts like constant power loads (CPLs). To ensure the system stability, adaptive controller can be used in the system controller design. However, to design these adaptive controllers real-time grid impedance information is required and this is a challenging task. In this paper a Hall Binary Sequence (HBS) which is a class of pseudo random binary sequence (PRBS) is proposed for real-time impedance measurement. The HBS perturbation is computationally very effective compared to conventional multi-sine perturbation methods. Perturbation signals for impedance measurement should have low crest factor and less measurement time. The proposed HBS has low crest factor and the impedance can be measured within 3–5 perturbation cycles. To extract the impedance of the grid, the HBS is added to the inner loop currents (d-axis and q-axis) components of the energy storage system (ESS). Next, the Generalized Nyquist Stability Criteria (GNC) is applied to the return ratio matrix to check the system stability. The effectiveness of proposed impedance measurement algorithm using the HBS has been tested on three-phase microgrid system in MATLAB/Simulink environment. Simulations results are validated by conducting experiment on a 2kW laboratory test bed and results proved the robustness of the proposed impedance measurement algorithm.
{"title":"Small Signal Stability Analysis of Three-Phase Microgrid in the Presence of Energy Storage System","authors":"Srinivasarao Kamala, Naga Brahmendra Yadav Gorla, S. K. Panda","doi":"10.1109/PEDES49360.2020.9379564","DOIUrl":"https://doi.org/10.1109/PEDES49360.2020.9379564","url":null,"abstract":"The presence of regulated power converter in the three-phase microgrid system makes it vulnerable to interactions with the grid and causes instability. Because, the regulated converters exhibits negative impedance characteristics and acts like constant power loads (CPLs). To ensure the system stability, adaptive controller can be used in the system controller design. However, to design these adaptive controllers real-time grid impedance information is required and this is a challenging task. In this paper a Hall Binary Sequence (HBS) which is a class of pseudo random binary sequence (PRBS) is proposed for real-time impedance measurement. The HBS perturbation is computationally very effective compared to conventional multi-sine perturbation methods. Perturbation signals for impedance measurement should have low crest factor and less measurement time. The proposed HBS has low crest factor and the impedance can be measured within 3–5 perturbation cycles. To extract the impedance of the grid, the HBS is added to the inner loop currents (d-axis and q-axis) components of the energy storage system (ESS). Next, the Generalized Nyquist Stability Criteria (GNC) is applied to the return ratio matrix to check the system stability. The effectiveness of proposed impedance measurement algorithm using the HBS has been tested on three-phase microgrid system in MATLAB/Simulink environment. Simulations results are validated by conducting experiment on a 2kW laboratory test bed and results proved the robustness of the proposed impedance measurement algorithm.","PeriodicalId":124226,"journal":{"name":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"53 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132214299","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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