Pub Date : 2018-07-21DOI: 10.1007/978-4-431-56594-9_1
S. Asai
{"title":"Challenges and Opportunities in VLSI for Systems Dependability","authors":"S. Asai","doi":"10.1007/978-4-431-56594-9_1","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_1","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121114655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-21DOI: 10.1007/978-4-431-56594-9_28
D. Suzuki, Koichi Shimizu, T. Fujino
{"title":"An FPGA Implementation of Comprehensive Security Functions for Systems-Level Authentication","authors":"D. Suzuki, Koichi Shimizu, T. Fujino","doi":"10.1007/978-4-431-56594-9_28","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_28","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131080082","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-21DOI: 10.1007/978-4-431-56594-9_4
M. Nagata, N. Yamasaki, Yusuke Kumura, Shuma Hagiwara, M. Inaba
{"title":"Electromagnetic Noises","authors":"M. Nagata, N. Yamasaki, Yusuke Kumura, Shuma Hagiwara, M. Inaba","doi":"10.1007/978-4-431-56594-9_4","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_4","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124047548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-21DOI: 10.1007/978-4-431-56594-9_10
T. Fujino, D. Suzuki, Y. Hori, M. Shiozaki, M. Yoshikawa, T. Asai, Masayoshi Yoshimura
{"title":"Malicious Attacks on Electronic Systems and VLSIs for Security","authors":"T. Fujino, D. Suzuki, Y. Hori, M. Shiozaki, M. Yoshikawa, T. Asai, Masayoshi Yoshimura","doi":"10.1007/978-4-431-56594-9_10","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_10","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129425649","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-21DOI: 10.1007/978-4-431-56594-9_11
M. Fujita, K. Takayama, Takeshi Matsumoto, Kosuke Oshima, Satoshi Jo, M. Inoue, T. Yoneda, Yuta Yamato
{"title":"Test Coverage","authors":"M. Fujita, K. Takayama, Takeshi Matsumoto, Kosuke Oshima, Satoshi Jo, M. Inoue, T. Yoneda, Yuta Yamato","doi":"10.1007/978-4-431-56594-9_11","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_11","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121112289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-21DOI: 10.1007/978-4-431-56594-9_20
Kenji Kise
{"title":"An On-chip Router Architecture for Dependable Multicore Processor","authors":"Kenji Kise","doi":"10.1007/978-4-431-56594-9_20","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_20","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"62 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132477745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-21DOI: 10.1007/978-4-431-56594-9_26
M. Koyanagi, Hiroaki Kobayashi, T. Aoki, T. Sueyoshi, Tadashi Kamada
{"title":"A 3D-VLSI Architecture for Future Automotive Visual Recognition","authors":"M. Koyanagi, Hiroaki Kobayashi, T. Aoki, T. Sueyoshi, Tadashi Kamada","doi":"10.1007/978-4-431-56594-9_26","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_26","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133305906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-21DOI: 10.1007/978-4-431-56594-9_14
M. Fujita, Takeshi Matsumoto, A. M. Gharehbaghi, Kosuke Oshima, Satoshi Jo, Hiroaki Yoshida, Takashi Takenaka, K. Wakabayashi
{"title":"Formal Verification and Debugging of VLSI Logic Design for Systems Dependability: Experiments and Evaluation","authors":"M. Fujita, Takeshi Matsumoto, A. M. Gharehbaghi, Kosuke Oshima, Satoshi Jo, Hiroaki Yoshida, Takashi Takenaka, K. Wakabayashi","doi":"10.1007/978-4-431-56594-9_14","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_14","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129608542","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-21DOI: 10.1007/978-4-431-56594-9_22
H. Ishikuro
{"title":"Wireless Power Delivery Resilient Against Loading Variations","authors":"H. Ishikuro","doi":"10.1007/978-4-431-56594-9_22","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_22","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125036478","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-21DOI: 10.1007/978-4-431-56594-9_3
E. Ibe, S. Yoshimoto, M. Yoshimoto, H. Kawaguchi, Kazutoshi Kobayashi, J. Furuta, Y. Mitsuyama, M. Hashimoto, T. Onoye, H. Kanbara, H. Ochi, K. Wakabayashi, H. Onodera, M. Sugihara
{"title":"Radiation-Induced Soft Errors","authors":"E. Ibe, S. Yoshimoto, M. Yoshimoto, H. Kawaguchi, Kazutoshi Kobayashi, J. Furuta, Y. Mitsuyama, M. Hashimoto, T. Onoye, H. Kanbara, H. Ochi, K. Wakabayashi, H. Onodera, M. Sugihara","doi":"10.1007/978-4-431-56594-9_3","DOIUrl":"https://doi.org/10.1007/978-4-431-56594-9_3","url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134093617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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