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IEEE Transactions on Magnetics Institutional Listings 电气和电子工程师学会《磁学学报》机构列表
IF 2.1 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-04-24 DOI: 10.1109/TMAG.2025.3561647
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引用次数: 0
IEEE Transactions on Magnetics Publication Information IEEE电磁学学报出版信息
IF 2.1 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-04-24 DOI: 10.1109/TMAG.2025.3561645
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引用次数: 0
IEEE Magnetics Society Information IEEE磁学学会信息
IF 2.1 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-04-24 DOI: 10.1109/TMAG.2025.3561641
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引用次数: 0
TechRxiv: Share Your Preprint Research with the World! techxiv:与世界分享你的预印本研究!
IF 2.1 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-04-24 DOI: 10.1109/TMAG.2025.3564111
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引用次数: 0
A Novel In-Memory Reconfigurable Magnitude Comparator Using STT-MRAM 一种基于STT-MRAM的新型内存可重构幅度比较器
IF 2.1 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-28 DOI: 10.1109/TMAG.2025.3555892
Pranav R. Naik;Srija Alla;Vinod Kumar Joshi
Large-scale data applications often encounter substantial energy consumption due to frequent transfers between memory and processing units. In-memory computing (IMC) addresses this issue by executing operations directly in memory, reducing data movement and boosting both processing speed and energy efficiency. IMC which employs non-volatile devices and modified architecture provides an effective approach for creating high-performance computing systems while reducing resource requirements. We introduce a novel comparator that exemplifies the synergistic potential of these technologies in addressing power efficiency and performance challenges. This comparator is designed with a modified array architecture that employs spin-transfer torque magnetic random access memory (STT-MRAM) bit-cells and their associated peripherals are capable of performing a 1-bit comparison in a single read cycle, making it crucial for applications within the communication industry. This design demonstrates improved reconfigurability, memory cell efficiency, and computational cycles without significantly increasing other parameters compared to existing designs. This work also introduces several key innovations: 1) a modified decoder architecture that provides a unique method for activating word lines; 2) two distinct approaches for read termination are proposed, utilizing a serial-in-serial-out (SISO) register and a mod-counter for enhanced efficiency; and 3) furthermore, both 1-bit and 4-bit comparators have been implemented, with their functionalities validated through simulation tests. Additionally, this design approach can be extended to n-bit comparators, requiring $n+1$ computation cycles in the worst case scenario of input combinations while utilizing only four magnetic tunnel junction (MTJ) memory cells within the array. With minor adjustments to the peripheral circuitry, this methodology demonstrates impressive efficient performance.
由于内存和处理单元之间的频繁传输,大型数据应用程序经常遇到大量的能量消耗。内存计算(IMC)通过直接在内存中执行操作、减少数据移动并提高处理速度和能源效率来解决这个问题。IMC采用非易失性设备和改进的体系结构,为创建高性能计算系统提供了一种有效的方法,同时减少了资源需求。我们介绍了一种新的比较器,它体现了这些技术在解决功率效率和性能挑战方面的协同潜力。该比较器采用改进的阵列架构设计,采用自旋转移扭矩磁随机存取存储器(STT-MRAM)位单元及其相关外设能够在单个读取周期内执行1位比较,这对于通信行业的应用至关重要。与现有设计相比,该设计在不显著增加其他参数的情况下,改进了可重构性、存储单元效率和计算周期。这项工作还介绍了几个关键的创新:1)一个改进的解码器架构,提供了一种独特的方法来激活字线;2)提出了两种不同的读终止方法,利用串行输入串行输出(SISO)寄存器和模式计数器来提高效率;3)进一步实现了1位和4位比较器,并通过仿真测试验证了它们的功能。此外,这种设计方法可以扩展到n位比较器,在输入组合的最坏情况下需要$n+1$计算周期,而在阵列中仅使用四个磁隧道结(MTJ)存储单元。通过对外围电路的微小调整,这种方法展示了令人印象深刻的高效性能。
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引用次数: 0
TechRxiv: Share Your Preprint Research with the World! techxiv:与世界分享你的预印本研究!
IF 2.1 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-26 DOI: 10.1109/TMAG.2025.3552306
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引用次数: 0
Eddy Current Induced in a Finite-Length Tube by a C-Core Sensor in Arbitrary Axial Position 任意轴向位置的 C-Core 传感器在有限长度管中诱发的涡流
IF 2.1 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-26 DOI: 10.1109/TMAG.2025.3554762
Yike Xiang;Yao Luo;Zhiye Du;Grzegorz Tytko;Yuneng Wang;Zhichao Chen
The enhanced truncated region eigenfunction expansion (enhanced TREE) method is employed to derive an analytical model of a finite-length metal tube tested by a C-core coil in an arbitrary axial position. The vector potential and the coil impedance variation are calculated. To develop an efficient algorithm, the 1-D finite element method (1-D FEM), vector normalization, and Clenshaw-Curtis quadrature are integrated. To improve the computation performance of the complex eigenvalues with large imaginary parts, a coordinate transformation technique is implemented within the Arnoldi iteration. The efficacy of the proposed approach is validated by comparing the theoretical predictions with experimental results.
采用增强截断区特征函数展开(enhanced TREE)方法,推导了任意轴向位置c型铁心线圈测试的有限长度金属管的解析模型。计算了矢量电位和线圈阻抗的变化。为了开发一种有效的算法,将一维有限元法(1-D FEM)、矢量归一化和Clenshaw-Curtis正交相结合。为了提高具有大虚部的复特征值的计算性能,在Arnoldi迭代中实现了坐标变换技术。通过理论预测与实验结果的比较,验证了该方法的有效性。
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引用次数: 0
IEEE Magnetics Society Information IEEE磁学学会信息
IF 2.1 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-26 DOI: 10.1109/TMAG.2025.3550293
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引用次数: 0
IEEE Transactions on Magnetics Publication Information IEEE电磁学学报出版信息
IF 2.1 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-26 DOI: 10.1109/TMAG.2025.3550294
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引用次数: 0
IEEE Transactions on Magnetics Institutional Listings 《IEEE磁学汇刊》
IF 2.1 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-03-26 DOI: 10.1109/TMAG.2025.3550295
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引用次数: 0
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IEEE Transactions on Magnetics
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