Pub Date : 2020-06-01DOI: 10.23919/MIXDES49814.2020.9155813
G. Wegrzyn, R. Kleczek, P. Kmon
In this paper we present a comparative analysis of active feedback circuits dedicated to charge sensitive amplifiers (CSA) used in X-ray imaging systems. This work is motivated by the fact there are many papers discussing advantages and disadvantages of using particular CSA feedback but non of them are done in the same process which is very crucial. The presented design, prototype recording channels fabrication employing two the most competing solutions, and their further measurement results may therefore help one in choosing the most suitable feedback for a particular application. The presented circuits are designed in CMOS 40 nm process and are compared in terms of noise contribution, power consumption, area occupation, ability to minimize detectors leakage current, and also CSA stability.
{"title":"Active Feedbacks Comparative Analysis for Charge Sensitive Amplifiers Designed in CMOS 40 nm","authors":"G. Wegrzyn, R. Kleczek, P. Kmon","doi":"10.23919/MIXDES49814.2020.9155813","DOIUrl":"https://doi.org/10.23919/MIXDES49814.2020.9155813","url":null,"abstract":"In this paper we present a comparative analysis of active feedback circuits dedicated to charge sensitive amplifiers (CSA) used in X-ray imaging systems. This work is motivated by the fact there are many papers discussing advantages and disadvantages of using particular CSA feedback but non of them are done in the same process which is very crucial. The presented design, prototype recording channels fabrication employing two the most competing solutions, and their further measurement results may therefore help one in choosing the most suitable feedback for a particular application. The presented circuits are designed in CMOS 40 nm process and are compared in terms of noise contribution, power consumption, area occupation, ability to minimize detectors leakage current, and also CSA stability.","PeriodicalId":145224,"journal":{"name":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125461945","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.23919/MIXDES49814.2020.9155754
M. Zbiec, D. Obrebski
This paper describes multipoint wireless humidity and temperature measurement network designed for validation of HVAC systems performance. It consists of main data logger module and multiple measurement nodes connected via wireless link in 868 MHz ISM band. It characterizes temperature and humidity distribution within measured residential or commercial spaces.
{"title":"Multipoint Wireless Humidity and Temperature Monitoring Network for HVAC Systems Validation","authors":"M. Zbiec, D. Obrebski","doi":"10.23919/MIXDES49814.2020.9155754","DOIUrl":"https://doi.org/10.23919/MIXDES49814.2020.9155754","url":null,"abstract":"This paper describes multipoint wireless humidity and temperature measurement network designed for validation of HVAC systems performance. It consists of main data logger module and multiple measurement nodes connected via wireless link in 868 MHz ISM band. It characterizes temperature and humidity distribution within measured residential or commercial spaces.","PeriodicalId":145224,"journal":{"name":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130020042","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.23919/MIXDES49814.2020.9155790
Zbigniew Mudza
Intermediate virtual architecture overlays atop physical FPGA chips provide convenient abstraction level, which can increase productivity in FPGA-targeted application development. Individual reconfigurable modules of the overlay can be reprogrammed independently using partial reconfiguration. Homogeneous reconfigurable modules can be programmed using common configuration data, on condition that appropriate implementation constraints and proper floorplanning of the virtual architecture are provided. This paper presents methodology that can be used to generate relocatable bitstreams for Xilinx 7 series FPGA devices. The methodology is based on using constraints to force Xilinx Vivado Design Suite tools to implement multiple reconfigurable partition in the same way. Partial Reconfiguration Flow is used to implement multiple variants of individually reconfigurable partitions and Isolation Design Flow is used for feed-through prevention.
{"title":"Relocatable Partial Bitstreams For Virtual Overlay Architectures atop Field-Programmable Gate Arrays","authors":"Zbigniew Mudza","doi":"10.23919/MIXDES49814.2020.9155790","DOIUrl":"https://doi.org/10.23919/MIXDES49814.2020.9155790","url":null,"abstract":"Intermediate virtual architecture overlays atop physical FPGA chips provide convenient abstraction level, which can increase productivity in FPGA-targeted application development. Individual reconfigurable modules of the overlay can be reprogrammed independently using partial reconfiguration. Homogeneous reconfigurable modules can be programmed using common configuration data, on condition that appropriate implementation constraints and proper floorplanning of the virtual architecture are provided. This paper presents methodology that can be used to generate relocatable bitstreams for Xilinx 7 series FPGA devices. The methodology is based on using constraints to force Xilinx Vivado Design Suite tools to implement multiple reconfigurable partition in the same way. Partial Reconfiguration Flow is used to implement multiple variants of individually reconfigurable partitions and Isolation Design Flow is used for feed-through prevention.","PeriodicalId":145224,"journal":{"name":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130107129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.23919/MIXDES49814.2020.9155649
Chaymaa Haloui, G. Toulon, J. Tasselli, Y. Cordier, É. Frayssinet, K. Isoird, F. Morancho, M. Gavelle
A new normally-off AlGaN/GaN HEMT structure is proposed. The regrowth of a P-GaN layer on the AlGaN/GaN heterostructure after the gate recess allows the achievement of the enhancement mode. A shift in the threshold voltage to positive values has been proved through simulation results. A precise control of the etch depth for the gate recess is detailed.
{"title":"Recessed and P-GaN Regrowth Gate Development for Normally-off AlGaN/GaN HEMTs","authors":"Chaymaa Haloui, G. Toulon, J. Tasselli, Y. Cordier, É. Frayssinet, K. Isoird, F. Morancho, M. Gavelle","doi":"10.23919/MIXDES49814.2020.9155649","DOIUrl":"https://doi.org/10.23919/MIXDES49814.2020.9155649","url":null,"abstract":"A new normally-off AlGaN/GaN HEMT structure is proposed. The regrowth of a P-GaN layer on the AlGaN/GaN heterostructure after the gate recess allows the achievement of the enhancement mode. A shift in the threshold voltage to positive values has been proved through simulation results. A precise control of the etch depth for the gate recess is detailed.","PeriodicalId":145224,"journal":{"name":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125171563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.23919/MIXDES49814.2020.9155567
Paweł Pieńczuk, C. Kołaciński, A. Szymanski, P. Janus, K. Kucharski, D. Obrebski, M. Zbiec, M. Jakubowski
This paper describes the design of the 17-channel readout integrated circuit targeted to front-end operation for photodiodes array. Proposed system contains an analog frontend electronics digitally configured using built-in Serial Peripheral Interface. Each signal channel has been designed for one particular set of photodiodes. Chip was designed and fabricated utilizing CMOS 0.18 μm technology and occupies area of 4960 μm × 1525 μm. Total current consumption is expected to be less than 33 mW (with 3.3 V supply).
{"title":"Multichannel Programmable Readout IC for Photodiodes Array","authors":"Paweł Pieńczuk, C. Kołaciński, A. Szymanski, P. Janus, K. Kucharski, D. Obrebski, M. Zbiec, M. Jakubowski","doi":"10.23919/MIXDES49814.2020.9155567","DOIUrl":"https://doi.org/10.23919/MIXDES49814.2020.9155567","url":null,"abstract":"This paper describes the design of the 17-channel readout integrated circuit targeted to front-end operation for photodiodes array. Proposed system contains an analog frontend electronics digitally configured using built-in Serial Peripheral Interface. Each signal channel has been designed for one particular set of photodiodes. Chip was designed and fabricated utilizing CMOS 0.18 μm technology and occupies area of 4960 μm × 1525 μm. Total current consumption is expected to be less than 33 mW (with 3.3 V supply).","PeriodicalId":145224,"journal":{"name":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128173393","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.23919/MIXDES49814.2020.9155998
P. Marzec, A. Kos
The paper proposes an original solution enabling the navigation of a blind person in such buildings as shopping malls and offices as well as public and private institutions. A GPS system fitted with an infrared sensor in the form of a camera is used for navigation. The system detects the surrounding walls in buildings and enables a blind person to keep a safe distance from the walls while moving indoors. Navigational instructions and directions are transmitted to a blind person by means of vibration sensors placed on this person wrists.
{"title":"Indoor Precise Infrared Navigation","authors":"P. Marzec, A. Kos","doi":"10.23919/MIXDES49814.2020.9155998","DOIUrl":"https://doi.org/10.23919/MIXDES49814.2020.9155998","url":null,"abstract":"The paper proposes an original solution enabling the navigation of a blind person in such buildings as shopping malls and offices as well as public and private institutions. A GPS system fitted with an infrared sensor in the form of a camera is used for navigation. The system detects the surrounding walls in buildings and enables a blind person to keep a safe distance from the walls while moving indoors. Navigational instructions and directions are transmitted to a blind person by means of vibration sensors placed on this person wrists.","PeriodicalId":145224,"journal":{"name":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125779666","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.23919/MIXDES49814.2020.9155809
M. Brinson
The Qucs/QucsStudio and Qucs-S simulators share a common graphical user interface which has slowly evolved into an interactive platform for drawing circuit schematics, controlling simulation and displaying simulation output data and measured device/circuit parameters/properties. This interface acts as a window for accessing circuit simulation software and is in many ways similar to the “White-Boards” that are popular among scientists and engineers for recording ideas when “brainstorming” circuit design or analysis problems. This paper outlines the evolution of the Qucs device modeling and simulation “white-Board” from concept to working media over the fifteen year period that Qucs, QucsStudio and Qucs-S have been under development. The operation of a number of the “White-Board” features are introduced with a compact tunnel diode model and the simulation data obtained from tests using the QucsStudio and Qucs-S software packages.
{"title":"The Qucs/QucsStudio and Qucs-S Graphical User Interface: An Evolving “White-Board” for Compact Device Modeling and Circuit Simulation in the Current Era: Invited Paper","authors":"M. Brinson","doi":"10.23919/MIXDES49814.2020.9155809","DOIUrl":"https://doi.org/10.23919/MIXDES49814.2020.9155809","url":null,"abstract":"The Qucs/QucsStudio and Qucs-S simulators share a common graphical user interface which has slowly evolved into an interactive platform for drawing circuit schematics, controlling simulation and displaying simulation output data and measured device/circuit parameters/properties. This interface acts as a window for accessing circuit simulation software and is in many ways similar to the “White-Boards” that are popular among scientists and engineers for recording ideas when “brainstorming” circuit design or analysis problems. This paper outlines the evolution of the Qucs device modeling and simulation “white-Board” from concept to working media over the fifteen year period that Qucs, QucsStudio and Qucs-S have been under development. The operation of a number of the “White-Board” features are introduced with a compact tunnel diode model and the simulation data obtained from tests using the QucsStudio and Qucs-S software packages.","PeriodicalId":145224,"journal":{"name":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126747187","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.23919/MIXDES49814.2020.9155834
I. Sejc, R. Kappel
Time efficient and accurate design verification is a key procedure in an industrial environment. In order to achieve both, a behavioral modeling can be used instead of more complex SPICE model options. This, however, requires a significant model complexity. This paper proposes a PVT and Monte Carlo modeling methodology based on the generation of polynomial equations with Matlab environment. These expressions are then used to describe the model behavior of its outputs and inputs. The use of behavioral model significantly reduces simulation time and still provides relatively high degree of accuracy while considering the variation in temperature, supply voltage and process corner.
{"title":"A Process, Voltage and Temperature Dependent Modeling Methodology for Industrial Requirements","authors":"I. Sejc, R. Kappel","doi":"10.23919/MIXDES49814.2020.9155834","DOIUrl":"https://doi.org/10.23919/MIXDES49814.2020.9155834","url":null,"abstract":"Time efficient and accurate design verification is a key procedure in an industrial environment. In order to achieve both, a behavioral modeling can be used instead of more complex SPICE model options. This, however, requires a significant model complexity. This paper proposes a PVT and Monte Carlo modeling methodology based on the generation of polynomial equations with Matlab environment. These expressions are then used to describe the model behavior of its outputs and inputs. The use of behavioral model significantly reduces simulation time and still provides relatively high degree of accuracy while considering the variation in temperature, supply voltage and process corner.","PeriodicalId":145224,"journal":{"name":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"49 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116278337","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.23919/MIXDES49814.2020.9155801
K. Górecki, Przemysław Ptak, M. Janicki
The paper is devoted to measurements of thermal parameters of power LEDs. Two methods of measurements of transient thermal impedance and thermal resistance for the considered semiconductor devices as well as the measurement set-ups implementing these methods are described. The results of measurements of the parameters obtained using both set-ups for selected power LEDs are compared and discussed. Moreover, selected properties of software operating with both the considered measurement set-ups are also analysed.
{"title":"Comparison of Set-ups Dedicated to Measure Thermal Parameters of Power LEDs","authors":"K. Górecki, Przemysław Ptak, M. Janicki","doi":"10.23919/MIXDES49814.2020.9155801","DOIUrl":"https://doi.org/10.23919/MIXDES49814.2020.9155801","url":null,"abstract":"The paper is devoted to measurements of thermal parameters of power LEDs. Two methods of measurements of transient thermal impedance and thermal resistance for the considered semiconductor devices as well as the measurement set-ups implementing these methods are described. The results of measurements of the parameters obtained using both set-ups for selected power LEDs are compared and discussed. Moreover, selected properties of software operating with both the considered measurement set-ups are also analysed.","PeriodicalId":145224,"journal":{"name":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114986319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-06-01DOI: 10.23919/mixdes49814.2020.9155818
{"title":"Compact Modeling Support for Micro and Nanoelectronic System Development","authors":"","doi":"10.23919/mixdes49814.2020.9155818","DOIUrl":"https://doi.org/10.23919/mixdes49814.2020.9155818","url":null,"abstract":"","PeriodicalId":145224,"journal":{"name":"2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128497136","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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