Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378139
Jaison Jose, M. Chawla
OSGi is a specification for modular application development in Java. In a modular application development environment, an application is composed of many standalone modules (components). Most of these components are reusable and could be used off the shelf. In such an environment, the application efficiency is determined by the constituent components efficiency. So it is important to track the resource consumption of each component. This paper analyses already proposed solutions for monitoring component level resource consumption. The major drawback of the already existing solutions is that they are dependent on the OSGi implementations based on which they are developed. This paper explains the reason for dependency on OSGi implementation and proposes a solution to avoid implementation dependency.
{"title":"Extending OSGi bundle level resource monitoring for implementation portability","authors":"Jaison Jose, M. Chawla","doi":"10.1109/RISE.2017.8378139","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378139","url":null,"abstract":"OSGi is a specification for modular application development in Java. In a modular application development environment, an application is composed of many standalone modules (components). Most of these components are reusable and could be used off the shelf. In such an environment, the application efficiency is determined by the constituent components efficiency. So it is important to track the resource consumption of each component. This paper analyses already proposed solutions for monitoring component level resource consumption. The major drawback of the already existing solutions is that they are dependent on the OSGi implementations based on which they are developed. This paper explains the reason for dependency on OSGi implementation and proposes a solution to avoid implementation dependency.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131117528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378223
S. Khandare, Sushopti Gawade, V. Turkar
Agriculture in India is eminently prone to danger like natural calamities, droughts, floods, etc. It is very crucial to safeguard the farmers from natural disasters and to safeguard their credit eligibility for the next approaching season. For this objective, the GOI (Government of India) has introduced several agricultural schemes throughout the country for the benefit of the farmers. With the growing technology and internet services the information related to the different government agricultural schemes are now available on internet in the form of websites and mobile apps. But enormous population of farmers in our country are uneducated and do not know how to access or view the information given on the website or in the app due to the language barrier. Thousands of farmers in India are killing themselves on their devastated field. This is not just because the weather gods have been cruel; but it is also because the safety from such climatic hazard, in terms of crop insurance, has failed the farmer when he needed it the most. The suicides of farmers that are being reported across the country undoubtedly indicate that these government schemes have not found enough takers. This is not only because of the language barrier and illiteracy of the farmers; it is also because of the poor usability of the websites which provide different agricultural information including the information of government schemes. So, the motivation of this research is to provide the farmers of our country with easy to use website and mobile app for their benefit so that they can get all the information related to agricultural government schemes.
{"title":"Design and development of e-farm with S.C.H.E.M.E.","authors":"S. Khandare, Sushopti Gawade, V. Turkar","doi":"10.1109/RISE.2017.8378223","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378223","url":null,"abstract":"Agriculture in India is eminently prone to danger like natural calamities, droughts, floods, etc. It is very crucial to safeguard the farmers from natural disasters and to safeguard their credit eligibility for the next approaching season. For this objective, the GOI (Government of India) has introduced several agricultural schemes throughout the country for the benefit of the farmers. With the growing technology and internet services the information related to the different government agricultural schemes are now available on internet in the form of websites and mobile apps. But enormous population of farmers in our country are uneducated and do not know how to access or view the information given on the website or in the app due to the language barrier. Thousands of farmers in India are killing themselves on their devastated field. This is not just because the weather gods have been cruel; but it is also because the safety from such climatic hazard, in terms of crop insurance, has failed the farmer when he needed it the most. The suicides of farmers that are being reported across the country undoubtedly indicate that these government schemes have not found enough takers. This is not only because of the language barrier and illiteracy of the farmers; it is also because of the poor usability of the websites which provide different agricultural information including the information of government schemes. So, the motivation of this research is to provide the farmers of our country with easy to use website and mobile app for their benefit so that they can get all the information related to agricultural government schemes.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126843971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378147
Nidhi Soni, K. Kirar
The challenge to remove noise from original image still exists. Over the past two decades, different kinds of noise reduction techniques have been developed. This paper reviews the transform based denoising techniques and performs their comparative study. Here we put results of different approaches including general ridgelets and curvelets, Empirical Mode Decomposition and Empirical ridgelets and curvelets. A quantitative measure of comparisons is presented in terms of PSNR.
{"title":"Transform based image denoising: A review","authors":"Nidhi Soni, K. Kirar","doi":"10.1109/RISE.2017.8378147","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378147","url":null,"abstract":"The challenge to remove noise from original image still exists. Over the past two decades, different kinds of noise reduction techniques have been developed. This paper reviews the transform based denoising techniques and performs their comparative study. Here we put results of different approaches including general ridgelets and curvelets, Empirical Mode Decomposition and Empirical ridgelets and curvelets. A quantitative measure of comparisons is presented in terms of PSNR.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114710742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378184
V. Rathore, M. Rathore
ZnO has received much attention over the past few years because it has a wide range of properties that depend on doping, including a range of conductivity from metallic to insulating, high transparency, piezoelectricity, chemical-sensing effects, room-temperature ferromagnetism, and huge magneto-optic and wide-bandgap semiconductivity. Its nano-form have been widely accepted as a source of functional material for various applications including optoelectronics and photonics. In the present work Cu doped ZnO thin films are prepared by Chemical Vapour Deposition (CVD) method. Structural and surface morphology are characterized by x-ray diffraction (XRD) and atomic force microscopy (AFM) techniques. A decrease in grain size is observed when Cu is incorporated in the films of ZnO and an interesting aspect of Cu substitution is that it enhances the activation energy in the semiconducting films. Positron Annihilation Spectroscopy (PAS) characterization was performed on the samples to study defects in the nanostructured thin films. Positron annihilation spectroscopy indicated that the doping process has an important influence on the zinc-related vacancies and their clusters in the ZnO particles.
{"title":"Nanoelectronics and positron diffusion study of Zn1−xCuxO thin films","authors":"V. Rathore, M. Rathore","doi":"10.1109/RISE.2017.8378184","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378184","url":null,"abstract":"ZnO has received much attention over the past few years because it has a wide range of properties that depend on doping, including a range of conductivity from metallic to insulating, high transparency, piezoelectricity, chemical-sensing effects, room-temperature ferromagnetism, and huge magneto-optic and wide-bandgap semiconductivity. Its nano-form have been widely accepted as a source of functional material for various applications including optoelectronics and photonics. In the present work Cu doped ZnO thin films are prepared by Chemical Vapour Deposition (CVD) method. Structural and surface morphology are characterized by x-ray diffraction (XRD) and atomic force microscopy (AFM) techniques. A decrease in grain size is observed when Cu is incorporated in the films of ZnO and an interesting aspect of Cu substitution is that it enhances the activation energy in the semiconducting films. Positron Annihilation Spectroscopy (PAS) characterization was performed on the samples to study defects in the nanostructured thin films. Positron annihilation spectroscopy indicated that the doping process has an important influence on the zinc-related vacancies and their clusters in the ZnO particles.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"194 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124337875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378136
Asma Mushtaq, M. Patterh
To overcome Quality of Services (QoS) limitations in IP networks, Multiprotocol Label Switching (MPLS) is being considered as one of the appropriate solutions. In this paper an attempt has been made to make use of MPLS with Traffic Engineering (TE) to overcome these limitations by distributing and rerouting the traffic through underutilized paths that may not be shortest to overcome congestion and improve QoS parameters. Differentiated Services (Diffserv) has been used as QoS implementation mechanism. Comparison of delay, jitter, packet loss and throughput as QoS parameters has been done using IPv4 and IPv6. It has been seen that using IPv6 there is an improvement in QoS performance of the said applications with a substantial impact on video conferencing application over IPv6.
{"title":"QOS parameter comparison of DiffServ-aware MPLS network using IPv4 and IPv6","authors":"Asma Mushtaq, M. Patterh","doi":"10.1109/RISE.2017.8378136","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378136","url":null,"abstract":"To overcome Quality of Services (QoS) limitations in IP networks, Multiprotocol Label Switching (MPLS) is being considered as one of the appropriate solutions. In this paper an attempt has been made to make use of MPLS with Traffic Engineering (TE) to overcome these limitations by distributing and rerouting the traffic through underutilized paths that may not be shortest to overcome congestion and improve QoS parameters. Differentiated Services (Diffserv) has been used as QoS implementation mechanism. Comparison of delay, jitter, packet loss and throughput as QoS parameters has been done using IPv4 and IPv6. It has been seen that using IPv6 there is an improvement in QoS performance of the said applications with a substantial impact on video conferencing application over IPv6.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115066731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378210
Rohit Shere, S. Srivastava, R. K. Pateriya
With technology advancement adoption of service oriented architecture is gaining momentum, Identity Management) is an authentication and authorization service provided for secure storage and information access. It is used to manage data security and confidentiality which is beneficial to both client side and provider side. Some of the authentication techniques like OpenStack Keystone have the drawback of data violation, inappropriate access and use of centralized service architecture makes it vulnerable to single point of failure. For providing better data security, authentication and authorization to end users' Federated Identity Management is systematic, adoptable and well-structured approach which can be applied to the cloud for its enhancement. This paper describes the different implementation of the protocol independent federated identity management (FIM) system components on cloud. Comparison chart covering merit and demerit of the different independent approaches are also covered in this paper.
{"title":"A review of federated identity management of OpenStack cloud","authors":"Rohit Shere, S. Srivastava, R. K. Pateriya","doi":"10.1109/RISE.2017.8378210","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378210","url":null,"abstract":"With technology advancement adoption of service oriented architecture is gaining momentum, Identity Management) is an authentication and authorization service provided for secure storage and information access. It is used to manage data security and confidentiality which is beneficial to both client side and provider side. Some of the authentication techniques like OpenStack Keystone have the drawback of data violation, inappropriate access and use of centralized service architecture makes it vulnerable to single point of failure. For providing better data security, authentication and authorization to end users' Federated Identity Management is systematic, adoptable and well-structured approach which can be applied to the cloud for its enhancement. This paper describes the different implementation of the protocol independent federated identity management (FIM) system components on cloud. Comparison chart covering merit and demerit of the different independent approaches are also covered in this paper.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123573276","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378203
A. Yadav, Bhavana P. Shrivatava, Ajay Kumar Dadoriya
One bit full adder cell is one of the most frequently used digital circuit component in arithmetic logic unit (ALU) and it is the essential functional unit of all computational circuit. Till now lots of improvement has been done in this area to refine the architecture and performance of full adder circuit design. In this paper two designs of novel 1-bit full adder cell at 45nm CMOS technology is implemented by using ten transistors (10-T) along with the three existing 1-bit full adder cell. Later the complete comparison and verification is performed with the different existing and proposed adder cells on different supply voltages at 100MHz operating frequency. From the simulation results by performing the comparison among proposed adder cells and existing adder cells it is found that the proposed adder cells are better than the existing adder cells in terms of power consumption, delay and power delay product (PDP). From the simulation result it is observed that the first proposed adder circuit using XOR module has achieved maximum saving of power 91.65%, saving of delay 59.37% and saving of overall PDP of 91.64% when compared to existing Static Energy Recovery Full (SERF) full adder and Gate Diffusion Input (GDI) full adder circuit respectively. When second proposed adder circuit using XOR module is compared with existing SERF and GDI adder circuit maximum saving of power 93.04%, saving of delay 76.76% and saving of overall PDP of 96.01% is achieved. All above statistical analysis is given by performing the comparison between existing and proposed adder circuits which have same number of transistors count (10-T) in designing at supply voltage 1 volt.
{"title":"Low power high speed 1-bit full adder circuit design at 45nm CMOS technology","authors":"A. Yadav, Bhavana P. Shrivatava, Ajay Kumar Dadoriya","doi":"10.1109/RISE.2017.8378203","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378203","url":null,"abstract":"One bit full adder cell is one of the most frequently used digital circuit component in arithmetic logic unit (ALU) and it is the essential functional unit of all computational circuit. Till now lots of improvement has been done in this area to refine the architecture and performance of full adder circuit design. In this paper two designs of novel 1-bit full adder cell at 45nm CMOS technology is implemented by using ten transistors (10-T) along with the three existing 1-bit full adder cell. Later the complete comparison and verification is performed with the different existing and proposed adder cells on different supply voltages at 100MHz operating frequency. From the simulation results by performing the comparison among proposed adder cells and existing adder cells it is found that the proposed adder cells are better than the existing adder cells in terms of power consumption, delay and power delay product (PDP). From the simulation result it is observed that the first proposed adder circuit using XOR module has achieved maximum saving of power 91.65%, saving of delay 59.37% and saving of overall PDP of 91.64% when compared to existing Static Energy Recovery Full (SERF) full adder and Gate Diffusion Input (GDI) full adder circuit respectively. When second proposed adder circuit using XOR module is compared with existing SERF and GDI adder circuit maximum saving of power 93.04%, saving of delay 76.76% and saving of overall PDP of 96.01% is achieved. All above statistical analysis is given by performing the comparison between existing and proposed adder circuits which have same number of transistors count (10-T) in designing at supply voltage 1 volt.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127738158","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378206
Nandini Shrivastava, R. Khatri
A differential input differential output low noise amplifier is proposed here. The designing is done using UMC 180nm CMOS RF process. The low noise amplifier (LNA) circuit operates at 2.4-GHz frequency. This paper presents the LNA with inductive degenerated topology using cascoded CMOS architecture in order to provide the improved gain, linearity and better isolation. It provides a better stability. The simulation and analysis is performed using Cadence Virtuoso IC tool. This design exhibits a gain of 12.68 dB, input return loss (S11) of −13.5 dB, reverse isolation (S12) of −33.85 dB and S22 equals to −10 dB. It produces a Noise Figure of 3.14 dB. The circuit operates at supply voltage of 1.8V.
{"title":"Design of a 2.4-GHz differential low noise amplifier using 180nm technology","authors":"Nandini Shrivastava, R. Khatri","doi":"10.1109/RISE.2017.8378206","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378206","url":null,"abstract":"A differential input differential output low noise amplifier is proposed here. The designing is done using UMC 180nm CMOS RF process. The low noise amplifier (LNA) circuit operates at 2.4-GHz frequency. This paper presents the LNA with inductive degenerated topology using cascoded CMOS architecture in order to provide the improved gain, linearity and better isolation. It provides a better stability. The simulation and analysis is performed using Cadence Virtuoso IC tool. This design exhibits a gain of 12.68 dB, input return loss (S11) of −13.5 dB, reverse isolation (S12) of −33.85 dB and S22 equals to −10 dB. It produces a Noise Figure of 3.14 dB. The circuit operates at supply voltage of 1.8V.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116349486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378166
Avinash Ray, A. Potnis, Prashant Dwivedy, Shahbaz Soofi, Uday Bhade
In present scenario whole world is moving towards digital communication for fast and better communication. But in this a problem arises with security i.e. when we have to transmit information (either data or image) over internet or to store information at any random location then its security is very important. To protect our information from hackers we use a technique i.e. Encryption. In this paper we use image as information and use different types of encryption techniques to encrypt it and protect it from hackers. After that we find various parameters from each image encryption technique and then compare each technique's parameters from one another. After that we search for the best result and then proceed forward with that technique for future scope.
{"title":"Comparative study of AES, RSA, genetic, affine transform with XOR operation, and watermarking for image encryption","authors":"Avinash Ray, A. Potnis, Prashant Dwivedy, Shahbaz Soofi, Uday Bhade","doi":"10.1109/RISE.2017.8378166","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378166","url":null,"abstract":"In present scenario whole world is moving towards digital communication for fast and better communication. But in this a problem arises with security i.e. when we have to transmit information (either data or image) over internet or to store information at any random location then its security is very important. To protect our information from hackers we use a technique i.e. Encryption. In this paper we use image as information and use different types of encryption techniques to encrypt it and protect it from hackers. After that we find various parameters from each image encryption technique and then compare each technique's parameters from one another. After that we search for the best result and then proceed forward with that technique for future scope.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122045198","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378211
Nagesh Salimath, Jitendra Sheetlani
This paper refers to secure the cloud in the scenario of overflow problem of a network coding storage system. From the analysis and experiments, it shows the impacts of overflow problem in a network coding scheme, which is not only waste storage, but also degrade the coding efficiency. To avoid this overflow problem, we developed the method to reduce the overflow problem and degrading coding efficiency this development is make use of Network Coding based Secure Storage (NCSS) scheme. The NCSS is able to improve the performance of a cloud storage cost and coding execution time.
{"title":"A generalized method for securing the cloud","authors":"Nagesh Salimath, Jitendra Sheetlani","doi":"10.1109/RISE.2017.8378211","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378211","url":null,"abstract":"This paper refers to secure the cloud in the scenario of overflow problem of a network coding storage system. From the analysis and experiments, it shows the impacts of overflow problem in a network coding scheme, which is not only waste storage, but also degrade the coding efficiency. To avoid this overflow problem, we developed the method to reduce the overflow problem and degrading coding efficiency this development is make use of Network Coding based Secure Storage (NCSS) scheme. The NCSS is able to improve the performance of a cloud storage cost and coding execution time.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127449513","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}