Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378204
Shraphalya B. Nalawade, Dhanashri H. Gawali
Security is an important issue during communication and data transmission. There are many ways to provide security. One method to ensure security is the use of cryptographic algorithms such as DES, AES, RC5, Blowfish etc. Cryptography is a method used for encoding the data which may be hacked by the unauthorized person. In this paper FPGA based design and implementation of Blowfish algorithm has been proposed. For RTL coding VHDL has been used and Virtex-5XC5VLX50T FPGA device used as a reconfigurable platform for implementation of Blowfish algorithm. The aim of this system is to evaluate performance of Blowfish algorithm on reconfigurable platform in terms of power consumption and throughput. For testing purpose image data and ECG data has been used as plaintext.
{"title":"Design and implementation of blowfish algorithm using reconfigurable platform","authors":"Shraphalya B. Nalawade, Dhanashri H. Gawali","doi":"10.1109/RISE.2017.8378204","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378204","url":null,"abstract":"Security is an important issue during communication and data transmission. There are many ways to provide security. One method to ensure security is the use of cryptographic algorithms such as DES, AES, RC5, Blowfish etc. Cryptography is a method used for encoding the data which may be hacked by the unauthorized person. In this paper FPGA based design and implementation of Blowfish algorithm has been proposed. For RTL coding VHDL has been used and Virtex-5XC5VLX50T FPGA device used as a reconfigurable platform for implementation of Blowfish algorithm. The aim of this system is to evaluate performance of Blowfish algorithm on reconfigurable platform in terms of power consumption and throughput. For testing purpose image data and ECG data has been used as plaintext.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133280556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378127
D. Punniamoorthy, G. K. Reddy, Vikram S. Kamadal, G. Gopal, K. Poornachary
Antennas with circularly polarization are largely used in present wireless communication systems because of their opposition to multipath distortion and polarization losses. On the other side, omnidirectional radiation patterns are mainly used since they can provide wide signal coverage and stabilize the signal transmission. As a result number of omnidirectional circularly polarized antennas have been designed and investigated over the past few years. The antenna design consist of modified ground plane connects to circular patch having two monopole modes by a set of conductive pins, to produce high impedance matching. The curved branches are designed at circumference of circular ground plane for producing a degenerate mode and producing circular polarization. The antenna prototype should be fabricated which is operating at 2.4GHz-WLAN band and measured radiation pattern, reflection coefficient, VSWR and antenna gain should well match with simulation results. In this paper simulation is done by using arlonAD320A in place of RogersRT/duroid 5880 because the cost of Rogers material is compare to arlon. But losses in arlon material are more, and these losses are reducing by decreasing number of shorting (or) conductive pins and increase the shorting pins radius. The prototype as a low profile 0.024 A a return loss value −30dB and gain of antenna is 4.68dB. To further characterize the design concept, and the antenna simulation is carried out using high frequency simulation software.
{"title":"Design of patch antenna with omni directional radiation pattern for wireless LAN applications","authors":"D. Punniamoorthy, G. K. Reddy, Vikram S. Kamadal, G. Gopal, K. Poornachary","doi":"10.1109/RISE.2017.8378127","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378127","url":null,"abstract":"Antennas with circularly polarization are largely used in present wireless communication systems because of their opposition to multipath distortion and polarization losses. On the other side, omnidirectional radiation patterns are mainly used since they can provide wide signal coverage and stabilize the signal transmission. As a result number of omnidirectional circularly polarized antennas have been designed and investigated over the past few years. The antenna design consist of modified ground plane connects to circular patch having two monopole modes by a set of conductive pins, to produce high impedance matching. The curved branches are designed at circumference of circular ground plane for producing a degenerate mode and producing circular polarization. The antenna prototype should be fabricated which is operating at 2.4GHz-WLAN band and measured radiation pattern, reflection coefficient, VSWR and antenna gain should well match with simulation results. In this paper simulation is done by using arlonAD320A in place of RogersRT/duroid 5880 because the cost of Rogers material is compare to arlon. But losses in arlon material are more, and these losses are reducing by decreasing number of shorting (or) conductive pins and increase the shorting pins radius. The prototype as a low profile 0.024 A a return loss value −30dB and gain of antenna is 4.68dB. To further characterize the design concept, and the antenna simulation is carried out using high frequency simulation software.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134359698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378169
Sneha Agrawal, R. Chaurasiya
Automatic traffic sign detection and recognition (TSDR) is one of the most significant areas of object detection. In spite of numerous researches, it has always been a challenging problem. In this paper, an approach for detecting circular and triangular traffic signs is proposed. The performance of the entire system is measured on German traffic sign detection benchmark (GTSDB) and German traffic sign recognition benchmark (GTSRB) dataset. Traffic signs are detected using color segmentation and thresholding method in Hue Saturation Intensity (HSI) color space. Then, the shape of traffic signs is detected using geometric invariant Hu moments. Further, the features are extracted using a technique called HSI-HOG descriptor where features are extracted from each channel of HSI independently. To select the most discriminant features with minimal loss of information, dimensionality reduction technique Principal Component Analysis (PCA) is applied and classification is performed using Support Vector Machine (SVM) technique.
{"title":"Automatic traffic sign detection and recognition using moment invariants and support vector machine","authors":"Sneha Agrawal, R. Chaurasiya","doi":"10.1109/RISE.2017.8378169","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378169","url":null,"abstract":"Automatic traffic sign detection and recognition (TSDR) is one of the most significant areas of object detection. In spite of numerous researches, it has always been a challenging problem. In this paper, an approach for detecting circular and triangular traffic signs is proposed. The performance of the entire system is measured on German traffic sign detection benchmark (GTSDB) and German traffic sign recognition benchmark (GTSRB) dataset. Traffic signs are detected using color segmentation and thresholding method in Hue Saturation Intensity (HSI) color space. Then, the shape of traffic signs is detected using geometric invariant Hu moments. Further, the features are extracted using a technique called HSI-HOG descriptor where features are extracted from each channel of HSI independently. To select the most discriminant features with minimal loss of information, dimensionality reduction technique Principal Component Analysis (PCA) is applied and classification is performed using Support Vector Machine (SVM) technique.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115202773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378141
R. Sinhal, Kavita Singh, A. Shankar
The human body exhibits many vital signs, such as heart rate (HR) and respiratory rate (RR) used to assess fitness and health. Vital signs are typically measured by a trained health professional and may be difficult for individuals to accurately measure at home. Clinic visits are therefore needed with associated burdens of cost and time spent waiting in long queues. The widespread use of smart phones with video capability presents an opportunity to create non-invasive applications for assessment of vital signs. Over the past decade, several researchers have worked on assessing vital signs from video, including HR, RR and other parameters such as anemia and blood oxygen saturation (SpO2). This paper reviews the different image and video processing algorithms developed for vital signs assessment through non-contact methods, and outline the key remaining challenges in the field which can be used as potential research topics. The CHROM algorithm produces highest accuracy in detecting the signals from rPPG. There are different challenges of handling large database and motion stabilization which is not provided by any algorithm, this is main area of research in rPPG.
{"title":"Estimating vital signs through non-contact video-based approaches: A survey","authors":"R. Sinhal, Kavita Singh, A. Shankar","doi":"10.1109/RISE.2017.8378141","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378141","url":null,"abstract":"The human body exhibits many vital signs, such as heart rate (HR) and respiratory rate (RR) used to assess fitness and health. Vital signs are typically measured by a trained health professional and may be difficult for individuals to accurately measure at home. Clinic visits are therefore needed with associated burdens of cost and time spent waiting in long queues. The widespread use of smart phones with video capability presents an opportunity to create non-invasive applications for assessment of vital signs. Over the past decade, several researchers have worked on assessing vital signs from video, including HR, RR and other parameters such as anemia and blood oxygen saturation (SpO2). This paper reviews the different image and video processing algorithms developed for vital signs assessment through non-contact methods, and outline the key remaining challenges in the field which can be used as potential research topics. The CHROM algorithm produces highest accuracy in detecting the signals from rPPG. There are different challenges of handling large database and motion stabilization which is not provided by any algorithm, this is main area of research in rPPG.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114134427","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378189
Bharti Moryani, D. Mishra
As technology progresses, the growing demands of long life batteries in battery operated devices have set ways for new ideas that reduce the power consumed in these devices. As we know that during testing when the device's normal functioning mode is off, the dissipation of power is approximately 200% more than that of normal functioning mode. So a method is proposed to minimize the concerned power at testing mode itself in the very beginning. This paper proposes a new design of “Test Pattern generator” for testing the circuits. The author has proposed a design which is quite different from the LFSR used till now. The test pattern generator proposed here has involved the use of a gray code generator together with a modified clock scheme. The circuit as a whole will generate exhaustive set of test patterns with hamming distance of one in between two consecutive sets. The idea behind this logic is to minimize dynamic power consumption which occurs because of increase in switching activity of the transistors at gate level. The modified clock will activate the clock only for that flip-flop where the logic changes from 0 to 1 or from 1 to 0. The power obtained using this design is about 36 mw.
{"title":"Low power test pattern generator with modified clock for BIST","authors":"Bharti Moryani, D. Mishra","doi":"10.1109/RISE.2017.8378189","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378189","url":null,"abstract":"As technology progresses, the growing demands of long life batteries in battery operated devices have set ways for new ideas that reduce the power consumed in these devices. As we know that during testing when the device's normal functioning mode is off, the dissipation of power is approximately 200% more than that of normal functioning mode. So a method is proposed to minimize the concerned power at testing mode itself in the very beginning. This paper proposes a new design of “Test Pattern generator” for testing the circuits. The author has proposed a design which is quite different from the LFSR used till now. The test pattern generator proposed here has involved the use of a gray code generator together with a modified clock scheme. The circuit as a whole will generate exhaustive set of test patterns with hamming distance of one in between two consecutive sets. The idea behind this logic is to minimize dynamic power consumption which occurs because of increase in switching activity of the transistors at gate level. The modified clock will activate the clock only for that flip-flop where the logic changes from 0 to 1 or from 1 to 0. The power obtained using this design is about 36 mw.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115907719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378196
Deepak N. Agarwal, Y. K. Singh
This work presents a current reused low power 2.45 GHz LC oscillator. The paper provides a cross coupled LC oscillator used with NMOS resistor and the current reuse topology where two series transistors as staked switches and MOS resistor for symmetric output are used. This oscillator is designed with 0.5-μm CMOS process in ADS. Two topologies of LC oscillator are designed. The topology 2/1 draws only 117.9/68 μA current at 2/2.5 V DC supply, resulting in the oscillator consuming a very low power (0.2358 /0.17mW). The phase noise of proposed oscillator is −139 dBc/Hz at an offset 1 MHz. In order to eliminate mismatch in the output, an NMOS is used in triode region with 0.8235V gate voltage as a voltage drop provider.
{"title":"Low power, low phase noise current reuse 2.45 GHz LC oscillator with MOS resistor","authors":"Deepak N. Agarwal, Y. K. Singh","doi":"10.1109/RISE.2017.8378196","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378196","url":null,"abstract":"This work presents a current reused low power 2.45 GHz LC oscillator. The paper provides a cross coupled LC oscillator used with NMOS resistor and the current reuse topology where two series transistors as staked switches and MOS resistor for symmetric output are used. This oscillator is designed with 0.5-μm CMOS process in ADS. Two topologies of LC oscillator are designed. The topology 2/1 draws only 117.9/68 μA current at 2/2.5 V DC supply, resulting in the oscillator consuming a very low power (0.2358 /0.17mW). The phase noise of proposed oscillator is −139 dBc/Hz at an offset 1 MHz. In order to eliminate mismatch in the output, an NMOS is used in triode region with 0.8235V gate voltage as a voltage drop provider.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"156 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116228544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378202
Trapti Sharma, Laxmi Kumre
This work presents the contemplate review of diverse approaches employed to design XOR/XNOR circuits, as these circuits are the nucleus circuit for numerous computational intensive arithmetic circuits in VLSI. This paper describes the comparative analysis of performance evaluation of various reported XOR and XNOR circuits designs. The different designs are compared by performing the transistor level simulations on the benchmark circuit using HSPICE on 90nm PTM CMOS technology and analyzing the results in comprehensive manner. Based on the intensive simulations, the XOR/XNOR designs with feedback transistors outperforms well in comparison to other previously existing circuits in terms of high speed, low power and output voltage without any logic degradation with high noise tolerance capability.
{"title":"A comparative performance analysis of CMOS XOR XNOR circuits","authors":"Trapti Sharma, Laxmi Kumre","doi":"10.1109/RISE.2017.8378202","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378202","url":null,"abstract":"This work presents the contemplate review of diverse approaches employed to design XOR/XNOR circuits, as these circuits are the nucleus circuit for numerous computational intensive arithmetic circuits in VLSI. This paper describes the comparative analysis of performance evaluation of various reported XOR and XNOR circuits designs. The different designs are compared by performing the transistor level simulations on the benchmark circuit using HSPICE on 90nm PTM CMOS technology and analyzing the results in comprehensive manner. Based on the intensive simulations, the XOR/XNOR designs with feedback transistors outperforms well in comparison to other previously existing circuits in terms of high speed, low power and output voltage without any logic degradation with high noise tolerance capability.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125398788","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378216
A. Saxena, S. Sinha, P. Shukla
Mobile ad hoc networks (MANET) is the most useful network in present and it is used in many application. In the MANET prevention concept is not sufficient from the security point of view, so the detection concept is added. Intrusion Detection System (IDS) is another concept to provide security in the network. Basically IDS is used to identify selfish and malevolent node in the network. Generally IDS concept is used in wired networks but incase of wireless network then it can no longer sufficient if we used it directly. Here we present the concept of MANET, IDS and we have discussed various existing IDS in MANET environment along with their pros and cons.
{"title":"A review on intrusion detection system in mobile ad-hoc network","authors":"A. Saxena, S. Sinha, P. Shukla","doi":"10.1109/RISE.2017.8378216","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378216","url":null,"abstract":"Mobile ad hoc networks (MANET) is the most useful network in present and it is used in many application. In the MANET prevention concept is not sufficient from the security point of view, so the detection concept is added. Intrusion Detection System (IDS) is another concept to provide security in the network. Basically IDS is used to identify selfish and malevolent node in the network. Generally IDS concept is used in wired networks but incase of wireless network then it can no longer sufficient if we used it directly. Here we present the concept of MANET, IDS and we have discussed various existing IDS in MANET environment along with their pros and cons.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125829285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378153
A. Deshpande, M. Subashini
As far as the safety of a driver is concerned, more focus should be put on correct interpretation and information which is conveyed by a traffic sign, while driving a vehicle along the road. A sign board can be thought of as an emblem which disseminates important and meaningful information regarding the potential hazards prevailing among road users comprising roadways cladded with snowfall, construction worksites or repairing of roads taking place and telling the people to follow an alternative route. It alerts the person who is passing through the road about the maximum possible extremity that his vehicle is trying to achieve indicating slowing down the speed of vehicle since chances of having collision cannot be ruled out. With constant increasing of the training database size, not only there cognition accuracy, but also the computation complexity should be considered in designing a feasible recognition approach. The traffic sign images were acquired from the image database and were subjected to some pre-processing techniques such as conversion of the original RGB images into HSV Color Space, Adjustment of the Contrast of the Color images as well as applying the Histogram of Oriented Gradients (HOG) algorithm in which the process of extraction and plotting of the HOG features from a given image is performed that is most popular amongst the feature extraction algorithms. In the future, we will concentrate on detecting, recognizing as well as classifying a particular sign board.
{"title":"A novel method for the extraction of primary visual features from an image through intelligent feature descriptors","authors":"A. Deshpande, M. Subashini","doi":"10.1109/RISE.2017.8378153","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378153","url":null,"abstract":"As far as the safety of a driver is concerned, more focus should be put on correct interpretation and information which is conveyed by a traffic sign, while driving a vehicle along the road. A sign board can be thought of as an emblem which disseminates important and meaningful information regarding the potential hazards prevailing among road users comprising roadways cladded with snowfall, construction worksites or repairing of roads taking place and telling the people to follow an alternative route. It alerts the person who is passing through the road about the maximum possible extremity that his vehicle is trying to achieve indicating slowing down the speed of vehicle since chances of having collision cannot be ruled out. With constant increasing of the training database size, not only there cognition accuracy, but also the computation complexity should be considered in designing a feasible recognition approach. The traffic sign images were acquired from the image database and were subjected to some pre-processing techniques such as conversion of the original RGB images into HSV Color Space, Adjustment of the Contrast of the Color images as well as applying the Histogram of Oriented Gradients (HOG) algorithm in which the process of extraction and plotting of the HOG features from a given image is performed that is most popular amongst the feature extraction algorithms. In the future, we will concentrate on detecting, recognizing as well as classifying a particular sign board.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128940687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/RISE.2017.8378124
Sanya Anees, M. Bhatnagar, Parasa Ram
In this work, we analyze the performance of decode-and-forward (DF) based triple-hop radio frequency-free space optical-radio frequency (RF-FSO-RF) communication system. The mixed RF-FSO-RF system derive application, where the FSO link can be used to provide high speed connectivity between the two RF networks. The RF links are characterized by Nakagami-m fading and the FSO link is characterized by path loss, Gamma-Gamma distributed turbulence and pointing errors. For this asymmetric triple hop communication system, new closed form mathematical expressions are obtained for statistical characteristics of end-to-end signal-to-noise ratio (SNR), i.e., cumulative distribution function and probability density function. Using these expressions, novel closed form expressions are derived for the outage probability and the average bit error rate of various modulation techniques. Numerical results show the effect of fading, turbulence, and pointing errors on the performance of the considered cooperative system.
{"title":"On the performance of DF based mixed triple-hop RF-FSO-RF cooperative system","authors":"Sanya Anees, M. Bhatnagar, Parasa Ram","doi":"10.1109/RISE.2017.8378124","DOIUrl":"https://doi.org/10.1109/RISE.2017.8378124","url":null,"abstract":"In this work, we analyze the performance of decode-and-forward (DF) based triple-hop radio frequency-free space optical-radio frequency (RF-FSO-RF) communication system. The mixed RF-FSO-RF system derive application, where the FSO link can be used to provide high speed connectivity between the two RF networks. The RF links are characterized by Nakagami-m fading and the FSO link is characterized by path loss, Gamma-Gamma distributed turbulence and pointing errors. For this asymmetric triple hop communication system, new closed form mathematical expressions are obtained for statistical characteristics of end-to-end signal-to-noise ratio (SNR), i.e., cumulative distribution function and probability density function. Using these expressions, novel closed form expressions are derived for the outage probability and the average bit error rate of various modulation techniques. Numerical results show the effect of fading, turbulence, and pointing errors on the performance of the considered cooperative system.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130629971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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