Pub Date : 2007-11-01DOI: 10.1109/PEDS.2007.4487780
S. Owatchaiphong, C. Carstensen, R. D. De Doncker
Genetic algorithms (GA) have been applied in optimization of machine designs since the first publication in 1975 (J.H. Holland, 1992). In this paper, a practical implementation of this search technique in predesign of switched reluctance machines is presented. An optimized design was found by means of GA based on an objective function for maximizing an average torque of the machine, where dimensions and a thermal loading are specified. Moreover, an auxiliary objective for the most preferable geometries is utilized, well supporting a vector format of the model in GA. The simulation results verified and demonstrated the efficacy of the proposed strategy.
{"title":"Optimization of Predesign of Switched Reluctance Machines Cross Section Using Genetic Algorithms","authors":"S. Owatchaiphong, C. Carstensen, R. D. De Doncker","doi":"10.1109/PEDS.2007.4487780","DOIUrl":"https://doi.org/10.1109/PEDS.2007.4487780","url":null,"abstract":"Genetic algorithms (GA) have been applied in optimization of machine designs since the first publication in 1975 (J.H. Holland, 1992). In this paper, a practical implementation of this search technique in predesign of switched reluctance machines is presented. An optimized design was found by means of GA based on an objective function for maximizing an average torque of the machine, where dimensions and a thermal loading are specified. Moreover, an auxiliary objective for the most preferable geometries is utilized, well supporting a vector format of the model in GA. The simulation results verified and demonstrated the efficacy of the proposed strategy.","PeriodicalId":166704,"journal":{"name":"2007 7th International Conference on Power Electronics and Drive Systems","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124289054","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-01DOI: 10.1109/PEDS.2007.4487684
T. Plum, R. D. De Doncker
The design of semiconductor devices is usually performed with finite element methods. In this paper an analytical approach for the design of a high- power MOS turn-off thyristor (MTO) is presented. The model enables the calculation of on-state voltage drop and turn-off losses analytically. The results are compared to a finite-element (FE) model of the MTO. The analytical model offers a high degree of accuracy together with fast calculation times and can therefore be used to find an optimized device design for a given application.
{"title":"Analytical Design of High-Power MTO Thyristors","authors":"T. Plum, R. D. De Doncker","doi":"10.1109/PEDS.2007.4487684","DOIUrl":"https://doi.org/10.1109/PEDS.2007.4487684","url":null,"abstract":"The design of semiconductor devices is usually performed with finite element methods. In this paper an analytical approach for the design of a high- power MOS turn-off thyristor (MTO) is presented. The model enables the calculation of on-state voltage drop and turn-off losses analytically. The results are compared to a finite-element (FE) model of the MTO. The analytical model offers a high degree of accuracy together with fast calculation times and can therefore be used to find an optimized device design for a given application.","PeriodicalId":166704,"journal":{"name":"2007 7th International Conference on Power Electronics and Drive Systems","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126235982","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-01DOI: 10.1109/PEDS.2007.4487869
A. Khajeh, J. Moghani, M. Shahbazi
In this paper, a predictive direct torque control (DTC) scheme for split phase induction machine (SPIM) is established. The induction motor has two sets of stator three-phase windings spatially shifted by 30 electrical degrees. The major drawback of SPIMs is occurrence of extra harmonic currents. Thus in the DTC of SPIMs in addition to control of torque and flux we should consider simultaneously minimizing harmonic components of stator current. Predictive DTC along with optimized SVPWM is used in this paper. Simulation results show that in addition to a good dynamic response, current harmonics in this scheme is significantly reduced.
{"title":"An Efficient Direct Torque Control Scheme for Split Phase Induction Motor","authors":"A. Khajeh, J. Moghani, M. Shahbazi","doi":"10.1109/PEDS.2007.4487869","DOIUrl":"https://doi.org/10.1109/PEDS.2007.4487869","url":null,"abstract":"In this paper, a predictive direct torque control (DTC) scheme for split phase induction machine (SPIM) is established. The induction motor has two sets of stator three-phase windings spatially shifted by 30 electrical degrees. The major drawback of SPIMs is occurrence of extra harmonic currents. Thus in the DTC of SPIMs in addition to control of torque and flux we should consider simultaneously minimizing harmonic components of stator current. Predictive DTC along with optimized SVPWM is used in this paper. Simulation results show that in addition to a good dynamic response, current harmonics in this scheme is significantly reduced.","PeriodicalId":166704,"journal":{"name":"2007 7th International Conference on Power Electronics and Drive Systems","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126393663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-01DOI: 10.1109/PEDS.2007.4487792
A. Moallem, H.M. Teshnizi, M. Zolghadri
In this paper, a unified hybrid vector control of vector modulated VIENNA I rectifier is presented. Feedback linearization technique is used for the DC-link voltage control. For this purpose, at first a mathematical model of the VIENNA I rectifier is derived. Using this model, it is shown that the dynamic of the rectifier falls into two categories; linear inner dynamic which consists of inner current control and neutral-point potential control and nonlinear outer dynamic which consists of the DC-link voltage control. Based on these facts, a hybrid vector control scheme meaning linear vector control of inner dynamics and nonlinear vector control of outer dynamic is devised. Simulations carried out demonstrate the validity of the proposed control scheme. Simulation results are validated via experimental setup results.
{"title":"A DSP-Based Unified Three Phase/Switch/Level Unity Power Factor Rectifier Using Feedback Linearization for DC-Bus Voltage Control","authors":"A. Moallem, H.M. Teshnizi, M. Zolghadri","doi":"10.1109/PEDS.2007.4487792","DOIUrl":"https://doi.org/10.1109/PEDS.2007.4487792","url":null,"abstract":"In this paper, a unified hybrid vector control of vector modulated VIENNA I rectifier is presented. Feedback linearization technique is used for the DC-link voltage control. For this purpose, at first a mathematical model of the VIENNA I rectifier is derived. Using this model, it is shown that the dynamic of the rectifier falls into two categories; linear inner dynamic which consists of inner current control and neutral-point potential control and nonlinear outer dynamic which consists of the DC-link voltage control. Based on these facts, a hybrid vector control scheme meaning linear vector control of inner dynamics and nonlinear vector control of outer dynamic is devised. Simulations carried out demonstrate the validity of the proposed control scheme. Simulation results are validated via experimental setup results.","PeriodicalId":166704,"journal":{"name":"2007 7th International Conference on Power Electronics and Drive Systems","volume":"283 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124530682","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-01DOI: 10.1109/PEDS.2007.4487833
A. Ashaibi, S. Finney, B. Williams, A. Massoud
The diode clamped multilevel inverter (DCMLI) is an attractive high voltage multilevel inverter due to its robustness. The main draw back of the DCMLI is dc link capacitor voltage imbalance. A diode clamped inverter has been used in this research. The method used to balance the dc link capacitors is based on auxiliary switch-mode circuits, which are operated in a discontinuous inductor current mode. This research is focused on how to use auxiliary SMPS circuits to start up, balance, and shutdown the inverter. These functions are an issue in high voltage applications of the multilevel inverter. Simulation and experimental results are presented for the proposed auxiliary circuits operational technique.
{"title":"Extend the Use of Auxiliary Circuit to Start up, Shut down, and Balance of the Modified Diode Clamped Multilevel Inverter","authors":"A. Ashaibi, S. Finney, B. Williams, A. Massoud","doi":"10.1109/PEDS.2007.4487833","DOIUrl":"https://doi.org/10.1109/PEDS.2007.4487833","url":null,"abstract":"The diode clamped multilevel inverter (DCMLI) is an attractive high voltage multilevel inverter due to its robustness. The main draw back of the DCMLI is dc link capacitor voltage imbalance. A diode clamped inverter has been used in this research. The method used to balance the dc link capacitors is based on auxiliary switch-mode circuits, which are operated in a discontinuous inductor current mode. This research is focused on how to use auxiliary SMPS circuits to start up, balance, and shutdown the inverter. These functions are an issue in high voltage applications of the multilevel inverter. Simulation and experimental results are presented for the proposed auxiliary circuits operational technique.","PeriodicalId":166704,"journal":{"name":"2007 7th International Conference on Power Electronics and Drive Systems","volume":"10 10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122508974","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-01DOI: 10.1109/PEDS.2007.4487926
Chang-Hua Lin, Tsung-You Hung, Chien-Ming Wang, Kai-Jun Pai
A mathematical model of parasitical capacitance in LCD panel is conducted to explore the influence of leakage current effect on electric characteristics. First, a class D resonant backlight inverter is employed to act as the main circuit. Next, the phase angle variations caused by the parasitic capacitances is considered as a reference parameter in the proposed control strategy. By using the primary-side control and incorporating the DPLL technique to form a feedback mechanism to track the optimal operating frequency. And then the influence of parasitic capacitance can be reduced so as to eliminate the leakage current effect, hence, the system efficiency and stability will be improved. Complete mathematical analysis and design considerations are detailed. Experimental results agree with the theoretical predictions.
{"title":"Modeling of the Parasitical Capacitance Effect in LCD Panel and Corresponding Elimination Strategy","authors":"Chang-Hua Lin, Tsung-You Hung, Chien-Ming Wang, Kai-Jun Pai","doi":"10.1109/PEDS.2007.4487926","DOIUrl":"https://doi.org/10.1109/PEDS.2007.4487926","url":null,"abstract":"A mathematical model of parasitical capacitance in LCD panel is conducted to explore the influence of leakage current effect on electric characteristics. First, a class D resonant backlight inverter is employed to act as the main circuit. Next, the phase angle variations caused by the parasitic capacitances is considered as a reference parameter in the proposed control strategy. By using the primary-side control and incorporating the DPLL technique to form a feedback mechanism to track the optimal operating frequency. And then the influence of parasitic capacitance can be reduced so as to eliminate the leakage current effect, hence, the system efficiency and stability will be improved. Complete mathematical analysis and design considerations are detailed. Experimental results agree with the theoretical predictions.","PeriodicalId":166704,"journal":{"name":"2007 7th International Conference on Power Electronics and Drive Systems","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122307485","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-01DOI: 10.1109/PEDS.2007.4487943
T. Tayjasanant
This paper presents a graphic user interface (GUI)-based program for harmonic impedance calculation. The GUI feature provides the user with visual interaction and facilitates the analysis. The harmonic impedance calculation is based on two steady-state conditions of voltage and current waveforms. Modal transformations and weighting average method are presented and proposed. The program has been tested using two actual field measurements.
{"title":"A Graphic User Interface-based Program for Harmonic Impedance Calculation","authors":"T. Tayjasanant","doi":"10.1109/PEDS.2007.4487943","DOIUrl":"https://doi.org/10.1109/PEDS.2007.4487943","url":null,"abstract":"This paper presents a graphic user interface (GUI)-based program for harmonic impedance calculation. The GUI feature provides the user with visual interaction and facilitates the analysis. The harmonic impedance calculation is based on two steady-state conditions of voltage and current waveforms. Modal transformations and weighting average method are presented and proposed. The program has been tested using two actual field measurements.","PeriodicalId":166704,"journal":{"name":"2007 7th International Conference on Power Electronics and Drive Systems","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126780111","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-01DOI: 10.1109/PEDS.2007.4487934
K. Vadirajacharya, P. Agarwal, H. Gupta
In recent years there has been considerable interest in the development and application of active power filters using current source active power filters for harmonic filtering. The unbalanced load resulting zero sequence current can affect the performance of shunt active filter adversely. In this paper a novel active, filter control for a three-phase four-wire unbalance system has been designed. This method allows the calculation of the reference current under non-sinusoidal and unbalanced three- phase supply voltage conditions. The proposed filter is based on Akagi's instantaneous power theory (IPT), which are organized in different independent blocks. We introduce a unit vector template to derive fundamental voltage signal from an unbalanced source. The reference currents are then compared with actual source current in a hystersis band controller. Extensive simulation results obtained using MATLAB/SIMULINK under R-L non-linear loading conditions are presented and discussed.
{"title":"Control of Current-Source Active Power Filter using Unit Vector Template in Three Phase Four Wire Unbalnced System","authors":"K. Vadirajacharya, P. Agarwal, H. Gupta","doi":"10.1109/PEDS.2007.4487934","DOIUrl":"https://doi.org/10.1109/PEDS.2007.4487934","url":null,"abstract":"In recent years there has been considerable interest in the development and application of active power filters using current source active power filters for harmonic filtering. The unbalanced load resulting zero sequence current can affect the performance of shunt active filter adversely. In this paper a novel active, filter control for a three-phase four-wire unbalance system has been designed. This method allows the calculation of the reference current under non-sinusoidal and unbalanced three- phase supply voltage conditions. The proposed filter is based on Akagi's instantaneous power theory (IPT), which are organized in different independent blocks. We introduce a unit vector template to derive fundamental voltage signal from an unbalanced source. The reference currents are then compared with actual source current in a hystersis band controller. Extensive simulation results obtained using MATLAB/SIMULINK under R-L non-linear loading conditions are presented and discussed.","PeriodicalId":166704,"journal":{"name":"2007 7th International Conference on Power Electronics and Drive Systems","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127094746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-01DOI: 10.1109/PEDS.2007.4487893
T. Noguchi, K. Sano
This paper focuses on specific harmonic active power suppression of a direct-power-controlled (DPC) PWM current-source rectifier (CSR) in order to achieve low distortion of the input line currents. Total input power factor of the DPC-based PWMCSR becomes worse as the load gets lower due to the low-order harmonics in the line currents, especially the fifth and the seventh. Since the dominant low-order harmonic currents cause an oscillation in the active power at frequency of sixth, suppression of the sixth-order harmonic active power is essential to improve the total power factor particularly in the low-load range. The paper describes a theoretical aspect and a suppression technique of the harmonic active power, followed by basic configuration and operation of the DPC-based PWMCSR. Effectiveness of the proposed technique is confirmed through computer simulations and experimental tests, using a 2-kW prototype. As a result, the total harmonic distortion of the line currents is effectively reduced by 10 %, which results in approximately 20-% improvement of the total input power factor at a 350-W load condition.
{"title":"Specific Harmonic Power Suppression of Drector-Power-Controlled Current-Source PWM Rectifier","authors":"T. Noguchi, K. Sano","doi":"10.1109/PEDS.2007.4487893","DOIUrl":"https://doi.org/10.1109/PEDS.2007.4487893","url":null,"abstract":"This paper focuses on specific harmonic active power suppression of a direct-power-controlled (DPC) PWM current-source rectifier (CSR) in order to achieve low distortion of the input line currents. Total input power factor of the DPC-based PWMCSR becomes worse as the load gets lower due to the low-order harmonics in the line currents, especially the fifth and the seventh. Since the dominant low-order harmonic currents cause an oscillation in the active power at frequency of sixth, suppression of the sixth-order harmonic active power is essential to improve the total power factor particularly in the low-load range. The paper describes a theoretical aspect and a suppression technique of the harmonic active power, followed by basic configuration and operation of the DPC-based PWMCSR. Effectiveness of the proposed technique is confirmed through computer simulations and experimental tests, using a 2-kW prototype. As a result, the total harmonic distortion of the line currents is effectively reduced by 10 %, which results in approximately 20-% improvement of the total input power factor at a 350-W load condition.","PeriodicalId":166704,"journal":{"name":"2007 7th International Conference on Power Electronics and Drive Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126618859","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-01DOI: 10.1109/PEDS.2007.4487945
V. Fernão Pires, J. Martins, J. Silva
In this paper, a single stage flyback pfc converter is used as a power supply of a testing distance relay system. The flyback pfc converter topology, operation and control are presented. A fast and robust sliding mode control of the input current is also presented. The sliding mode controller enables also high power factor and nearly sinusoidal input current. The dc output voltage of the converter is controlled by a proportional integral (PI) controller. Simulation and experimental results from a laboratory prototype are presented and discussed.
{"title":"A Single Stage Flyback PFC Converter for Testing Distance Relay Systems","authors":"V. Fernão Pires, J. Martins, J. Silva","doi":"10.1109/PEDS.2007.4487945","DOIUrl":"https://doi.org/10.1109/PEDS.2007.4487945","url":null,"abstract":"In this paper, a single stage flyback pfc converter is used as a power supply of a testing distance relay system. The flyback pfc converter topology, operation and control are presented. A fast and robust sliding mode control of the input current is also presented. The sliding mode controller enables also high power factor and nearly sinusoidal input current. The dc output voltage of the converter is controlled by a proportional integral (PI) controller. Simulation and experimental results from a laboratory prototype are presented and discussed.","PeriodicalId":166704,"journal":{"name":"2007 7th International Conference on Power Electronics and Drive Systems","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126807590","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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