Pub Date : 2021-12-31DOI: 10.5573/jsts.2021.21.6.466
Donggyu Kim, Joon-Mo Yoo, Younggun Pu, Yeonjae Jung, Hyungki Huh, S. Kim, K. Hwang, Youngoo Yang, Kangyoon Lee
{"title":"A Reference Clock Doubler with Fully Digital Duty-cycle Error Correction Controller","authors":"Donggyu Kim, Joon-Mo Yoo, Younggun Pu, Yeonjae Jung, Hyungki Huh, S. Kim, K. Hwang, Youngoo Yang, Kangyoon Lee","doi":"10.5573/jsts.2021.21.6.466","DOIUrl":"https://doi.org/10.5573/jsts.2021.21.6.466","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":"54 1","pages":""},"PeriodicalIF":0.4,"publicationDate":"2021-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85177855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-31DOI: 10.5573/jsts.2021.21.6.418
Faisal Iqbal, Hussamud Din, Seungoh Han, Byeungleul Lee
{"title":"A New Coupling Spring Design for MEMS Tuning Fork Structures Demonstrating Robustness to Fabrication Errors and Linear Accelerations","authors":"Faisal Iqbal, Hussamud Din, Seungoh Han, Byeungleul Lee","doi":"10.5573/jsts.2021.21.6.418","DOIUrl":"https://doi.org/10.5573/jsts.2021.21.6.418","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":"1 1","pages":""},"PeriodicalIF":0.4,"publicationDate":"2021-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82956697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-31DOI: 10.5573/jsts.2021.21.6.472
Jaehyeong Park, Sang-Gyu Park
{"title":"A 320-MS/s 2-b/cycle Second-order Noise-shaping SAR ADC","authors":"Jaehyeong Park, Sang-Gyu Park","doi":"10.5573/jsts.2021.21.6.472","DOIUrl":"https://doi.org/10.5573/jsts.2021.21.6.472","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":"24 1","pages":""},"PeriodicalIF":0.4,"publicationDate":"2021-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85497130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-31DOI: 10.5573/jsts.2021.21.6.483
Prashanthi Metku, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi
{"title":"Transistor Count Reduction Technique for Clockfree Null-convention Arithmetic Logic Circuits","authors":"Prashanthi Metku, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi","doi":"10.5573/jsts.2021.21.6.483","DOIUrl":"https://doi.org/10.5573/jsts.2021.21.6.483","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":"17 1","pages":""},"PeriodicalIF":0.4,"publicationDate":"2021-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83718629","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.5573/jsts.2021.21.5.297
Ki-hyun Kim, J. Baek, Jonghyun Kim, Hyungil Chae
{"title":"Time-interleaved Noise-shaping SAR ADC based on CIFF Architecture with Redundancy Error Correction Technique","authors":"Ki-hyun Kim, J. Baek, Jonghyun Kim, Hyungil Chae","doi":"10.5573/jsts.2021.21.5.297","DOIUrl":"https://doi.org/10.5573/jsts.2021.21.5.297","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":"77 1","pages":""},"PeriodicalIF":0.4,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80588357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.5573/jsts.2021.21.5.304
Jau‐Ji Jou, Tien-Tsorng Shih, Chih-Chen Peng, H. Hsu, Xuan-Yi Ye
{"title":"Inductorless Broadband Transimpedance Amplifier for 25-Gb/s NRZ and 50-Gb/s PAM-4 Operations in a 90-nm CMOS Technology","authors":"Jau‐Ji Jou, Tien-Tsorng Shih, Chih-Chen Peng, H. Hsu, Xuan-Yi Ye","doi":"10.5573/jsts.2021.21.5.304","DOIUrl":"https://doi.org/10.5573/jsts.2021.21.5.304","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":"227 1","pages":""},"PeriodicalIF":0.4,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73550419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.5573/jsts.2021.21.5.340
D. Shim
{"title":"CMOS Diodes under Cryogenic Temperature and High Magnetic Field Environment","authors":"D. Shim","doi":"10.5573/jsts.2021.21.5.340","DOIUrl":"https://doi.org/10.5573/jsts.2021.21.5.340","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":"8 1","pages":""},"PeriodicalIF":0.4,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72845441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.5573/jsts.2021.21.5.322
Jin-Young Son, Hyouk-Kyu Cha
{"title":"An Electrical Stimulator IC with Chopped Pulse based Active Charge Balancing for Neural Interface Applications","authors":"Jin-Young Son, Hyouk-Kyu Cha","doi":"10.5573/jsts.2021.21.5.322","DOIUrl":"https://doi.org/10.5573/jsts.2021.21.5.322","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":"1 1","pages":""},"PeriodicalIF":0.4,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87132437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.5573/jsts.2021.21.5.334
Dae-Han Jung, Khwang-Sun Lee, Jun-Young Park
—Controlling the erase speed of a NAND flash is one of the challenges in memory technology. As the planar NAND flash has evolved to the vertically integrated gate-all-around (GAA), the number of stacks of word-lines (WL) was increased for better packing density. However, potential transfer through the silicon substrate or metal bit-line (BL) is insufficient with the increased number of stacks. Hence, we propose a novel V-NAND structure including multi-layered macaroni filler. The proposed macaroni filler is composed of a dielectric outer layer and a metallic core layer. The metallic core layer makes back-biasing is possible in V-NAND. As a result, erase speed can be improved without large modification of fabrication process or device layout.
{"title":"Demonstration of Multi-layered Macaroni Filler for Back-Biasing-Assisted Erasing Configuration in 3D V-NAND","authors":"Dae-Han Jung, Khwang-Sun Lee, Jun-Young Park","doi":"10.5573/jsts.2021.21.5.334","DOIUrl":"https://doi.org/10.5573/jsts.2021.21.5.334","url":null,"abstract":"—Controlling the erase speed of a NAND flash is one of the challenges in memory technology. As the planar NAND flash has evolved to the vertically integrated gate-all-around (GAA), the number of stacks of word-lines (WL) was increased for better packing density. However, potential transfer through the silicon substrate or metal bit-line (BL) is insufficient with the increased number of stacks. Hence, we propose a novel V-NAND structure including multi-layered macaroni filler. The proposed macaroni filler is composed of a dielectric outer layer and a metallic core layer. The metallic core layer makes back-biasing is possible in V-NAND. As a result, erase speed can be improved without large modification of fabrication process or device layout.","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":"1 1","pages":""},"PeriodicalIF":0.4,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74716695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.5573/jsts.2021.21.5.364
Sengjun Jo, Hyeonjun Kim, K. Kwon
{"title":"2.4 GHz Low-power Receiver Front-end Employing I/Q Mixer with Current-reused Quadrature Transconductor for Bluetooth Low Energy Applications","authors":"Sengjun Jo, Hyeonjun Kim, K. Kwon","doi":"10.5573/jsts.2021.21.5.364","DOIUrl":"https://doi.org/10.5573/jsts.2021.21.5.364","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":"32 1","pages":""},"PeriodicalIF":0.4,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80765746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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